Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
Claims 21-25 and 27-30 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 21, this claim recites the limitation of “a size of the second semiconductor layer and a size of the third semiconductor layer are each smaller than a size of the first semiconductor layer in a plan view” (emphasis added). Since the amended claim 21 removes a first semiconductor layer from a first section, it appears that only two semiconductor layers are being used. Thus, it is unclear how and in what manner the above claim limitation is accomplished. Clarification is required.
Claims not specifically mentioned above are rejected by virtue of their dependency on a rejected claim.
Claim(s) 21-25, 27, 31-35 and 37 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Blanquart (WO 2012/155142).
Regarding claim 21, as far as the claim is understood, Blanquart discloses a semiconductor device comprising: a first section including: a first wiring layer (330; Fig.3h); a second section including a first semiconductor layer (in view of Fig.3i, a portion of 311 which supports a first row of supporting circuits 370) and a second wiring layer (340 in a region of a first row of supporting circuits 370); and a third section including a second semiconductor layer (in view of Fig.3i, a portion of 311 which supports a second row of supporting circuits 370) and a third wiring layer (340 in a region of a second row of supporting circuits 370), wherein the second section and the third section are vertically stacked on the first section (Figs.3g-3i), wherein the second section and the third section are arranged to one another (Fig.3i), and wherein the second wiring layer is electrically connected to the third wiring layer via the first wiring layer (Blanquart discloses in page 17, lines 11-14 that two buses 330 [i.e. first wiring layer] and 340 [i.e. second and third wiring layers] are electrically connected by interconnects 321, 321a, 321b; Figs.3g-3i).
Regarding claim 31, Blanquart discloses an electronic apparatus comprising: a semiconductor device including: a first section including: a first wiring layer (330; Fig.3h); a second section including a first semiconductor layer (in view of Fig.3i, a portion of 311 which supports a first row of supporting circuits 370) and a second wiring layer (340 in a region of a first row of supporting circuits 370); and a third section including a second semiconductor layer (in view of Fig.3i, a portion of 311 which supports a second row of supporting circuits 370) and a third wiring layer (340 in a region of a second row of supporting circuits 370), wherein the second section and the third section are vertically stacked on the first section (Figs.3g-3i), wherein the second section and the third section are arranged to one another (Fig.3i), wherein a size of the second section and a size of the third section are each smaller than a size of the first section in a plan view (Fig.3i), and wherein the second wiring layer is electrically connected to the third wiring layer via the first wiring layer (Blanquart discloses in page 17, lines 11-14 that two buses 330 [i.e. first wiring layer] and 340 [i.e. second and third wiring layers] are electrically connected by interconnects 321, 321a, 321b; Figs.3g-3i).
Regarding claims 22-24, 27, 32-34 and 37, as far as the claim is understood, the limitations therein are shown in Figs.3g-3aa of Blanquart.
Regarding claims 25 and 35, as far as the claim is understood, the limitations therein are shown in Fig.3f of Blanquart.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 29-30 and 39-40 is/are rejected under 35 U.S.C. 103 as being unpatentable over Blanquart (WO 2012/155142) in view of Yoshizawa et al (US 9,087,891).
Regarding claims 29-30 and 39-40, although Blanquart does not specifically mention the use of a moisture resistant structure, it is well known in the art to utilize a sealing ring structure to prevent moisture from permeating into a pixel region. The use of a sealing ring structure is shown in Yoshizawa et al (Fig.1B; 36) and it would have been obvious to one of ordinary skill in the art to utilize the teachings of Yoshizawa et al in the device of Blanquart in view of the desire to prevent moisture from causing damage and component degradation resulting in improving the light detection device.
Claim(s) 28, 38 and 41-42 is/are rejected under 35 U.S.C. 103 as being unpatentable over Blanquart (WO 2012/155142).
Regarding claims 28, 38 and 41-42, although Blaquart does not specifically mention the use of a memory portion for storing pixel data, such use is well known in the art and would have been obvious to one of ordinary skill in the art in view of meeting different design requirements and achieving the particular desired performance such as the desire of manipulating pixel output data by processing at a later time.
Applicant's arguments filed on 2/4/2026 have been fully considered but they are not persuasive.
The main point of applicant’s argument regarding Blanquart is that it doesn’t disclose “wherein the second section and third section are vertically stacked on the first section” and “wherein the second wiring layer is electrically connected to the third wiring layer via the first wiring layer”. However, the examiner disagrees with this argument. Contrary to applicant’s argument, Blanquart discloses the applicant’s claimed limitations as explained in the rejection above. More specifically, Blanquart discloses in page 17, lines 11-14 that two buses 330 (i.e. first wiring layer) and 340 (i.e. second and third wiring layers) are electrically connected by interconnects 321, 321a, 321b (Figs.3g-3i). Thus, it is perfectly valid to state that Blanquart disclose the feature of “wherein the second wiring layer is electrically connected to the third wiring layer via the first wiring layer”. In addition, Blanquart shows in Figs.3g-3i the feature of “wherein the second section and third section are vertically stacked on the first section”. It should be noted that the arrangement shown in Figs.1 and 21 of the applicant’s claimed invention is similar to that of Blanquart (Figs.3g-3i). It should also be noted that it is the claims that define the claimed invention, and it is the claims, not the specification, that are anticipated or unpatentable.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN K PYO whose telephone number is (571)272-2445. The examiner can normally be reached 9:00-5:30 PM.
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/KEVIN K PYO/ Primary Examiner, Art Unit 2878
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