Prosecution Insights
Last updated: April 19, 2026
Application No. 18/744,077

AC-TO-DC POWER CONVERSION WITH GROUND REFERENCE TO COMMON NODE OF SOLID-STATE AC SWITCH

Non-Final OA §103§112
Filed
Jun 14, 2024
Examiner
AHMAD, SHAHZEB K
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Amber Semiconductor, Inc.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
84%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
300 granted / 378 resolved
+11.4% vs TC avg
Minimal +5% lift
Without
With
+4.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
15 currently pending
Career history
393
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
25.6%
-14.4% vs TC avg
§112
17.9%
-22.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 378 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDS) submitted on 06/14/2024 and 06/14/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Claim Objections Claim 1 is objected to because of the following informalities: Claim 1, line 3, “to common node” to “to a common node”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2-5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 2, claim 2 recites, inter alia, “wherein the control circuitry comprises a DC ground node coupled to the common node of the solid-state AC switch”. This limitation is indefinite because it is unclear which DC ground node is being referenced. Claim 2 depends upon claim 1 and claim 1 recites in line 7 “a DC ground node of the power converter circuit” while claim 2 also recites “a DC ground node”. Although the claims do seem to point out that claim 1 is a DC ground node for the power converter and claim 2 is a DC ground node for the control circuity, the language of both being recited as a DC ground node is ambiguous. Based on the Application’s Specification and Drawings it is clear that these grounds are for two different components and thus that is the interpretation taken by the Examiner when examining claim 2. However, the Examiner suggests amending the language to being a first DC ground node for claim 1 and a second DC ground node for claim 2 to properly and more concretely define the subject matter being claimed. Claims 3-5 depend upon claim 2 and do not cure the deficiencies of claim 2 thus inherit the rejection under 35 U.S.C. 112(b). Claim Rejections In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 6, 8-9 and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Telefus (WO 2022/031276 A1) in view of Banak (US 5298817). Regarding claim 1, Telefus teaches a device (Figure 7), comprising: a solid-state alternating current (AC) switch (Figure 7 Components 301+302+303+304; Page 11 Summary “a bidirectional switch subcircuit configuration that includes a floating AC/DC power supply and a solid state double pole switch that alternates between connection of the AC source to the load and periodic connection of the AC source to the AC/DC power supply”) comprising a first solid-state switch (Figure 7 Component 301) and a second solid-state switch (Figure 7 Component 302) which are coupled back-to-back (Figure 7 Components 301+302 both have source coupled to one another making them coupled in a back to back configuration) to a common node of the solid-state AC switch (Figure 7 has been annotated below as Annotated Figure 7A to properly map out elements; Annotated Figure 7A Component N1); and a power converter circuit (Annotated Figure 7A Component PC) coupled to the common node of the solid-state AC switch (Annotated Figure 7A Component N1 is coupled to the Component 514 which a DC output node of Component PC) and configured to convert an AC voltage (Annotated Figure 7A Component 101) to a direct current (DC) voltage (Annotated Figure 7A Component 514 is a DC output node; Figure 4 shows a block diagram of Figure 7 wherein Component 106 is the power converter and shown to be an AC/DC converter (Page 8 Lines 28-29); Figures 8A-9 show the operational modes of Figure 7; Page 10 Lines 10-12 “Figure 9 shows effective configuration of the circuit of Figure 7 when the MOSFETs in the bidirectional switch are “on”. The AC/DC power supply circuit is bypassed and all current flows from AC mains 101 through load 102”), wherein the common node of the solid-state AC switch is utilized as a DC node of the power converter circuit (Annotated Figure 7 Component N1 is coupled to the DC output node Component 514), and wherein the DC voltage output from the power converter circuit is referenced to the common node of the solid-state AC switch (Annotated Figure 7 Component N1 is connected to the output DC node 514 thus making the DC voltage output referenced to the common node of Components 301 and 302). PNG media_image1.png 889 1212 media_image1.png Greyscale Telefus does not teach wherein the common node of the solid-state AC switch is grounded thus not teaching a DC ground node for the DC output voltage. Banak teaches a solid state switch (Figure 1), comprising: a first solid-state switch (Figure 1 Component 6) and a second solid-state switch (Figure 1 Component 7) which are coupled back-to-back (Figure 1 Components 6 and 7 have source terminals connected thus making them in a back-to-back configuration) to a common node of the solid-state (Figure 1 Component 8), wherein the common node is connected to ground (Col. 1 Lines 64-68 highlights that Component 8 is connected to ground through Component 9) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Telefus and grounding the common node of the solid-state switches as taught by Banak. The advantage of grounding the common node is that the converter becomes ground referenced as well as the circuit thus reducing the need for floating drivers and converters which reduces the gate-drive complexity and also adds the benefit of allowing for better feedback control parameters thus enhancing the efficiency of the switching behavior. Regarding claim 2, Telefus and Banak teach all the limitations of claim 1. Telefus further teaches control circuitry (Figure 7 Component 107) which is configured to control the solid-state AC switch (Figure 7 Component 408 are control signals to control Components 301 and 302), wherein the DC voltage output from the power converter circuit is utilized to provide DC power to the control circuitry (Figure 7 Component 406; Page 7 Lines 21-23 “Control circuit 107 is supplied with DC power via input lines 406”), and wherein the control circuitry comprises a DC node coupled to the common node of the solid-state AC switch (Annotated Figure 7A Component 407 is coupled to Component N1). Telefus does not teach wherein the common node of the solid-state AC switch is grounded thus not teaching a DC ground node for the control circuitry coupled to the common node. Banak teaches a solid state switch (Figure 1), comprising: a first solid-state switch (Figure 1 Component 6) and a second solid-state switch (Figure 1 Component 7) which are coupled back-to-back (Figure 1 Components 6 and 7 have source terminals connected thus making them in a back-to-back configuration) to a common node of the solid-state (Figure 1 Component 8), wherein the common node is connected to ground (Col. 1 Lines 64-68 highlights that Component 8 is connected to ground through Component 9) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Telefus and grounding the common node of the solid-state switches as taught by Banak. The advantage of grounding the common node is that the converter becomes ground referenced as well as the circuit thus reducing the need for floating drivers and converters which reduces the gate-drive complexity and also adds the benefit of allowing for better feedback control parameters thus enhancing the efficiency of the switching behavior. Regarding claim 6, Telefus and Banak teach all the limitations of claim 2. Telefus further teaches wherein the first solid-state switch and the second solid-state switch each comprise a MOSFET device (Figure 7 Components 301 and 302 are MOSFET devices), wherein the common node of the solid-state AC switch comprises a common source connection of the first and second solid-state switches (Figure 7 Components 301 and 302 have a common source connection). Regarding claim 8, Telefus and Banak teach all the limitations of claim 1. Telefus further teaches wherein the power converter circuit comprises a first power input terminal that is coupled to a line side of the solid-state AC switch (Figure 7 is shown in block diagram form in Figure 4; Page 8 Lines 28-29 “Figure 7 is a schematic diagram of the embodiment of Figure 6 wherein the elements have been alternatively connected to produce the two-wire circuit 400 of Figure 4”; Figure 4 Component 401 is the solid state switch; Figure 4 Component 402 is the first input terminal of the power converter and is connected to the left side of Component 401), and a second power input terminal that is coupled to load side of the solid-state AC switch (Figure 4 Component 403 is the second input terminal of the power converter and is connected to the second side of Component 401). Regarding claim 9, Telefus and Banak teach all the limitations of claim 1. Telefus further teaches wherein the power converter circuit is configured to convert the AC voltage to the DC voltage by utilizing current drawn from AC supply power (Annotated Figure 7A Component PC converts AC voltage to DC voltage from the AC source Component 101; Figure 4 shows a block diagram of Figure 7 wherein Component 106 is the power converter and shown to be an AC/DC converter (Page 8 Lines 28-29); Figures 8A-9 show the operational modes of Figure 7; Page 10 Lines 10-12 “Figure 9 shows effective configuration of the circuit of Figure 7 when the MOSFETs in the bidirectional switch are “on”. The AC/DC power supply circuit is bypassed and all current flows from AC mains 101 through load 102”) to charge a storage capacitor to a maximum DC voltage (Figure 7 Component 208; Figure 8B; Page 10 Lines 6-7 “charging capacitor 208 to the voltage determined by the threshold voltage of MOSFET 503”). Regarding claim 11, Telefus and Banak teach all the limitations of claim 1. Telefus further teaches wherein the device comprises an intelligent circuit breaker device (The word “intelligent” is very broad and the Examiner has interpreted this as meaning controllable or having a controller or control circuitry; Components 301+302 act as a breaker circuit and are controlled thus the device is an intelligent circuit breaker device). Regarding claim 12, Telefus and Banak teach all the limitations of claim 1. Telefus further teaches wherein the device comprises an intelligent dimmer switch device (The word “intelligent” is very broad and the Examiner has interpreted this as meaning controllable or having a controller or control circuitry; Page 3 Line 15 points out details regarding Figure 4 which is what Figure 7 is based upon (See Page 8 Lines 28-29) which states “Figure 4 is a block diagram of an embodiment of a two-wire switch/dimmer circuit”). Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Telefus (WO 2022/031276 A1) in view of Banak (US 5298817) and in further view of Casey (US 2021/0226441 A1). Regarding claim 4, Telefus and Banak teach all the limitations of claim 2. Telefus does not teach a current sensor device disposed in an electrical path between the first solid-state switch and the second solid-state switch, wherein the control circuitry is configured to process current sensor signals from the current sensor device to determine a magnitude of current flow through the solid-state AC switch. Casey teaches an intelligent circuit interruption circuit (Figure 1), comprising: a solid state switch (Figure 1 Components 101-1+102-1) comprising a first solid state switch (Figure 1 Component 101-1) and a second solid state switch (Figure 1 Component 102-1) configured in back to back configuration at a common node (Paragraph 0022 “The first and second switches 101 and 102 are serially connected back-to-back”); control circuitry to control the solid state switch (Figure 1 Component 110); and a current sensor device disposed in an electrical path between the first solid-state switch and the second solid-state switch (Figure 1 Component 105), wherein the control circuitry is configured to process current sensor signals from the current sensor device to determine a magnitude of current flow through the solid-state switch (Paragraph 0032 “The output of the load current sensor 105 is input to various circuit blocks of the control circuitry 110 to detect for the occurrence of fault conditions and to detect for abnormal power profiles of the load 20 based, at least in part on, the magnitude and/or the AC waveform characteristics of the detected load current”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Telefus and incorporate a current sensor between the two solid state switches as taught by Casey. The benefit of this design is that the control circuitry can detect abnormal or fault conditions and initiate protection protocols thus protecting circuit components and the load from overcurrent or over voltage situations. Allowable Subject Matter Claims 3 and 5 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Regarding claim 3, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggests wherein the control circuitry comprises a switch driver circuit that is configured to drive the solid-state AC switch with a control voltage that is ground referenced to the common node of the solid-state AC switch. Regarding claim 5, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggests an AC voltage measurement circuit comprising a DC ground node coupled to the common node of the solid-state AC switch, and at least one power input terminal coupled to at least one of a line side and a load side of the solid-state AC switch, wherein the AC voltage measurement circuit is configured to measure the AC voltage at one of the line side and the load side of the solid-state AC switch. Claims 7 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 7, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggests DC-to-DC conversion circuitry configured to convert the DC voltage, which is generated by the power converter circuit, into one or more DC supply voltages that are ground referenced to the common node of the solid-state AC switch. Regarding claim 10, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggests wherein the power converter circuit comprises a peak voltage detection circuit which is configured to monitor the voltage across the storage capacitor and (i) generate a control signal to terminate a charging operation when the voltage across the storage capacitor is determined to reach the maximum DC voltage, and to generate a control signal to initiate a charging operation to recharge the storage capacitor when the voltage across the storage capacitor is determined to drop below a minimum threshold DC voltage. Claims 13-20 are allowed. The following is an examiner’s statement of reasons for allowance: Regarding claim 13, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggests wherein the control circuitry is configured to: determine an occurrence of a transition to a negative half-cycle of the AC power; and in response to determining the occurrence of the transition to the negative half-cycle of the AC power: cause the first solid-state switch to be deactivated to disable the sourcing of the charging current to the output node, in response to determining that the monitored DC voltage at the output node is at a maximum DC voltage or greater than a minimum DC voltage; and cause the first solid-state switch to be activated to enable the sourcing of the charging current to the output node to charge the storage capacitor to the maximum DC voltage, in response to determining that the monitored DC voltage at the output node is at or below the minimum DC voltage. Claims 14-20 depend upon claim 13 and are therefore also allowed. The closest prior art reference to teaching the claim limitations recited in claim 13 was Telefus (WO 2022/031276 A1). Telefus teaches a power converter circuit (Figures 4 and 7; Page 8 Lines 28-29 highlight that Figure 7 is a detailed diagram of Figure 4), comprising: a first terminal and a second terminal (Figure 4 Components 402 and 403) configured to couple to an alternating current (AC) power source which provides AC power (Figure 4 Component 101); a storage capacitor coupled to and between an output node of the power converter circuit and a direct current (DC) node (Figure 7 Component 208); a first solid-state switch disposed in an electrical path between the second terminal and the output node (Figure 7 Components 301+302); and control circuitry configured to control an operation of the first solid-state switch for sourcing a charging current from the AC power (Figure 7 Component 107), which flows from the second terminal to the output node (Figures 8A-9 show the different modes of operation), to charge the storage capacitor and generate a DC voltage at the output node (Figure 8B; Page 10 Lines 6-7 “charging capacitor 208 to the voltage determined by the threshold voltage of MOSFET 503”). Telefus did not teach the DC ground connection and wherein the control circuitry is configured to: determine an occurrence of a transition to a negative half-cycle of the AC power; and in response to determining the occurrence of the transition to the negative half-cycle of the AC power: cause the first solid-state switch to be deactivated to disable the sourcing of the charging current to the output node, in response to determining that the monitored DC voltage at the output node is at a maximum DC voltage or greater than a minimum DC voltage; and cause the first solid-state switch to be activated to enable the sourcing of the charging current to the output node to charge the storage capacitor to the maximum DC voltage, in response to determining that the monitored DC voltage at the output node is at or below the minimum DC voltage. Banak teaches a solid state switch (Figure 1), comprising: a first solid-state switch (Figure 1 Component 6) and a second solid-state switch (Figure 1 Component 7) which are coupled back-to-back (Figure 1 Components 6 and 7 have source terminals connected thus making them in a back-to-back configuration) to a common node of the solid-state (Figure 1 Component 8), wherein the common node is connected to ground (Col. 1 Lines 64-68 highlights that Component 8 is connected to ground through Component 9) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Telefus and grounding the common node of the solid-state switches as taught by Banak. The advantage of grounding the common node is that the converter becomes ground referenced as well as the circuit thus reducing the need for floating drivers and converters which reduces the gate-drive complexity and also adds the benefit of allowing for better feedback control parameters thus enhancing the efficiency of the switching behavior. However, the combination of Telefus and Banak did not teach wherein the control circuitry is configured to: determine an occurrence of a transition to a negative half-cycle of the AC power; and in response to determining the occurrence of the transition to the negative half-cycle of the AC power: cause the first solid-state switch to be deactivated to disable the sourcing of the charging current to the output node, in response to determining that the monitored DC voltage at the output node is at a maximum DC voltage or greater than a minimum DC voltage; and cause the first solid-state switch to be activated to enable the sourcing of the charging current to the output node to charge the storage capacitor to the maximum DC voltage, in response to determining that the monitored DC voltage at the output node is at or below the minimum DC voltage. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Telefus (US 2020/0366079 A1) teaches a circuit breaker includes a solid-state switch, a sense resistor, a current detection circuit, and a switch control circuit. The solid-state switch and sense resistor are connected in series in an electrical path between a line input terminal and a load output terminal of the circuit breaker. The current detection circuit is configured to (i) sample a sense voltage that is generated across the sense resistor in response to load current flowing through the sense resistor, (ii) detect an over-current fault condition based on the sampled sense voltage, and (iii) output a fault detection signal in response to detecting the over-current fault condition. The switch control circuit is configured to control the solid-state switch, wherein the switch control circuit is configured to switch-off the solid-state switch in response to the fault detection signal output from the current detection circuit. Hu (US 2018/0313873 A1) teaches a method for sensing current flowing in a power transistor of a switch mode converter, in which a voltage is sensed across a first field effect transistor connected in a series circuit branch in parallel with the power transistor, and the sensed voltage is used to generate output signal to indicate the current flowing in the power transistor. Mauder (DE 102013106798 A1) teaches a sensing current flowing in a bidirectional solid-state switch has first and second power field effect transistors that are antiserially electrically connected together. Each of the first and second power field effect transistors has a source region, a drain region, a body region forming a pn junction with the source region and having an inversion channel, a gate, a drift region between the body region and the drain region and having an accumulation channel region, and a drift control area adjacent to the accumulation channel area. The accumulation channel region may be controlled by the drift control region. The bidirectional solid state switch further includes a controller connected to the gate terminals of the first and second power field effect transistors. Carmen (US 8334663 B2) teaches a load control device adapted to be coupled between an AC power source and an electrical load for controlling the power delivered to the load includes a power supply having an energy storage capacitor and a charge pump circuit adapted to conduct an input charging current through the load and to conduct an output charging current through the energy storage capacitor to thus generate a DC supply voltage across the energy storage capacitor, where the output charging current has a magnitude greater than the input charging current. The charge pump circuit includes a switched capacitor operable to charge through the load during a first half-cycle, and to discharge into the energy storage capacitor in a second, subsequent half-cycle. The charge pump circuit operates at line frequency and the magnitude of the input charging current is substantially small so as to avoid generating noise in a noise-sensitive circuit of the load control device. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Shahzeb K. Ahmad whose telephone number is (571)272-0978. The examiner can normally be reached Monday - Friday 8 A.M. to 5 P.M.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V. Tran can be reached at 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Shahzeb K Ahmad/Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Jun 14, 2024
Application Filed
Jan 29, 2026
Non-Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Expected OA Rounds
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Grant Probability
84%
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2y 4m
Median Time to Grant
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