DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are present for examination.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception without significantly more. The claim(s) recite(s) abstract idea.
MPEP 2106 III provides a flowchart for the subject matter eligibility test for product and processes. The claim analysis following the flowchart is as follows:
Regarding claim 1, it recites:
A method comprising: recording ray traversal data for a frame during execution of a ray tracing application at a processor; generating tokens representative of the ray traversal data; and saving the tokens at a memory.
Step 1: Is the claim to a process, machine, manufacture or composition of matter?
Yes. It recites a method, which is a process.
Step 2A, Prong One: Does the claim recite an abstract idea, law of nature, or nature phenomenon?
Yes.
The step “generating tokens representative of the ray traversal data” can be interpreted as mental process because a person can look at the ray traversal data and generate tokens representative of the ray traversal data mentally or use simple aids such as pen and paper as ray traversal data can simply be data related to a ray and/or primitives. It can also be interpreted as mathematical concept because tokens can be mathematical representations such as a mathematical value.
Step 2A, Prong Two: Does the claim recite additional elements that integrate the judicial exception into a practical application?
No.
The step “recording ray traversal data for a frame during execution of a ray tracing application at a processor” can be interpreted as an additional element. However, recording data is an insignificant extra solution of data gathering. Therefore, it does not integrate the abstract idea into practical application.
The step “saving the tokens at a memory” can be interpreted as an additional element. However, saving data at a memory is an insignificant extra solution of storing data. Therefore, it does not integrate the abstract idea into practical application.
Therefore, this judicial exception is not integrated into a practical application because the additional elements recited in the claim are insignificant extra solutions.
Step 2B: Does the claim recite additional elements that amount to significantly more than the judicial exception?
No.
As discussed above, the additional elements recited in the claim are insignificant extra solutions. Therefore, they do not amount to significantly more than the abstract idea recited in the claim.
Therefore, the claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Therefore, claim 1 is not eligible subject matter under 35 USC 101.
Regarding claim 2, it depends from claim 1 and further recites wherein the tokens represent characteristics of one or more rays in a ray dispatch comprising a plurality of rays cast for the frame and ray dispatch metadata.
The tokens representing characteristics of rays merely further limits the token value, which is still mathematical concept. Therefore, claim 2 does not recites any additional elements that can integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 2 is not eligible subject matter under 35 USC 101.
Regarding claim 3, it depends from claim 1 and further recites an additional element instructing a driver of a parallel processor executing the ray tracing application to write outputs of a ray dispatch to the memory.
Instructing a driver to write outputs to the memory is an additional element but still an insignificant extra solution of outputting data. Therefore, it cannot integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 3 is not eligible subject matter under 35 USC 101.
Regarding claim 4, it depends from claim 1 and further recites wherein recording the ray traversal data for the frame is in response to receiving a user input indicating the frame.
Recording data in response to receiving user input is an additional element but still an insignificant extra solution of data gathering. Therefore, it cannot integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 4 is not eligible subject matter under 35 USC 101.
Regarding claim 5, it depends from claim 1 and further recites further comprising: parsing the tokens; and reconstructing the ray traversal data for the frame based on the parsed tokens.
Parsing the tokens can be interpreted as a mental process because a person can parse the tokens mentally.
Reconstructing the ray traversal data based on the parsed tokens can also be interpreted as a mental process because a person can reconstruct the ray traversal data mentally based on the parked tokens or using simple tools such as pen and paper.
Therefore, claim 5 does not recites any additional elements that can integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 5 is not eligible subject matter under 35 USC 101.
Regarding claim 6, it depends from claim 5 and further recites further comprising: indexing the reconstructed ray traversal data for statistical sorting.
Indexing and statistical sorting are mathematical concepts involving mathematical calculations and relationship.
Therefore, claim 6 does not recites any additional elements that can integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 6 is not eligible subject matter under 35 USC 101.
Regarding claim 7, it depends from claim 5 and further recites further comprising: generating a visualization of the reconstructed ray traversal data as a heat map.
Generating a visualization of the reconstructed ray traversal data as a heat map can be interpreted as mental process because such visualization can be done mentally with the aid of pen and paper.
Therefore, claim 7 does not recites any additional elements that can integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 7 is not eligible subject matter under 35 USC 101.
Regarding claim 8, it depends from claim 5 and further recites further comprising: generating a visualization of at least one of: ray origin, direction and hit locations, and acceleration structures for a ray dispatch comprising a plurality of rays cast for the frame based on the reconstructed ray traversal data.
Generating a visualization of ray origin, direction and hit locations can be interpreted as mental process because such visualization can be done mentally with the aid of pen and paper.
The accelerate structures can be interpreted as mathematical concept because it involves mathematical representations of data structures.
Therefore, claim 8 does not recites any additional elements that can integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 8 is not eligible subject matter under 35 USC 101.
Regarding claim 9, it depends from claim 5 and further recites further comprising: generating a visualization of a shader binding table corresponding to ray hit results and invocations based on the reconstructed ray traversal data.
Generating a visualization of a shader binding table can be interpreted as mental process because such visualization can be done mentally with the aid of pen and paper.
Therefore, claim 9 does not recites any additional elements that can integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 9 is not eligible subject matter under 35 USC 101.
Regarding claim 10, it depends from claim 5 and further recites further comprising: generating a visualization of a hierarchy of ray invocations and timelines based on the reconstructed ray traversal data.
Generating a visualization of a hierarchy of ray invocations and timelines can be interpreted as mental process because such visualization can be done mentally with the aid of pen and paper.
Therefore, claim 10 does not recites any additional elements that can integrate the abstract idea into practical application or amount to significantly more to the abstract idea.
Therefore, claim 10 is not eligible subject matter under 35 USC 101.
Regarding claim 11, it recites similar limitations of claim 1 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 11 similar to claim 1 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 11 is not eligible subject matter under 35 USC 101.
Regarding claim 12, it recites similar limitations of claim 2 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 12 similar to claim 2 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 12 is not eligible subject matter under 35 USC 101.
Regarding claim 13, it recites similar limitations of claim 3 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 13 similar to claim 3 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 13 is not eligible subject matter under 35 USC 101.
Regarding claim 14, it recites similar limitations of claim 4 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 14 similar to claim 4 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 14 is not eligible subject matter under 35 USC 101.
Regarding claim 15, it recites similar limitations of claim 5 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 15 similar to claim 5 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 15 is not eligible subject matter under 35 USC 101.
Regarding claim 16, it recites similar limitations of claim 6 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 16 similar to claim 6 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 16 is not eligible subject matter under 35 USC 101.
Regarding claim 17, it recites similar limitations of claim 7 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 17 similar to claim 7 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 17 is not eligible subject matter under 35 USC 101.
Regarding claim 18, it recites similar limitations of claim 8 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 18 similar to claim 8 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 18 is not eligible subject matter under 35 USC 101.
Regarding claim 19, it recites similar limitations of claims 9 and/or 10 but in a processing system form. It recites additional element of memory and parallel processor. However, memory and parallel processor are generic computer components that do not integrate the abstract idea recited in claim 19 similar to claims 9 and/or 10 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 19 is not eligible subject matter under 35 USC 101.
Regarding claim 20, it recites similar limitations of claim 1 but in a non-transitory computer readable medium form. It recites additional element of non-transitory computer readable medium. However, non-transitory computer readable media are generic computer components that do not integrate the abstract idea recited in claim 20 similar to claim 1 into practical application or amount to significantly more to the abstract idea.
Therefore, claim 20 is not eligible subject matter under 35 USC 101.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 5, 8, 11-13, 15, 18, and 20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US Patent Publication No. 20250022208 A1 to Bruce.
Regarding claim 1, Bruce discloses A method (Bruce, Abstract) comprising:
recording ray traversal data for a frame during execution of a ray tracing application at a processor (Bruce, para. [0020], disclosing performing ray tracing to generate a render output such as a frame for display that represents a view of a scene comprising one or more objects, para. [0024], disclosing the ray tracing circuit makes use of a test (traversal) record to manage traversal and testing operations, whenever it is determined that a ray intersects a given volume, an indication that the volume is intersected is pushed (added) to the test record for the traversal operation);
generating tokens representative of the ray traversal data (Bruce, para. [0025], disclosing the ray tracing circuit generates test (traversal) record entries, para. [0029], disclosing storing distance data respective of one or more test record entries, para. [0039], disclosing a distance to a volume may be represented by a combination of an exponent and a mantissa, indicating the test record entries and/or the distance data can correspond to tokens representative of the ray traversal data being generated by the ray tracing circuit); and
saving the tokens at a memory (Bruce, para. [0025], disclosing the ray tracing circuitry stores the generated test record entries in the storage, the records may be stored in the form of a suitable stack, may use registers to store the top entry of the stack, and use RAM to store other entries of the stack, para. [0029], disclosing storing distance data respective of one or more test record entries).
Regarding claim 2, Bruce discloses the method of claim 1, wherein the tokens represent characteristics of one or more rays in a ray dispatch comprising a plurality of rays cast for the frame and ray dispatch metadata (Bruce, para. [0025], disclosing the ray tracing circuit generates test (traversal) record entries, para. [0027], disclosing each test record being indicative of a test to be performed to trace the ray, storing distance data respective of one or more test record entries, para. [0030], disclosing a group of rays being traced together, para. [0042], disclosing tracing a group of plural rays together, indicating the test record entries and/or the respective distance data can be tokens representing characteristics of one or more rays in a group of rays as a ray dispatch and ray dispatch metadata because they are indicative of a test to be performed to trace the ray and the respective distance data corresponding to characteristics of one or more rays and ray dispatch metadata).
Regarding claim 3, Bruce discloses the method of claim 1, further comprising: instructing a driver of a parallel processor executing the ray tracing application to write outputs of a ray dispatch to the memory (Bruce, para. [0042], disclosing tracing a group of plural rays together, para. [0067], disclosing submitting commands and data to a driver for the graphics processor, the driver then cause the graphics processor to render appropriate frames for display and to store those frames in appropriate frame buffers in the main memory, para. [0068], disclosing one rendering process may be ray tracing, para. [0105], disclosing the graphics processor can executes instructions in parallel, indicating a driver for the graphics processor can correspond to a driver of a parallel processor executing the ray tracing application to write rendered frames as outputs of a ray display to the frame buffers in the main memory).
Regarding claim 5, Bruce discloses the method of claim 1, further comprising: parsing the tokens (Bruce, para. [0025], disclosing generating test record entries, storing the generated test record entries, reading the stored test record entries, and processing test record entries, para. [0060], disclosing stacking test record entries for other child nodes, and nodes that are stacked are tested at a later time, indicating reading and processing the stored test record entries can correspond to parsing the tokens); and reconstructing the ray traversal data for the frame based on the parsed tokens (Bruce, para. [0024], disclosing a test record may comprise a list of entries indicating which portions or volumes of a scene have been determined to be intersected by a ray, and may need to be tested against the ray, the record of which volumes contain geometry that might be intersected by a ray can then be read to determine which volumes need to be tested at the nest level, para. [0025], disclosing generating test record entries, storing the generated test record entries, reading the stored test record entries, and processing test record entries, para. [0060], disclosing stacking test record entries for other child nodes, and nodes that are stacked are tested at a later time, indicating reading and processing the stored test record entries can correspond to parsing the tokens, and reconstructing the ray traversal data for the frame such as the intersected portions or volumes of the scene intersected by a ray based on the read and processed entries as parsed tokens).
Regarding claim 8, Bruce discloses the method of claim 5, further comprising: generating a visualization of at least one of: ray origin, direction and hit locations, and acceleration structures for a ray dispatch comprising a plurality of rays cast for the frame based on the reconstructed ray traversal data (Bruce, FIG. 2, showing a visualization of ray origin, direction and hit locations (intersection point)).
Regarding claim 11, it recites similar limitations of claim 1 but in a processing system form. The rationale of claim 1 rejection is applied to reject claim 11. In addition, Bruce discloses a memory and at least one parallel processor (Bruce, FIG. 1, para. [0105]).
Regarding claim 12, it recites similar limitations of claim 2 but in a processing system form. The rationale of claim 2 rejection is applied to reject claim 12. In addition, Bruce discloses a memory and at least one parallel processor (Bruce, FIG. 1, para. [0105]).
Regarding claim 13, it recites similar limitations of claim 3 but in a processing system form. The rationale of claim 3 rejection is applied to reject claim 13. In addition, Bruce discloses a memory and at least one parallel processor (Bruce, FIG. 1, para. [0105]).
Regarding claim 15, it recites similar limitations of claim 5 but in a processing system form. The rationale of claim 5 rejection is applied to reject claim 15. In addition, Bruce discloses a memory and at least one parallel processor, as well as a CPU (Bruce, FIG. 1, para. [0105]).
Regarding claim 18, it recites similar limitations of claim 8 but in a processing system form. The rationale of claim 8 rejection is applied to reject claim 18. In addition, Bruce discloses a memory and at least one parallel processor, as well as a CPU (Bruce, FIG. 1, para. [0105]).
Regarding claim 20, it recites similar limitations of claim 1 but in a non-transitory computer readable medium form. The rationale of claim 1 rejection is applied to reject claim 20. In addition, Bruce discloses a memory as a non-transitory computer readable medium (Bruce, FIG. 1).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bruce in view of US Patent Publication No. 20210209828 A1 to Li et al.
Regarding claim 4, Bruce discloses the method of claim 1. However, Bruce does not expressly disclose wherein recording the ray traversal data for the frame is in response to receiving a user input indicating the frame.
On the other hand, Li discloses performing ray tracing for the frame is in response to receiving a user input indicating the frame (Li, para. [0056], disclosing the user interactively edits a virtual scene while preview image frames are rendered using ray tracing technique, and a refinement phase during which full ray tracing is performed to show the user a final rendered image frame, indicating the user interactively edits the virtual scene for the frame can provide a user input indicating the frame and ray tracing is performed for the frame in response to the user input). Because Bruce discloses recording the ray traversal data for the frame when performing ray tracing (Bruce, para. [0025], disclosing the ray tracing circuit generates test (traversal) record entries, para. [0027], disclosing each test record being indicative of a test to be performed to trace the ray, storing distance data respective of one or more test record entries), combining Bruce and Li would allow receiving user input indicating a frame and recording the ray traversal data for the frame when performing ray tracing to render the frame in response to receiving a user input indicating the frame.
Before the invention was effectively filed, it would have been obvious for a person skilled in the art to combine Bruce and Li. The suggestion/motivation would have been to allow artists to better assess the effects their edits have on rendered image frames, as suggested by Li (see Li, para. [0057]).
Regarding claim 14, it recites similar limitations of claim 4 but in a processing system form. The rationale of claim 4 rejection is applied to reject claim 14. In addition, Bruce discloses a memory and at least one parallel processor (Bruce, FIG. 1, para. [0105]).
Claim(s) 6 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bruce in view of US Patent Publication No. 20090225081 A1 to Keller et al.
Regarding claim 6, Bruce disclose the method of claim 5. However, Bruce does not expressly disclose indexing the reconstructed ray traversal data for statistical sorting.
On the other hand, Keller discloses indexing the ray traversal data for statistical sorting (Keller, para. [0073], disclosing sorting objects and rays, para. [0085], disclosing permutations of rays and objects can be stored as index arrays, para. [0089], disclosing utilizing a construct representing a plurality of objects and tracing a plurality of rays, para. [0092], disclosing executing a computation by bucket sorting objects in object space or rays in ray space, indicating the objects and rays as ray traversal data can be indexed into index arrays, and bucket sorting can be performed the objects and/or rays, which can correspond to statistical sorting. Note that no special definition has been provided for statistical sorting, thus the examiner interpreted the statistical sorting as a general sorting, and bucket sorting can be interpreted as statistical sorting). Because Bruce discloses reconstructed ray traversal data, combining Bruce and Keller would allow indexing the reconstructed ray traversal data for statistical sorting.
Before the invention was effectively filed, it would have been obvious for a person skilled in the art to combine Bruce and Keller. The suggestion/motivation would have been for accelerating the operations, as suggested by Keller (see Keller, paras. [0092]-[0093]).
Regarding claim 16, it recites similar limitations of claim 6 but in a processing system form. The rationale of claim 6 rejection is applied to reject claim 16. In addition, Bruce discloses a memory and at least one parallel processor, as well as a CPU (Bruce, FIG. 1, para. [0105]).
Claim(s) 7 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bruce in view of US Patent Publication No. 20240087211 A1 to Muthler et al.
Regarding claim 7, Bruce discloses the method of claim 5. However, Bruce does not expressly disclose generating a visualization of the reconstructed ray traversal data as a heat map.
On the other hand, Muthler discloses generating a visualization of the ray traversal data as a heat map (Muthler, para. [0084], disclosing using diagnostic tools such as heat maps to decide whether to create alternate root complets for ray tracing traversal, gather test data to make or help make such decisions, para. [0111], disclosing reconstructing primitives based on test traversals such as a heat map, indicating a heat map can be generated to visualize the test traversal data). Because Bruce discloses reconstructed ray traversal data, combining Bruce and Muthler would allow generating a visualization of the reconstructed ray traversal data as a heat map.
Before the invention was effectively filed, it would have been obvious for a person skilled in the art to combine Bruce and Muthler. The suggestion/motivation would have been to structure traversal structures more efficiently, as suggested by Muthler (see Muthler, para. [0111]).
Regarding claim 17, it recites similar limitations of claim 7 but in a processing system form. The rationale of claim 7 rejection is applied to reject claim 17. In addition, Bruce discloses a memory and at least one parallel processor, as well as a CPU (Bruce, FIG. 1, para. [0105]).
Claim(s) 9 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bruce in view of US Patent Publication No. 20190311531 A1 to Stich et al.
Regarding claim 9, Bruce discloses the method of claim 5. However, Bruce does not expressly disclose generating a visualization of a shader binding table corresponding to ray hit results and invocations based on the reconstructed ray traversal data.
On the other hand, Stich discloses generating a visualization of a shader binding table corresponding to ray hit results and invocations based on the ray traversal data (Stich, para. [0009], FIG. 2A, showing relationship between a shader binding table and scene elements, para. [0011], FIG. 3A, showing a shader binding table based in part by object instance and sub-geometry with hit geometry, para. [0013], FIG. 3C showing a shader binding table with sets of shader records having sections indexed by ray type, indicating the FIGs 2A, 3A, and 3C can correspond to visualization of a shader binding table corresponding to ray hit results and invocation based on the ray traversal data). Because Bruce discloses reconstructed ray traversal data, combining Bruce and Stich would allow generating a visualization of a shader binding table corresponding to ray hit results and invocations based on the reconstructed ray traversal data.
Before the invention was effectively filed, it would have been obvious for a person skilled in the art to combine Bruce and Stich. The suggestion/motivation would have been to reduce the computational overhead for maintaining the shader binding and rendering the 3D scenes using ray tracing, as suggested by Stich (see Stich, para. [0005]).
Regarding claim 19, it recites limitations similar to one of the limitations recited in claim 9 or claim 10 but in a processing system form. The rationale of claim 9 rejection is applied to reject claim 19. In addition, Bruce discloses a memory and at least one parallel processor, as well as a CPU (Bruce, FIG. 1, para. [0105]).
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 10, none of the prior art references discloses generating a visualization of a hierarchy of ray invocations and timelines based on the reconstructed ray traversal data.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAIXIA DU whose telephone number is (571)270-5646. The examiner can normally be reached Monday - Friday 8:00 am-4:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kee Tung can be reached at 571-272-7794. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HAIXIA DU/Primary Examiner, Art Unit 2611