DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 8-10 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected method for packaging a surface acoustic wave filter module packaging structure, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/04/2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4 & 7 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Teixeira De Queiros et al. (US 2021/0375707 A1), hereinafter Teix.
Regarding claim 1, Teix discloses, in figure 2, a surface acoustic wave filter module packaging structure, comprising:
a substrate (Para [0039], “substrate 202”),
at least one surface acoustic wave filter chip located on the substrate (Para [0033], “integrated device 204 may include a die…integrated device may include…a surface acoustic wave filter”), the surface acoustic wave filter chip fixed to the substrate by a plurality of first convex structures on a surface of the surface acoustic wave filter chip (Para [0032], “integrated device 204 is coupled to a first surface of the substrate 202 through a plurality of solder interconnects 240”…i.e., first convex structures), a first cavity formed between the surface acoustic wave filter chip and the substrate (Para [0032], “void 242 is located between the integrated device 204 and the first surface of the substrate 202”);
at least one non-filter chip located on the substrate and spaced apart from the surface acoustic wave filter chip (Para [0033], “integrated device 206 may include a die…the integrated device may include…a light emitting diode integrated device, a silicon carbide (SiC) based integrated device, a GaAs based integrated device, a GaN based integrated device, a processor, memory and/or combinations thereof”), the non-filter chip fixed to the substrate by a plurality of second convex structures on a surface of the non-filter chip (Para [0032], “integrated device 206 is coupled to the first surface (e.g., top surface) of the substrate 202 through a plurality of solder interconnects 260”), a second cavity formed between the non-filter chip and the substrate (Para [0032], “void 262 is located between the integrated device 206 and the first surface of the substrate 202”);
a dry film layer (Para [0038], “encapsulation layer 207 may include a mold, a resin and/or an epoxy…a sheet molding process (e.g., vacuum lamination, compression molding) may be used to form the encapsulation layer 207.”…identical to the dry film layer as disclosed in paragraph [0022] of the specification of the instant application) covering the surface acoustic wave filter chip and the non-filter chip (Para [0035], “the encapsulation layer 207 is coupled to, formed and located over the first surface of the substrate 202, the integrated device 204 and the integrated device 206”); and
a plastic sealing layer (encapsulation layer 209 is identical to the plastic sealing layer as disclosed in paragraph [0025] of the specification of the instant application) covering the dry film layer (Para [0041], “encapsulation layer 209 is coupled to, formed and located over the encapsulation layer 207…encapsulation layer 209 may include a mold, a resin and/or an epoxy”).
Regarding claim 2, Teix discloses the surface acoustic wave filter module packaging structure as described in claim 1, and continues to disclose, in figure 2, wherein the dry film layer attaches and covers the surface acoustic wave filter chip and the non-filter chip by vacuum airbag lamination (Para [0038] & [0039], “vacuum lamination…may be used to form the encapsulation layer 207…encapsulation layer 207 is formed over the substrate 202, the integrated device 204 and the integrated device 206”).
Regarding claim 3, Teix discloses the surface acoustic wave filter module packaging structure as described in claim 2, and continues to disclose, in figure 2, wherein the dry film layer is a continuous and a whole protective film (Para [0039], “the encapsulation layer 207 has an approximately uniform thickness, as the encapsulation layer 207 approximately follows the contour of the substrate 202, the integrated device 204 and/or the integrated device 206”…i.e., disclosed as a continuous and whole protective film, see figure 2).
Regarding claim 4, Teix discloses the surface acoustic wave filter module packaging structure as described in claim 2, and continues to disclose, in figure 2, wherein the dry film layer is made of epoxy resin material (Para [0038], “encapsulation layer 207 may include a mold, a resin and/or an epoxy”…i.e., an epoxy resin material).
Regarding claim 7, Teix discloses the surface acoustic wave filter module packaging structure as described in claim 1, and continues to disclose, in figure 2, wherein a solder mask layer is provided between the substrate and the dry film layer (Para [0031], “solder resist layer 224”…provided between the substrate 202 and dry film layer 207), and the solder mask layer is also provided in a position without the first convex structures in the first cavity (solder resist layer 224 is also provided in positions without the first convex structures 240 in the first cavity 242, see figure 2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Tiex in view of Hashimoto et al. (US 2020/0266797 A1), hereinafter Hashimoto.
Regarding claim 5, Tiex discloses the surface acoustic wave filter module packaging structure as described in claim 2, but fails to disclose wherein a thickness of the dry film layer is 40-50 microns.
However, Hashimoto discloses, in figure 1 & 2, wherein a thickness of the dry film layer is 40-50 microns (Para 0059], “the thickness T1 of the first layer 41P…may be 50 μm or less”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the film thickness of Hashimoto in the dry film layer of Tiex, to achieve the benefit of facilitating entry between the dies when separation distance is minimized while reducing the overall height of the packaging structure (Hashimoto, Para [0059]).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Tiex in view of Krueger et al. (US 7,388,281 B2), hereinafter Krueger.
Regarding claim 6, Tiex discloses the surface acoustic wave filter module packaging structure as described in claim 1, but fails to disclose wherein a diameter of each first convex structure is 180-200 microns, and/or the diameter of each second convex structure is 180-200 microns.
However, Krueger discloses, in figure 5A, wherein a diameter of each first convex structure is 180-200 microns, and/or the diameter of each second convex structure is 180-200 microns (Col. 10, Lines 20-25, “electrically conductive connections BU…with a diameter of about 180 .mu.m”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the thickness of Krueger in the convex structures of Tiex, since all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions [i.e., making a design choice so as to facilitate an electrical connection to the dies while maintaining proper mechanical support for the dies in the module packaging structure], and the combination yielded nothing more than predictable results to one of ordinary skill in the art. (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415‐421, 82 USPQ2d 1385).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TYLER J PERENY whose telephone number is (571)272-4189. The examiner can normally be reached M-F 7:30-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lincoln Donovan can be reached at 571-272-1988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TYLER J PERENY/ Examiner, Art Unit 2842