Prosecution Insights
Last updated: April 19, 2026
Application No. 18/744,721

POWER STAGE PROVIDING HIGHER MAGNITUDE CURRENT IN A SWITCHING CONVERTER

Non-Final OA §102
Filed
Jun 17, 2024
Examiner
DE LEON DOMENECH, RAFAEL O
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Shaoxing Yuanfang Semiconductor Co. Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
418 granted / 477 resolved
+19.6% vs TC avg
Moderate +11% lift
Without
With
+11.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
17 currently pending
Career history
494
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
40.4%
+0.4% vs TC avg
§102
39.6%
-0.4% vs TC avg
§112
12.0%
-28.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 477 resolved cases

Office Action

§102
DETAILED ACTION This Office action is in response to the application filed on June 17, 2024. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Inventorship This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on May 23, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Drawings The drawings were filed on June 17, 2024. These drawings are accepted by the Examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Venugopal et al. (U.S. Pub. No. 2022/0393464 A1). In re claim 1, Venugopal discloses (Fig. 1) a switching converter (100) comprising: a power stage (comprising sub power stages 104, 106, 108, 110) operable to drive a current through an inductance in a duration specified by a periodic control signal (Para. 0016-0017); and a phase controller (102) to generate said control signal to cause said power stage to generate a regulated supply voltage (output voltage), wherein said power stage is designed to communicate with said phase controller on a path (Para. 0016-0017), wherein said power stage comprises a first sub-stage and a second sub-stage (sub power stages 104, 106, 108, 110), wherein each of said first sub-stage and said second sub-stage respectively drives a first sub-current and a second sub-current via corresponding inductors in response to said control signal, wherein said corresponding inductors together provide said inductance (Para. 0018-0026), wherein said path is used for communication between said first sub-stage and said phase controller, and then between said second sub-stage and said phase controller in alternate cycles of said control signal (Para. 0018-0026). In re claim 11, Venugopal discloses (Fig. 1) a power stage (comprising sub power stages 104, 106, 108, 110) operable to drive a current through an inductance in a duration specified by a periodic control signal (Para. 0016-0017), wherein said periodic control signal is generated by an external phase controller to cause said power stage to generate a regulated supply voltage (output voltage), wherein said power stage is designed to communicate with said phase controller on a path (Para. 0016-0017), said power stage comprising: a first sub-stage and a second sub-stage (sub power stages 104, 106, 108, 110), wherein each of said first sub-stage and said second sub-stage respectively drives a first sub-current and a second sub-current via corresponding inductors in response to said periodic control signal (Para. 0018-0026), wherein said corresponding inductors together provide said inductance, wherein said path is used for communication between said first sub-stage and said phase controller, and then between said second sub-stage and said phase controller in alternate cycles of said periodic control signal (Para. 0018-0026). Allowable Subject Matter Claims 2-10 and 12-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding to claim 2, the prior art of record fails to disclose or suggest “wherein said path is used to communicate a magnitude of current provided by said power stage, wherein each of said first sub-stage and said second sub-stage is designed to indicate on said path twice a magnitude of each of said first sub-current and said second sub-current respectively in corresponding alternate cycles of said control signal” in combination with other limitations of the claim. Claims 3-10 depend directly or indirectly from claim 2 and are, therefore, also objected at least for the same reasons set above. Regarding to claim 12, the prior art of record fails to disclose or suggest “wherein said path is used to communicate a magnitude of current provided by said power stage, wherein each of said first sub-stage and said second sub-stage is designed to indicate on said path twice a magnitude of each of said first sub-current and said second sub-current respectively in corresponding alternate cycles of said control signal” in combination with other limitations of the claim. Claims 13-20 depend directly or indirectly from claim 12 and are, therefore, also objected at least for the same reasons set above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAFAEL O. DE LEÓN DOMENECH whose telephone number is (571)270-0517. The examiner can normally be reached 8:00 a.m. -5:00 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hammond Crystal can be reached at (571) 270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RAFAEL O DE LEON DOMENECH/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Jun 17, 2024
Application Filed
Feb 07, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+11.3%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 477 resolved cases by this examiner. Grant probability derived from career allow rate.

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