DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/05/2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 2, 4-8 and 10-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. U.S. Patent Publication No. 2022/0293507 (hereinafter Lim) in view of Mathieu et al. U.S. Patent Publication No. 2022/0215220 (hereinafter Mathieu) and further in view of Atsumi et al. U.S. Patent No. 5,736,781 (hereinafter Atsumi).
Consider claim 1, Lim teaches a fingerprint sensor package (Figure 1) comprising: a substrate including a plurality of first sensing patterns spaced apart from each other in a first direction and extending in a second direction, intersecting the first direction (Figure 9, 227T, 225R, 216), and a plurality of second sensing patterns spaced apart from each other in the second direction and extending in the first direction (Figure 9, 227T, 225R, 216, see also figure 2a); a controller chip electrically connected to the substrate and disposed below the substrate (Figure 9, 310); an encapsulant covering the controller chip and disposed below the substrate (Figure 9, 370); and a plurality of electrical connection structures disposed below the substrate and contacting the encapsulant (Figure 9, 221B), wherein at least one of the plurality of electrical connection structures is exposed from the encapsulant in a direction from a direction in which the plurality of electrical connection structures and the substrate face each other (Figure 9, 221B and 370) and wherein the substrate further includes a ground pattern disposed adjacent to the plurality of first sensing patterns and the plurality of second sensing patterns in the first direction (Figure 9, 227G, 227T and 225R), covered in a protective layer (Figure 9, 219), and configured to provide a reference potential for a fingerprint sensing [0076], and wherein entire upper surfaces of the plurality of second sensing patterns and an entire upper surface of the ground pattern are in direct contact with the protective layer (Figure 9, 227G, 227T and 219).
Lim does not appear to specifically disclose wherein each of the plurality of electrical connection structures includes a pad disposed on a lower surface of the substrate, and a solder disposed on a lower surface of the pad, a side surface of the substrate, a side surface of the pad, and a side surface of the solder form a coplanar surface with each other.
However, in a related field of endeavor, Mathieu teaches a smart card (abstract) and further teaches solder material on the connection pads in [0059]. In addition, Mathieu teaches wherein each of the plurality of electrical connection structures includes a pad disposed on a lower surface of the substrate (Figure 4, pad 7, substrate 101), and a solder disposed on a lower surface of the pad (Figure 4 and [0059-0060], elements 6 and 10), a side surface of the substrate, a side surface of the pad, and a side surface of the solder form a coplanar surface with each other (Figure 4, elements 6-7, 10 and 101).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a solder material as taught by Mathieu use solder materials with a low melting temperature makes it possible to use a thermode 400 with a smaller carrier surface, thereby possibly helping to better control creep and to limit risks of deformation of the card 1 and/or of the module 4 as suggested in [0072]. Further, one would have been motivated to select a shape of a solder or a connection pad in order to be compatible to each other as suggested in [0059].
Lim does not appear to specifically disclose a direction different and a lower surface of the solder and a lowest surface of the encapsulant form a coplanar surface with each other.
However, in a related field of endeavor, Atsumi teaches an IC module and IC chip (abstract) and further teaches a direction different (Figures 1-2 and 5, column 3, lines 21-25: a plurality of side surface contact terminals 111 to 116, which are extended from a plurality of surface contact terminals 101 to 106, are formed on the frame member 12 forming the confronted side surfaces of the insulator) since the terminals 111-116 are located on the side surface. In addition, the combination of Mathieu and Atsumi teaches a lower surface of the solder and a lowest surface of the encapsulant form a coplanar surface with each other (Atsumi teaches contact terminal 112/102 and lowest surface of encapsulant 10 form a coplanar surface in figures 1-2; Mathieu teaches solder 6 and 10 for connection).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a module with side contacts in addition to surface contacts as taught by Atsumi in figure 1 with the benefit that this IC module is used by an IC card prescribed by a standard of an international organization for standardization as suggested in column 2, lines 65-67. In addition, data is input to the control portion 31 from the surface contact terminals 101 to 106 or contact terminals 111 to 116 as suggested in column 3, lines 50-52. Furthermore, since the anisotropic conductive film 200 is interposed between the IC module 1 and card substrate 40, the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Consider claim 2, Lim, Mathieu and Atsumi teach all the limitations of claim 1. In addition, Lim teaches wherein one side portion and another side portion of the at least one of the plurality of electrical connection structures are asymmetrical to each other (Figure 9, see plurality of 221B).
Consider claim 4, Lim, Mathieu and Atsumi teach all the limitations of claim 1.
Lim does not appear to specifically disclose an anisotropic conductive film disposed on at least a portion of the coplanar surface.
However, Atsumi teaches an anisotropic conductive film disposed on at least a portion of the coplanar surface (Figures 6-8, column 5, lines 40-46, anisotropic conductive film 200, contact terminals 111-116).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide an anisotropic film as taught by Atsumi with the benefit that the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Consider claim 5, Lim, Mathieu and Atsumi teach all the limitations of claim 1. In addition, Lim teaches the at least one of the plurality of electrical connection structures that is exposed from the encapsulant (Figure 9, 221b and 370).
Lim does not appear to specifically disclose an anisotropic conductive film contacting a surface of the at least one of the plurality of electrical connection structures.
However, Atsumi teaches an anisotropic conductive film contacting a surface of the at least one of the plurality of electrical connection structures (Figures 6-8, column 5, lines 40-46, anisotropic conductive film 200, contact terminals 111-116).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide an anisotropic film as taught by Atsumi with the benefit that the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Consider claim 6, Lim, Mathieu and Atsumi teach all the limitations of claim 1.
Lim does not appear to specifically disclose wherein at least a portion of each of the plurality of electrical connection structures has a melting point lower than a melting point of each of the plurality of first and second sensing patterns.
However, in a related field of endeavor, Mathieu teaches a smart card (abstract) and further teaches solder material on the connection pads in [0059]. Thus, the combination teaches wherein at least a portion of each of the plurality of electrical connection structures has a melting point lower than a melting point of each of the plurality of first and second sensing patterns (Mathieu: [0057], [0072], the solder material 6 is a tin-bismuth or tin-bismuth-silver alloy. Lim: [0051], 125R and 127T (e.g. copper)).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a solder material as taught by Mathieu use solder materials 6, 206 with a low melting temperature makes it possible to use a thermode 400 with a smaller carrier surface, thereby possibly helping to better control creep and to limit risks of deformation of the card 1 and/or of the module 4 as suggested in [0072]).
Consider claim 7, Lim, Atsumi and Mathieu teach all the limitations of claim 6. In addition, Mathieu teaches wherein each of the plurality of electrical connection structures comprises: a pad disposed on the substrate (Figure 4, pad 7); and a solder disposed on the pad and having a melting point lower than a melting point of the pad (Figure 4 and [0071], solder material 6 with a low melting point. Lim teaches in [0051], conductive patterns made of copper, aluminum), see motivation to combine in claim 6.
Consider claim 8, Lim, Atsumi and Mathieu teach all the limitations of claim 7.
Lim does not appear to specifically disclose wherein each of the plurality of electrical connection structures further comprises: a conductive post extending from one surface of the pad in a direction away from the substrate and connected between the pad and the solder.
However, Mathieu teaches wherein each of the plurality of electrical connection structures further comprises: a conductive post extending from one surface of the pad (Figure 4 and 6, post 10 and pad 7) in a direction away from the substrate and connected between the pad and the solder (Figure 4, solder 6, 206; substrate 101).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide conductive post in order to allow better adhesion of the paste or better performance in terms of electrical conductivity of the anisotropic conductive film 6′ on the connection pads 7 as suggested in [0059].
Consider claim 10, Lim, Mathieu and Atsumi teach all the limitations of claim 1.
Lim does not appear to specifically disclose wherein a height of the at least one of the plurality of electrical connection structures is larger than a thickness of the controller chip.
However, Atsumi teaches wherein a height of the at least one of the plurality of electrical connection structures is larger than a thickness of the controller chip (Figure 2, 112 and 30).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a module with side contacts as shown in figure 2 with the benefit that this IC module is used by an IC card prescribed by a standard of an international organization for standardization as suggested in column 2, lines 65-67.
Consider claim 11, Lim, Mathieu and Atsumi teach all the limitations of claim 1. In addition, Lim teaches wherein the plurality of electrical connection structures are arranged to at least partially surround the controller chip (Figure 9, 221b and 310).
Consider claim 12, Lim, Mathieu and Atsumi teach all the limitations of claim 11. In addition, Lim teaches wherein the substrate comprises: an upper insulating layer disposed between the plurality of first sensing patterns and the plurality of second sensing patterns (Figure 9, 227T, 225R and 216); a base layer disposed between the upper insulating layer and the controller chip (Figure 9, 214, 216 and 310); a lower insulating layer disposed between the base layer and the controller chip (Figure 9, 212, 214 and 310); a ground pattern disposed between the lower insulating layer and the base layer and overlapping the controller chip vertically (Figure 9 and [0076]; 223G, 212 and 214); and conductive vias spaced apart from the ground pattern and electrically connecting the plurality of first sensing patterns and the plurality of second sensing patterns to the controller chip (Figure 9, vias located in CR1).
Consider claim 13, Lim, Mathieu and Atsumi teach all the limitations of claim 1. In addition, Lim teaches an edge substrate spaced apart from the substrate (Figure 10E, 500); and a plurality of conductive wires electrically connecting the edge substrate and the substrate to each other (Figure 10E, the connection area 530 for electrically connecting the fingerprint sensor package 10 to other components in the card main body 500 may be arranged in the card substrate 520).
Consider claim 14, Lim, Mathieu and Atsumi teach all the limitations of claim 1. In addition, Lim teaches wherein at least one portion of the plurality of electrical connection structures extends along a surface of the encapsulant (Figure 9, 221b and 370).
Claim(s) 15-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of Atsumi.
Consider claim 15, Lim teaches a fingerprint sensor package (abstract) comprising: a substrate including a plurality of first sensing patterns spaced apart from each other in a first direction and extending in a second direction, intersecting the first direction, and a plurality of second sensing patterns spaced apart from each other in the second direction and extending in the first direction (Figure 9 and figure 2a, 216, 227T, 225R); a controller chip electrically connected to the substrate and disposed below the substrate (Figure 9, 310, contact region CR1-CR3); an encapsulant covering the controller chip and disposed below the substrate (Figure 9, 370); and a plurality of electrical connection structures disposed below the substrate and contacting the encapsulant (Figure 9, 221B), wherein at least one portion of the plurality of electrical connection structures extends along a surface of the encapsulant from a portion, of the plurality of electrical connection structures, that is exposed from the encapsulant (Figure 9, 221B and 370) and wherein the substrate further includes a ground pattern disposed adjacent to the plurality of first sensing patterns and the plurality of second sensing patterns in the first direction (Figure 9, 227G, 227T and 225R), covered in a protective layer (Figure 9, 219), and configured to provide a reference potential for a fingerprint sensing [0076], and wherein entire upper surfaces of the plurality of second sensing patterns and an entire upper surface of the ground pattern are in direct contact with the protective layer (Figure 9, 227G, 227T and 219).
Lim does not appear to specifically disclose wherein each of the plurality of electrical connection structures includes a portion disposed on a lower surface of the encapsulant, and wherein the portion of the each of the plurality of electrical connection structures contacts with the lower surface of the encapsulant.
However, Atsumi teaches wherein each of the plurality of electrical connection structures includes a portion disposed on a lower surface of the encapsulant (Figures 1-2, contact terminal 112/102 and encapsulant 10), and wherein the portion of the each of the plurality of electrical connection structures contacts with the lower surface of the encapsulant (Figures 1-2, contact terminal 112/102 and encapsulant 10).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a module with side contacts in addition to surface contacts as taught by Atsumi in figure 1 with the benefit that this IC module is used by an IC card prescribed by a standard of an international organization for standardization as suggested in column 2, lines 65-67. In addition, data is input to the control portion 31 from the surface contact terminals 101 to 106 or contact terminals 111 to 116 as suggested in column 3, lines 50-52. Furthermore, since the anisotropic conductive film 200 is interposed between the IC module 1 and card substrate 40, the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Consider claim 16, Lim teaches all the limitations of claim 15.
Lim does not appear to specifically disclose an anisotropic conductive film disposed on the at least one portion, of the plurality of electrical connection structures, and extending along a surface of the encapsulant.
However, Atsumi teaches an anisotropic conductive film disposed on the at least one portion, of the plurality of electrical connection structures, and extending along a surface of the encapsulant (Figures 5-7 and column 5, lines 41-47, anisotropic conductive film 200, connection structures 111-116, encapsulant includes area around 14-15 (see also, column 5, lines 27-31, the anisotropic conductive film 200 has hole portions 208 and 204 at positions corresponding to the convex portion 14 and concave portion 15 of the IC module 1).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide an anisotropic film as taught by Atsumi with the benefit that the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Consider claim 17, Lim teaches all the limitations of claim 15.
Lim does not appear to specifically disclose wherein the least one portion of the plurality of electrical connection structures covers a portion of a lower surface of the encapsulant.
However, Atsumi teaches wherein at the least one portion of the plurality of electrical connection structures covers a portion of a lower surface of the encapsulant (Figure 1, 111 and 101 and area below 101).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a module with side contacts in addition to surface contacts as taught by Atsumi in figure 1 with the benefit that this IC module is used by an IC card prescribed by a standard of an international organization for standardization as suggested in column 2, lines 65-67. In addition, data is input to the control portion 31 from the surface contact terminals 101 to 106 or contact terminals 111 to 116 as suggested in column 3, lines 50-52.
Consider claim 18, Lim teaches a device comprising: a device body including a recessed region (Figure 10e, 510); a plurality of terminals arranged in the recessed region (Figure 10e, 530); and a fingerprint sensor package disposed in the recessed region (Figure 10E, 10), wherein the fingerprint sensor package comprises: a substrate including a plurality of first sensing patterns spaced apart from each other in a first direction and extending in a second direction, intersecting the first direction, and a plurality of second sensing patterns spaced apart from each other in the second direction and extending in the first direction (Figure 9 and figure 2a, 216, 227T, 225R); a controller chip electrically connected to the substrate (Figure 9, 310, contact region CR1-CR3); and a plurality of electrical connection structures electrically connected to the plurality of terminals and the substrate (Figure 9 and figure 10e, 221b connected to 530 via 120-130 as suggested in [0050]), and wherein the substrate further includes a ground pattern disposed adjacent to the plurality of first sensing patterns and the plurality of second sensing patterns in the first direction (Figure 9, 227G, 227T and 225R), covered in a protective layer (Figure 9, 219), and configured to provide a reference potential for a fingerprint sensing [0076], and wherein entire upper surfaces of the plurality of second sensing patterns (Figure 9, surfaces of 227T and 219) and an entire upper surface of the ground pattern are in direct contact with the protective layer (Figure 9, surface of 227G and 219).
Lim does not appear to specifically disclose wherein a direction in which the plurality of electrical connection structures and the plurality of terminals face is different from a recess direction of the recessed region.
However, Atsumi teaches wherein a direction in which the plurality of electrical connection structures and the plurality of terminals face is different from a recess direction of the recessed region (Figures 1-5, a plurality of side surface contact terminals 111 to 116, conductive patterns 51-53, hole portion 41).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a module with side contacts in addition to surface contacts as taught by Atsumi in figure 1 with the benefit that this IC module is used by an IC card prescribed by a standard of an international organization for standardization as suggested in column 2, lines 65-67. In addition, data is input to the control portion 31 from the surface contact terminals 101 to 106 or contact terminals 111 to 116 as suggested in column 3, lines 50-52. Furthermore, since the anisotropic conductive film 200 is interposed between the IC module 1 and card substrate 40, the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Consider claim 19, Lim and Atsumi teach all the limitations of claim 18. In addition, Atsumi teaches wherein the recessed region is formed in a shape of a hexahedron (Figure 4, 41), see motivation to combine in claim 18 (e.g. IC module is used by an IC card prescribed by a standard of an international organization for standardization).
Consider claim 20, Lim and Atsumi teach all the limitations of claim 18. In addition, Lim teaches an encapsulant covering the controller chip and contacting the plurality of electrical connection structures (Figure 9, 310, 221b and 370).
Lim does not appear to specifically disclose an anisotropic conductive film in contact with the plurality of electrical connection structures and the plurality of terminals.
However, Atsumi teaches an anisotropic conductive film in contact with the plurality of electrical connection structures and the plurality of terminals (Figures 6-8, column 5, lines 40-46, anisotropic conductive film 200, contact terminals 111-116, conductive pattern portions 51-53).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide an anisotropic film as taught by Atsumi with the benefit that the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument (see new reference, Lim U.S. Patent Publication No. 2022/0293507).
Conclusion
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/ROBERTO W FLORES/Primary Examiner, Art Unit 2621
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