DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. U.S. Patent Publication No. 2022/0293507 (hereinafter Lim) in view of Atsumi et al. U.S. Patent No. 5,736,781 (hereinafter Atsumi).
Consider claim 15, Lim teaches a fingerprint sensor package (abstract) comprising: a substrate including a plurality of first sensing patterns spaced apart from each other in a first direction and extending in a second direction, intersecting the first direction, and a plurality of second sensing patterns spaced apart from each other in the second direction and extending in the first direction (Figure 9 and figure 2a, 216, 227T, 225R); a controller chip electrically connected to the substrate and disposed below the substrate (Figure 9, 310, 216, contact region CR1-CR3); an encapsulant in direct contact with more than one surface of the controller chip and disposed below the substrate (Figure 9, 370, 310 and 216); and a plurality of electrical connection structures disposed below the substrate and contacting the encapsulant (Figure 9, 221B,216 and 370), where at least one portion of the plurality of electrical connection structures is exposed from the encapsulant (Figure 9, 221b and 370), wherein each of the plurality of electrical connection structures includes a portion disposed on and in contact with a lower surface of the encapsulant (Figure 9, 221b and 370), and wherein the substrate further includes a ground pattern disposed adjacent to the plurality of first sensing patterns and the plurality of second sensing patterns in the first direction (Figure 9, 227G, 227T and 225R), covered in a protective layer (Figure 9, 219), and configured to provide a reference potential for a fingerprint sensing [0076], and wherein entire upper surfaces of the plurality of second sensing patterns and an entire upper surface of the ground pattern are in direct contact with the protective layer (Figure 9, 227G, 227T and 219).
Lim does not appear to specifically disclose the portion being disposed lower than the controller chip.
However, Atsumi teaches an IC module and IC chip (abstract) and further teaches the portion being disposed lower than the controller chip (Figures 1-2, 112/102 and 30).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a module with side contacts in addition to surface contacts as taught by Atsumi in figure 1 with the benefit that this IC module is used by an IC card prescribed by a standard of an international organization for standardization as suggested in column 2, lines 65-67. In addition, data is input to the control portion 31 from the surface contact terminals 101 to 106 or contact terminals 111 to 116 as suggested in column 3, lines 50-52. Furthermore, since the anisotropic conductive film 200 is interposed between the IC module 1 and card substrate 40, the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Consider claim 16, Lim teaches all the limitations of claim 15.
Lim does not appear to specifically disclose an anisotropic conductive film disposed on the at least one portion, of the plurality of electrical connection structures, and extending along a surface of the encapsulant.
However, Atsumi teaches an anisotropic conductive film disposed on the at least one portion, of the plurality of electrical connection structures, and extending along a surface of the encapsulant (Figures 5-7 and column 5, lines 41-47, anisotropic conductive film 200, connection structures 111-116, encapsulant includes area around 14-15 (see also, column 5, lines 27-31, the anisotropic conductive film 200 has hole portions 208 and 204 at positions corresponding to the convex portion 14 and concave portion 15 of the IC module 1. Figure 1, encapsulant such as 10).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide an anisotropic film as taught by Atsumi with the benefit that the adhesion of the IC module 1 to the card substrate 40 is improved as suggested in column 6, lines 1-5.
Consider claim 17, Lim teaches all the limitations of claim 15.
Lim does not appear to specifically disclose wherein the least one portion of the plurality of electrical connection structures covers a portion of a lower surface of the encapsulant.
However, Atsumi teaches wherein at the least one portion of the plurality of electrical connection structures covers a portion of a lower surface of the encapsulant (Figure 1, 111 and 101 and area below 101).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a module with side contacts in addition to surface contacts as taught by Atsumi in figure 1 with the benefit that this IC module is used by an IC card prescribed by a standard of an international organization for standardization as suggested in column 2, lines 65-67. In addition, data is input to the control portion 31 from the surface contact terminals 101 to 106 or contact terminals 111 to 116 as suggested in column 3, lines 50-52.
Allowable Subject Matter
Claims 1-2, 4-8, 10-14, 18-20, 23 and 24 are allowed.
The following is an examiner’s statement of reasons for allowance:
Claim 1 is related to a fingerprint sensor package comprising: a substrate including a plurality of first sensing patterns spaced apart from each other in a first direction and extending in a second direction, intersecting the first direction, and a plurality of second sensing patterns spaced apart from each other in the second direction and extending in the first direction; a controller chip electrically connected to the substrate and disposed below the substrate; an encapsulant covering the controller chip and disposed below the substrate; and a plurality of electrical connection structures disposed below the substrate and contacting the encapsulant, wherein at least one of the plurality of electrical connection structures is exposed from the encapsulant in a direction different from a direction in which the plurality of electrical connection structures and the substrate face each other, wherein each of the plurality of electrical connection structures includes a pad disposed on a lower surface of the substrate, and a solder disposed on a lower surface of the pad, wherein a side surface of the substrate, a side surface of the pad, and a side surface of the solder form a first coplanar surface with each other, wherein a lower surface of the solder and a lowest surface of the encapsulant form a second coplanar surface with each other, wherein the substrate further includes a ground pattern disposed adjacent to the plurality of first sensing patterns and the plurality of second sensing patterns in the first direction, covered in a protective layer, and configured to provide a reference potential for a fingerprint sensing, and wherein entire upper surfaces of the plurality of second sensing patterns and an entire upper surface of the ground pattern are in direct contact with the protective layer.
Claim 18 is related to a device comprising: a device body including a recessed region; a plurality of terminals arranged in the recessed region; and a fingerprint sensor package disposed in the recessed region, wherein the fingerprint sensor package comprises: a substrate including a plurality of first sensing patterns spaced apart from each other in a first direction and extending in a second direction, intersecting the first direction, and a plurality of second sensing patterns spaced apart from each other in the second direction and extending in the first direction; a controller chip electrically connected to the substrate; a plurality of electrical connection structures electrically connected to the plurality of terminals and the substrate; and an encapsulant covering the controller chip and contacting the plurality of electrical connection structures, wherein a direction in which the plurality of electrical connection structures and the plurality of terminals face is different from a recess direction of the recessed region, wherein the substrate further includes a ground pattern disposed adjacent to the plurality of first sensing patterns and the plurality of second sensing patterns in the first direction, covered in a protective layer, and configured to provide a reference potential for a fingerprint sensing, wherein entire upper surfaces of the plurality of second sensing patterns and an entire upper surface of the ground pattern are in direct contact with the protective layer, wherein each of the plurality of electrical connection structures includes a pad disposed on a lower surface of the substrate, and a solder disposed on a lower surface of the pad, wherein a side surface of the substrate, a side surface of the pad, and a side surface of the solder form a first coplanar surface with each other, and wherein a lower surface of the solder and a lowest surface of the encapsulant form a second coplanar surface with each other.
Prior arts do not appear to specifically disclose all the above underlined limitations in combination to others limitation in the claim.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant's arguments filed 09/07/2026 have been fully considered but they are not persuasive.
On pages 10-11, Applicant argues that “Lim fails to teach a configuration in which each of the plurality of electrical connection structures includes a portion disposed on and in contact with a lower surface of the encapsulant, relying instead upon Atsumi. The Office Action correlates the claimed encapsulant with the insulator 10 of Atsumi and the claimed electrical connection structures with the surface contact terminal 102 and the side surface contact terminal 112 of Atsumi.” The Office respectfully disagrees for the following reasons.
Lim teaches in figure 9, where at least one portion of the plurality of electrical connection structures 221b is exposed from the encapsulant 370, wherein each of the plurality of electrical connection structures 221b includes a portion disposed on and in contact with a lower surface of the encapsulant 370. Consequently, these arguments have been considered but they are not persuasive.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERTO W FLORES whose telephone number is (571)272-5512. The examiner can normally be reached Monday-Friday, 7am-4pm, EST.
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/ROBERTO W FLORES/Primary Examiner, Art Unit 2621
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