DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
Drawings
The drawings were received on 12/03/2025. These drawings are acceptable.
Response to Arguments
Applicant’s arguments regarding the drawing and specification objections of the previous Office action at page 11 in the remarks filed 3 December 2025 have been considered and are persuasive. The objections to the drawings and specification have been withdrawn in view of Applicant’s amendments.
The double patenting rejection of claim 1 is moot due to Applicant’s cancelation of claim 1. A new double patenting rejection has been applied, herein, below.
The 35 U.S.C. § 101 and 35 U.S.C. § 103 rejections have been withdrawn for the reasons given, below.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Each of claims 2 and 20 recite the term “pre-pending” in the last paragraph of each claim. The term “pre-pending” is not defined or appear in the specification. The term is amenable to multiple reasonable interpretations, namely:
1) already pending/pending (indication of chronology or status)
2) not yet pending (indicating a state before becoming pending)
3) the opposite of “appending” (a term used in computer science).
One person having ordinary skill in the art may not reach the same conclusion as to its meaning as another. This renders the claims indefinite. For purposes of examination and in the interest of compact prosecution, “pre-pending” is interpreted to mean “pending.”
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
U.S. Patent No. 10,380,689.
Claim 2 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 10,380,689. Although the claims at issue are not identical, they are not patentably distinct from each other because each of ‘689 claim 1 and application claim 2 are directed to an electronic exchange system comprising a first physical processing element and a second physical processing element. In both claims, the first processing element manages buy an and sell order queues and identifies a match between a first order in the buy queue and a second order in the sell queue. Both claims describe the second processing element receiving an indication of an event, determining that placing an order is conditioned on that event, and transmitting a command to add the order to the queues. The claims recite the same hardware architecture including a physical databus, direct memory access and direct register access for transporting information directly into the first processing elements memory both claims include adding to an ordered stack of instructions with higher priority than an instruction already pending.
The differences are that orders are received from a remote machine that is not part of the electronic exchange system in claim 1 of the patent and broader more generic “computing device” in claim 2 of the Application. Both claim 1 of the patent and claim 2 of the application recite detecting a match, but Claim 1 of the patent requires the system to execute a trade that fulfills the orders, whereas claim 2 of the application is broader in that matching is required but not execution. Claim 1 of the patent refers to sending an “indication to add the order” whereas claim 2 of the application uses “instruction to add the order” and refers to existing stack items as “pre-pending” instead of pending. “Indication” and “instruction” are interchangeable as are “pending” and “prepending.” Thus, although the claims at issue are not identical, they are not patentably distinct from each other because claim 2 of the present application is generic to the species claimed in Claim 1 of the patent. Accordingly, claim 2 of the application is anticipated by claim 1 of the patent.
U.S. Patent No. US 11,544,790 B2
Similar to the double patenting analysis above for U.S. Patent No. 10,380,689, U.S. Patent No. US 11,544,790 B2 claim 1 claims the same architecture as that found in application claim 2 including a physical data bus with direct memory access for inserting instructions into a memory stack ahead of a pending instruction. Both application claim 2 and patented claim 1 do not require execution of the trade.
Application claim 2 broadens the origin of the orders because it only requires a computing device instead of a remote computing device external to the electronic exchange system. Application claim 2 uses the word “detecting” in place of “determining” both this difference does not result in change of function or structure and thus although the claims at issue are not identical, they are not patentably distinct from each other because claim 2 of the present application is generic to the species claimed in Claim 1 of the patent. Accordingly, claim 2 of the application is anticipated by claim 1 of the patent.
U.S. Patent Nos. US 10,453,130 B2 (System) and US 11250508 B2 (Method).
U.S. Patent No. US 10,453,130 B2
Claim 10 of the ‘130 patent describes an electronic exchange system that includes the same architecture as application claim 2 and describes a multi-processor system connected by a physical data bus where one processor manages buy and sell queues and evaluates matching orders, while another process revies an event indication conditioned upon criteria. Claim 10 requires a physical data bus to communicate information using direct memory access. In addition, viewed in light of claim 14, the patent recites that the interrupt operation involves an indication to add the order to the queue of the second processing element. It would have been obvious to combine claims 10 with claim 14 as adding orders is a routine trading function and claim 14 represents is merely a combination of old elements, and in the combination each element merely would have performed the same function as it did separately, and one of ordinary skill in the art would have recognized that the results of the combination were predictable.
The differences between application claim 2 and the combination of patented claims 10 and 14 are that orders are received from a remote device that is not part of the electronic exchange system, whereas application claim 2 recites a broader more generic “computing device”. Both claim 10 of the patent and claim 2 of the application recite detecting a match, but Claim 10 of the patent requires the system to execute a trade that fulfills the orders, whereas claim 2 of the application is broader in that matching is required but not execution. Claim 10 of the patent refers to sending an “indication to adjust the order” whereas claim 2 of the application uses “instruction to add the order” and refers to existing stack items as “pre-pending” instead of pending. “Indication” and “instruction” are interchangeable as are “pending” and “prepending.” Thus, although the claims at issue are not identical, they are not patentably distinct from each other because claim 2 of the present application is generic to the species claimed in the combination of claims 10 and 14 of the patent. Accordingly, claim 2 of the application is obvious in view of claims 10 and 14 of the patent.
US Patent no. 11250508 B2 (Method)
US 11250508 B2 (Method) recites the method equivalent of the system described in patent ‘130 claims 10 and 14 but in claims 10 and 13. The same rationale for the application of a double patenting rejection of application claim 2 in view of patent ‘130 applies to patent ‘508 because the patented claims are related as process and apparatus for its practice and the method and system claims are indistinct. See MPEP 806.05(e) Process and Apparatus for Its Practice. Accordingly, application claim 2 is rejection on the ground of double patenting in view of claims 10 and 13 of US Patent no. 11250508 B2.
U.S. Patent Nos. US 12333605 B2 (System) and US 11842396 B2 (Method).
U.S. Patent No. US 12333605 B2 (System)
Claim 10 of the '605 patent describes an electronic exchange system that includes the same architecture and method of operation as application claim 2 and describes a multi-processor system connected by a physical data bus where one processor manages buy and sell queues and evaluates matching orders, while another process receives an event indication conditioned upon criteria. Claim 10 requires a physical data bus to communicate information using direct memory access. Both patented claim 10 and application claim 2 receive orders from a computing device (application claim 2) or computing devices (patented claim 10). In addition, viewed in light of claim 14, the patent recites that the interrupt operation involves an indication to add the order to the queue of the second processing element. It would have been obvious to combine claims 10 with claim 14 as adding orders is a routine trading function and claim 14 represents is merely a combination of old elements, and in the combination each element merely would have performed the same function as it did separately, and one of ordinary skill in the art would have recognized that the results of the combination were predictable.
The differences between application claim 2 and the combination of patented claims 10 and 14 are that orders are received from a computing device in application claim 2 and “computing devices” in patent claim 10. Both claim 10 of the patent and claim 2 of the application recite detecting a match but application claim 2 recites detecting a match, whereas claim 10 recites determining whether there is a match. In addition, claim 10 of the patent requires the system to execute a trade that fulfills the orders, whereas claim 2 of the application is broader in that matching is required but not execution. Claim 10 of the patent refers to sending an “indications of orders” whereas claim 2 of the application uses “instruction to add the order” and refers to existing stack items as “pre-pending” instead of pending. “Indication” and “instruction” are interchangeable as are “pending” and “prepending.” Thus, although the claims at issue are not identical, they are not patentably distinct from each other because claim 2 of the present application is generic to the species claimed in the combination of claims 10 and 14 of the patent. Accordingly, claim 2 of the application is obvious in view of claims 10 and 14 of the patent.
U.S. Patent No. US 11842396 B2 (Method)
US 11842396 B2 (Method) recites the method equivalent of the system described in the combination of patent '605 claims 10 and 14 in the combination of patent ‘396 claims 10 and 14. The same rationale for the application of the double patenting rejection of application claim 2 in view of patent '605 applies to patent ‘396 because the patented claims are related as process and apparatus for its practice and the method and system claims are indistinct. See MPEP 806.05(e) Process and Apparatus for Its Practice. Accordingly, application claim 2 is rejection on the ground of double patenting in view of claims 10 and 14 of US Patent no. 11842396 B2.
Note on Subject Matter Eligibility under 35 U.S.C. § 101
Although the claims recite determining that buy orders and sell orders match, a commercial interaction or fundamental economic practice, a 35 U.S.C. § 101 rejection is not applicable because the ordered combination of the claims are directed to an electronic exchange system that involves prioritizing using direct memory access or direct register access that results in technical improvements such as quicker execution as described in the Specification in paragraphs [0119] and [00121]. Accordingly, the claims are patent-eligible under 35 U.S.C. § 101.
Note on How the Claims Distinguish Over the Prior Art
The closet prior art references are as follows:
Duesterwald (US 20030192035 A1), discloses systems and methods for implementing efficient execution transfers between successive translations of stack-based code in a virtual machine environment are including the steps of: defining a global translation convention for translating one or more stack-based code instructions on a register-based environment, the global translation convention specifying a predetermined portion of a stack-based context corresponding to a stack that is to be mapped to one or more registers corresponding to the register-based environment and enforcing the global translation convention for each translation of the one or more stack-based code instructions in the register-based environment.
Nafeh (US 20070233594 A1) discloses a network-based contract trading system electronically accessible by prospective traders. The variable payout contracts are sold and the subsequent resale of contracts, is accepted over the trading system. The accepted contracts are resold and the fee is assessed for settlement of contract.
Mather (US 20070265954 A1) discloses methods, systems mediums and graphical user interfaces for monitoring and trading of financial instruments. According to various embodiments, a graphical user interface (GUI) trading widget for electronic trading of financial instruments is provided which floats translucently over the surface of a price chart dynamically displaying market action. The trading widget enables a trader to specify parameters of an order (e.g., buy, sell, quantity, price, limits, etc.), and enter the order into an electronic exchange. The trading widget can positioned on the chart where the trading widget is most convenient for trade execution and least intrusive on the display of price or other market information.
Walsky (US 20080097893 A1) discloses a computer-based system for exchange order routing over a communication network which includes a client terminal configured to provide an end-user interface between the client terminal and a first server, the interface providing a template for building an order routing strategy including a stipulation string, and to submit one or more orders and the order routing strategy to the first server. A program executable within the communication network to implement the routing strategy by crossing the order on a first electronic exchange, and placing order liquidity on respective second electronic exchanges. A method implements the order routing strategy by receiving an order and a routing strategy containing a stipulation string having parameters of predetermined criteria, a first phase order processing allocates a first order quantity to a crossing location, a second phase order processing allocates a second order quantity to an idle location.
E. Fink, J. Johnson and J. Hershberger, "Fast-paced trading of multi-attribute goods," SMC'03 Conference Proceedings. 2003 IEEE International Conference on Systems, Man and Cybernetics. Conference Theme - System Security and Assurance (Cat. No.03CH37483), 2003, pp. 4280-4287 vol.5, doi: 10.1109/ICSMC.2003.1245657 teaches an exchange system that that identifies the highest-quality order match, arranges items in a priority queue by the quality of unprocessed matches, and keeps track of the age of each order to avoid repetitive search for matches among the same index orders wherein each fill must satisfy certain conditions.
The prior art fails to teach or render obvious the following limitations of independent claim 2 (and claim 20, which contains substantially the same limitations):
An electronic exchange system, comprising: a first physical processing element of an electronic processor, configured to control: adding each order of a plurality of orders, as received from a computing device, and defining a respective side of a trade for a financial instrument, to a respective one of a queue of buy orders and a queue of sell orders for the financial instrument, and detecting a match between at least a first order in the queue of buy orders and a second order in the queue of sell orders; and a second physical processing element of the electronic processor, configured to control: receiving an indication of an occurrence of an event, wherein placement of an order is conditioned on the occurrence, and wherein the order defines the respective side of the trade for the financial instrument, and responsive to receiving the indication, transmitting to the first physical processing element through a physical data bus an instruction to add the order to the respective one of the queue of buy orders and the queue of sell orders ,in which the physical data bus is configured to allow communication of the instruction to add the order from the second physical processing element to the first physical processing element using at least one of direct memory access and direct register access, so as to transport information in a physical local memory location of the second physical processing element directly into a physical local memory location of the first physical processing element where instructions to be executed by the first physical processing element are stored, wherein the instruction to add the order is added to an ordered stack of instructions in a memory to be executed by the first physical processing element, and wherein the instruction to add the order is placed in the stack so as to have a higher priority than at least one second instruction that was pre-pending in the stack before the instruction to add the order was received by the first physical processing element, such that the instruction to add the order is executed before executing the at least one second instruction.
When considered as a whole, at the time of invention, one of ordinary skill in the art would not have arrived at the Applicant’s claimed invention unless one was using the invention as a roadmap to find its prior art components. Such use of hindsight to arrive at the claimed invention would be impermissible.
All of the dependent claims 3-19, directly or indirectly, depend from claim 2; and so, are not taught or rendered obvious by the prior art for the same reason.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 20100293353 (Sonnier, D.P. et al) (Task queuing in a network communications processor architecture wherein a source processing core sends a new task to a destination processing core)
US 20070277021 A1 to (O’Connor, M.) (teaches a stack-based virtual machine)
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BOLKO HAMERSKI whose telephone number is (571)270-7621. The examiner can normally be reached Monday-Friday 10:00 AM to 6:00 PM.
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BOLKO HAMERSKI
Examiner
Art Unit 3694
/BOLKO M HAMERSKI/Examiner, Art Unit 3694
/BENNETT M SIGMOND/Supervisory Patent Examiner, Art Unit 3694
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