DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Claims 1-2, 4-9 and 11-19 still pending.
Claims 3 and 10 were cancelled.
Response to Arguments
Applicant's arguments filed 7/9/2026 have been fully considered but they are not persuasive. Argument regarding Johnson not disclosing “wherein the setting the dead time according to the detection result of the detecting the voltage of the high-frequency inductor includes setting the dead time in response to a rising edge or a falling edge of the voltage of the high-frequency inductor being detected” is not persuasive. Johnson discloses, as pointed in the previous office action, setting a dead time according to a detection result of the detecting the voltage (i.e., V1) (Fig. 1) of the high-frequency inductor (i.e., Ls, Lm) (Fig. 1); and turning on the second switching element (i.e., Q2) (Fig. 1) based on the dead time. Therefore, by detecting the voltage, more particularly the measured voltage at the voltage input (which includes high-frequency inductor) and comparing the measured voltage with a threshold or predetermined voltage value, the inverter adjusts the dead time value (for example see Fig. 4 and column 7, lines 6-12).
Accordingly, Applicant arguments that the prior art merely retrieves a value from a table and does not determine or adjust dead time based on a detected result is not persuasive. Johnson first detects or measures an operating parameter, such as input voltage, and based on that result, selects an appropriate dead-time value, for example, via a lookup table. The table is simply the implementation mechanism; the decision of which dead-time value to use is still driven by the detected result. As for the second point, with respects to applicant argument concerning the rising and falling edges, Johnson detects and measures an input voltage to be used as dynamic input control variables to achieve feedback control. Therefore when detected voltage increase or decrease the detected transition corresponds to a rising or falling edge.
Applicant’s arguments rely on language solely recited in preamble recitations in claims 1 and 17. When reading the preamble in the context of the entire claim, the recitation dual active bridge converter is not limiting because the body of the claim describes a complete invention and the language recited solely in the preamble does not provide any distinct definition of any of the claimed invention’s limitations. Thus, the preamble of the claim(s) is not considered a limitation and is of no significance to claim construction. See Pitney Bowes, Inc. v. Hewlett-Packard Co., 182 F.3d 1298, 1305, 51 USPQ2d 1161, 1165 (Fed. Cir. 1999). See MPEP § 2111.02.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4-7 and 17-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Johnson et al. US Patent 11191584 (Johnson).
Regarding claim 1, Johnson discloses a method of controlling a dual active bridge converter (i.e., 102) (Fig. 1) including a first full-bridge circuit and a high-frequency inductor (i.e., Ls, Lm) (Fig. 1), the first full-bridge circuit includes a first bridge arm (i.e., Q1, Q2) (Fig. 1) including a first switching element (i.e., Q1) (Fig. 1) and a second switching element (i.e., Q2) (Fig. 1) connected in series, the method comprising:
detecting a voltage (i.e., V1) (Fig. 1) of the high-frequency inductor (i.e., Ls, Lm) (Fig. 1) in response to the first switching element (i.e., Q1) (Fig. 1) being turned off;
setting a dead time according to a detection result of the detecting the voltage (i.e., V1) (Fig. 1) of the high-frequency inductor (i.e., Ls, Lm) (Fig. 1); and turning on the second switching element (i.e., Q2) (Fig. 1) based on the dead time, wherein
the setting the dead time according to the detection result of the detecting the voltage (i.e.,V1) (Fig. 1) of the high-frequency inductor (i.e.,Ls, Lm) (Fig. 1) includes: setting the dead time in response to a rising edge or a falling edge of the voltage of the high-frequency inductor being detected (for example see Fig. 4) .
Regarding claim 4, Johnson discloses, as applied in linking claims, the claimed invention including setting the dead time according to the detection result of the detecting the voltage (i.e., V1) (Fig. 1) of the high-frequency inductor (i.e.,Ls, Lm) (Fig. 1) includes: calculating a time difference between a time instant at which the first switching element (i.e.,Q1) (Fig. 1) is turned off and a time instant at which a rising edge or a falling edge of the voltage (i.e., V1) (Fig. 1) of the high-frequency inductor (i.e.,Ls, Lm) (Fig. 1) is detected in response to the rising edge or the falling edge of the voltage (i.e.,VI) (Fig. 1) of the high-frequency inductor being detected, and determining the time difference as the dead time.
Regarding claim 5, Johnson discloses, as applied in linking claims, the claimed invention including setting the dead time according to the detection result of the detecting the voltage (i.e., V1) (Fig. 1) of the high-frequency inductor further includes: determining whether the time difference is less than a default dead time; and setting the time difference as the dead time in a case that the time difference is less than the default dead time (for example see Fig. 3A-3C).
Regarding claim 6, Johnson discloses, as applied in linking claims, the claimed invention including transmitting a turn-on control signal to the second switching element (i.e., Q2) (Fig. 1) according to the detection result of the detecting the voltage (i.e., V1) (Fig. 1) of the high-frequency inductor.
Regarding claim 7, Johnson discloses, as applied in linking claims, the claimed invention including the first full-bridge circuit further including a second bridge arm (i.e., Q3, Q4) (Fig. 1) connected in parallel with the first bridge arm (i.e., Q1, Q2) (Fig. 1), and the method further comprises: turning on a switching element of the second bridge arm (i.e., Q3, Q4) (Fig. 1) after the dead time, after another switching element of the second bridge arm is turned off.
Regarding claim 17, Johnson discloses an apparatus to control (i.e., 110) (Fig. 1)a dual active bridge converter (i.e., 102) (Fig. 1) including a first full-bridge circuit (i.e., 104) (Fig. 1) and a high-frequency inductor (i.e., Ls, Lm) (Fig. 1), the first full-bridge circuit (i.e., Ls, Lm) (Fig. 1) including a first bridge arm (i.e., Q1, Q2) (Fig. 1) that includes a first switching element (i.e., Q1) (Fig. 1)and a second switching element (i.e., Q2) (Fig. 1) connected in series, the apparatus comprising: a detector to detect a voltage (i.e., V1) (Fig. 1) of the high-frequency inductor in response to the first switching element being turned off;
a setter to set a dead time according to a detection result of the detecting the voltage (i.e., V1) (Fig. 1) of the high-frequency inductor (i.e., Ls, Lm) (Fig. 1); and a controller (i.e., 110) (Fig. 1) configured or programmed to turn on the second switching element (i.e.,Q2) (Fig. 1) based on the dead time.
Regarding claim 18, Johnson discloses, as applied in linking claims, an electronic device (i.e.,110) (Fig.1) comprising: at least one processor (i.e.,112) (Fig.1); and a memory (i.e.,114) (Fig.1) communicatively connected to the at least one processor (i.e.,112) (Fig.1); wherein the memory (i.e.,114) (Fig.1) stores instructions executable by the at least one processor (i.e.,112) (Fig.1), and the instructions, when executed by the at least one processor, are configured to cause the at least one processor to perform the method of claim.
Regarding claim 19, Johnson discloses, as applied in linking claims, a non-transitory computer-readable storage medium including computer instructions therein, wherein the computer instructions are configured to cause a computer to perform the method of claim 1 (for example see column 2, lines 25-45).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 8 is rejected under 35 U.S.C. 103 as being unpatentable over Johnson et al. US Patent 11191584 (Johnson) in view of Chan et. al. US Publication 20220337166.
Regarding claim 8, Johnson, as applied in the linking claims, fail to disclose the dual active bridge converter further including a second full-bridge circuit, and the method further comprises: turning on a switching element of a bridge arm of the second full-bridge circuit after the dead time, after another switching element of the bridge arm of the second full-bridge circuit is turned off.
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Chan, in the same field of endeavor, discloses the dual active bridge converter (i.e., 160) (Fig. 4) further including a second full-bridge circuit (i.e., 30, 32, 34, 36) (Fig. 4), and the method further comprises: turning on a switching element of a bridge arm of the second full-bridge circuit after the dead time, after another switching element of the bridge arm of the second full-bridge circuit is turned off (for example see paragraph 98 and Fig. 9).
Therefore, It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have optionally provide the dual active bridge converter with a second full-bridge circuit, and the method further comprises: turning on a switching element of a bridge arm of the second full-bridge circuit after the dead time, after another switching element of the bridge arm of the second full-bridge circuit is turned off in Johnson, as taught by Chan in order to generate an output voltage or secondary voltage.
Allowable Subject Matter
Claim 2 and 9, 11-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, Johnson discloses a dual active bridge converter (i.e., 102) (Fig. 1) as applied above but fail to disclose, alone or in combination, “the detecting the voltage of the high-frequency inductor includes: detecting, by using a sampling circuit including an inductor coupled with the high-frequency inductor, an induced voltage generated on the inductor as the voltage of the high-frequency inductor” in combination with all recited elements of the linking claims.
Regarding claim 9, Johnson discloses a dual active bridge converter (i.e., 102) (Fig. 1) as applied above but fail to disclose, alone or in combination, “wherein in a case that an operating mode of the dual active bridge converter is a buck mode, the first full-bridge circuit includes a primary side full-bridge circuit, and the first bridge arm includes a leading arm; and in a case that the operating mode of the dual active bridge converter is a boost mode, the first full-bridge circuit includes a secondary side full-bridge circuit, and the first bridge arm includes a leading arm” in combination with all recited elements of the linking claims.
Claim 11-14 are dependent of claim 2.
Claim 15-16 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding 15, Johnson discloses a dual active bridge converter (i.e., 102) (Fig. 1) comprising: a first full-bridge circuit (i.e., 104) (Fig. 1); a high-frequency transformer (i.e., Lm) (Fig. 1); a high-frequency inductor (i.e., Ls) (Fig. 1); and a sampling circuit (i.e., 120) (Fig. 1); wherein the sampling circuit (i.e., 120) (Fig. 1) includes an inductor coupled with the high-frequency inductor, and the inductor is configured to couple with the high-frequency inductor to generate an induced voltage.
Johnson fails to disclose ,alone or in combination, “the sampling circuit including an inductor coupled with the high-frequency inductor, and the inductor is configured to couple with the high-frequency inductor to generate an induced voltage” in combination with all the recited elements of claim 15.
Claim 16 is allowed as being dependent of claim 15.
The Prior art, alone or in combination, fail to disclose “the sampling circuit including an inductor coupled with the high-frequency inductor, and the inductor is configured to couple with the high-frequency inductor to generate an induced voltage”.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. For example, examiner wants to point out that it is well known using measures of voltages (including, but not limited, to a rising edge or a falling edge of a measure voltage on a inductor to determine adjustments in the dead time - see CN 114024437.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/YAHVEH COMAS TORRES/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
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