DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. The following features are absent from the drawings
Claims 8, 19, and 22, “in response to receiving an interrupt from the apparatus, perform further processing of the radar data.”
Claim 21, “the radar sensor comprises a first antenna configured to receive a first signal from a field of view of the radar sensor, wherein the radar sensor is configured to generate the radar data based on the first signal; the radar sensor comprises at least one second antenna configured to receive at least one second signal from the field of view of the radar sensor, wherein the radar sensor is configured to generate second radar data based on the second signal; and the radar system comprises at least one second apparatus according to claim 1 configured to process the second radar data.”
Therefore, the RFFE subcomponents and antenna lengths must be shown or the features canceled from the claims. No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 21 is objected to under 37 CFR 1.75(c) as being in improper form because a multiple dependent claim should refer to other claims in the alternative only. For examination purposes the claim will be interpreted to include an apparatus capable of preforming ordered statistics constant false alarm rate (OS-CFAR) detection. See MPEP § 608.01(n). Accordingly, the claim has not been further treated on the merits.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1-23 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1 and similarly claims 9 and 23, it is not clear of what encompasses and is meant by the limitation “storing, at storage circuitry comprising a plurality of storage segments, address data indicating addresses of data elements of radar data at a further storage circuitry.” A review of the specification sets forth the term ”further storage circuitry.” As claimed the term is excessively broad in nature and the meets and bounds of the claimed term cannot be ascertained by one skilled in the art. It is unclear if the term “further storage circuitry” refers to storage circuitry separate from the aforementioned storage circuitry or that the “address data” is simply handled separately from radar data. Review of the specification reveals on paragraph [0021] “radar data acquired by the radar sensor or radar data derived thereof (e.g., by pre-processing of the raw radar data) is stored, e.g., via a direct-memory access, in a further storage circuitry 130,” paragraph [0027] further discloses “The address data may, e.g., indicate unique identifiers (or indices, pointers or alike) assigned to respective storage locations in the further storage circuitry.” The Examiner cannot find explicit clarification from the specification regarding where the “address data” is stored or if this storage location differs from that of the ”radar data.” It is suggested applicant amend the claims to be consistent with the disclosed “storage circuitry” and clearly disclose what the term application means as it is not clear how the Applicant intends to limit the term based on review of the specification. For examination purposes the term “further storage circuitry” as claimed will be interpreted to mean that “address data” is handled separately from radar data.
Regarding claim 5 and similarly claim 16, it is not clear of what encompasses and is meant by the limitation “removing only partially the address data stored in the storage circuitry.” The term “only partially” is excessively broad in nature and the meets and bounds of the claimed term cannot be ascertained by one skilled in the art. As claimed it is unclear what address data is removed. Review of the specification reveals on paragraph [0062], “Contiguous address data sequences which are to be kept (or all address data subsequent or previous to the address data to be removed) may be jointly shifted by a predefined number of storage segments to overwrite the address data to be removed.” It is suggested applicant amend the claims to be consistent with the disclosed “address data” and clearly disclose what the term application means as it is not clear how the Applicant intends to limit the term based on review of the specification. For examination purposes the term “removing only partially the address data” as claimed will be interpreted to mean that select address data may be removed.
Regarding claim 22, it is not clear of what encompasses and is meant by the limitation “processing circuitry external to the radar sensor.” The term “external” is excessively broad in nature and the meets and bounds of the claimed term cannot be ascertained by one skilled in the art. As claimed it is unclear how the “processing circuity” is connected to the radar sensor. The term “external” suggests that the radar sensor and the “processing circuity” are either separate modules in the same system or that they are kept in two housings separate from each other. Review of the specification reveals on paragraph [0021], “The apparatus 100 may be partially or fully integrated into a radar sensor. Alternatively, the apparatus 100 may be external to the radar sensor.” It is suggested that applicant amend the claims to be consistent with the disclosed “external” and clearly disclose what the term application means as it is not clear how the Applicant intends to limit the term based on review of the specification. For examination purposes the term “external” as claimed will be interpreted to mean that the radar sensor and the “processing circuity” are either separate modules in the same system.
Claims 2-8 and 8-22 are also rejected based on their dependency of the defected parent claim(s).
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-23 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
An invention is patent-eligible if it claims a “new and useful process, machine, manufacture, or composition of matter.” 35 U.S.C. § 101. However, the Supreme Court has long interpreted 35 U.S.C. § 101 to include implicit exceptions: “[l]aws of nature, natural phenomena, and abstract ideas” are not patentable. E.g., Alice Corp. v. CLS Banklnt’l, 573 U.S. 208, 216(2014).
In determining whether a claim falls within an excluded category, we are guided by the Supreme Court’s two-step framework, described in Mayo and Alice. Id. at 217—18 (citing Mayo Collaborative Servs. v. Prometheus Labs., Inc., 566 U.S. 66, 75—77 (2012)).
Step 1 – Statutory Category
Claim 1 (and its dependents) recites a method for ordered statistics constant false alarm rate (OS-CFAR) detection. The claim therefore recites a process.
Claim 9 (and its dependents) recites an apparatus. The claim therefore recites a product.
Claim 23 (and its dependents) recites an apparatus. The claim therefore recites a product.
Step 2A, Prong One — Recitation of Judicial Exception
Step 2A of the 2019 Guidance is a two-prong inquiry. In Prong One, we evaluate whether the claim recites a judicial exception. For abstract ideas, Prong One represents a change as compared to prior guidance because we here determine whether the claim recites mathematical concepts, certain methods of organizing human activity, or mental processes.
Claim 1 and similarly claims 9 and 23 recite,
and performing a sorting algorithm for OS-CFAR detection comprising the steps of: comparing a new data element of the radar data to at least one data element indicated by address data stored in the storage circuitry,
This limitation recites comparing collected information to another data element, which is an act of evaluating information that can be practically performed in the human mind. Thus, this step is an abstract idea in the form of a mental process.
determining a storage segment of the plurality of storage segments at which address data of the new data element is to be stored based on the comparing
This limitation is a process that covers performance of this limitation in the mind by making a judgement regarding where data belongs. Therefore, this limitation recites a mental process, see MPEP 2106.04(a)(2)(III)(A-D).
Claim 5 and similarly claims 16 recite,
performing the sorting algorithm for a first window of data elements of the radar data
This limitation recites comparing collected information to another data element and forming a judgement regarding where data belongs, which are acts of evaluating information that can be practically performed in the human mind. Thus, this step is an abstract idea in the form of a mental process (see specification [0004]).
and performing the sorting algorithm for the second window
This limitation recites comparing collected information to another data element and forming a judgement regarding where data belongs, which are acts of evaluating information that can be practically performed in the human mind. Thus, this step is an abstract idea in the form of a mental process (see specification [0004]).
Claim 7 and similarly claims 18 recite,
comparing the selected data element to a data element under test;
This limitation recites comparing collected information to another data element, which is an act of evaluating information that can be practically performed in the human mind. Thus, this step is an abstract idea in the form of a mental process.
determining a presence of a target or a motion of the target based on the comparing.
This limitation is a process that covers performance of this limitation in the mind by making a judgement regarding presence of a target or a motion of the target. Therefore, this limitation recites a mental process, see MPEP 2106.04(a)(2)(III)(A-D).
Step 2A, Prong Two — Practical Application
If a claim recites a judicial exception, in Prong Two we next determine whether the recited judicial exception is integrated into a practical application of that exception by: (a) identifying whether there are any additional elements recited in the claim beyond the judicial exception(s); and (b) evaluating those additional elements individually and in combination to determine whether they integrate the exception into a practical application.
Claim 1 and similarly claims 9 and 23 also recites,
address data indicating addresses of data elements of radar data at a further storage circuitry
This is a step that merely describes the contents of the data. Therefore this limitation is a mere data gathering, extra solution activity that is understood as merely nominal.
controlling the storage circuitry to shift address data stored at the determined storage segment to another storage segment
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 2 and similarly claim 10 also recites,
controlling the storage circuitry to store the address data of the new data element at the determined storage segment.
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 3 and similarly claim 11 also recites,
controlling the storage circuitry to shift all address data stored in storage segments subsequent or previous to the determined storage segment by a predefined number of storage segments.
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 4 and similarly claim 12 also recites,
performing the sorting algorithm comprises performing an insertion sort for OS-CFAR detection.
An insertion sort for OS-CFAR detection merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 5 and similarly claim 16 also recites,
after the sorting algorithm for the first window is performed, selecting a second window of data elements of the radar data
The limitation is selecting particular data to be manipulated and has been found to be an extra-solution activity that is understood as merely nominal to the claim, see MPEP 2106.05(g)(3).
removing only partially the address data stored in the storage circuitry during performance of the sorting algorithm for the first window
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 6 and similarly claim 17 also recites,
performing the sorting algorithm for the second window by controlling the storage circuitry to exclusively insert address data of data elements of the second window which has not been inserted during performance of the sorting algorithm for the first window.
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 7 and similarly claim 18 also recites,
after performing the sorting algorithm: selecting a data element indicated by address data stored at a predefined storage segment of the plurality of storage segments
The limitation is selecting particular data to be manipulated and has been found to be an extra-solution activity that is understood as merely nominal to the claim, see MPEP 2106.05(g)(3).
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 8 and similarly claim 19 also recites,
in response to determining presence of the target or the motion of the target, sending an interrupt to processing circuitry to trigger further processing of the radar data.
This limitation merely describes when data is manipulated, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 20 also recites,
a radar sensor configured to generate the radar data.
Obtaining radar data is mere data gathering, extra solution activity that is understood as merely nominal.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 21 also recites,
the radar sensor comprises a first antenna configured to receive a first signal from a field of view of the radar sensor, wherein the radar sensor is configured to generate the radar data based on the first signal;
Obtaining radar data is mere data gathering, extra solution activity that is understood as merely nominal.
the radar sensor comprises at least one second antenna configured to receive at least one second signal from the field of view of the radar sensor, wherein the radar sensor is configured to generate second radar data based on the second signal;
Obtaining radar data is mere data gathering, extra solution activity that is understood as merely nominal.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 22 also recites,
the processing circuitry is configured to, in response to receiving an interrupt from the apparatus, perform further processing of the radar data.
This limitation merely describes when data is manipulated, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Viewed as a whole, these additional claim elements do not provide meaningful limitations to transform the abstract idea into a patent eligible application of the abstract idea such that the claims amount to significantly more than the abstract idea itself.
Step 2B — Inventive Concept
For Step 2B of the analysis, we determine whether the claim adds a specific limitation beyond the judicial exception that is not “well-understood, routine, conventional” in the field. See Memorandum.
Claim 1 and similarly claims 9 and 23 also recites,
address data indicating addresses of data elements of radar data at a further storage circuitry
This is a step that merely describes the contents of the data. Therefore this limitation is a mere data gathering, extra solution activity that is understood as merely nominal.
controlling the storage circuitry to shift address data stored at the determined storage segment to another storage segment
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 1 further recites,
storing, at storage circuitry comprising a plurality of storage segments
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2).
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 2 and similarly claim 10 also recites,
controlling the storage circuitry to store the address data of the new data element at the determined storage segment.
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 3 and similarly claim 11 also recites,
controlling the storage circuitry to shift all address data stored in storage segments subsequent or previous to the determined storage segment by a predefined number of storage segments.
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 4 and similarly claim 12 also recites,
performing the sorting algorithm comprises performing an insertion sort for OS-CFAR detection.
An insertion sort for OS-CFAR detection merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 5 and similarly claim 16 also recites,
after the sorting algorithm for the first window is performed, selecting a second window of data elements of the radar data
The limitation is selecting particular data to be manipulated and has been found to be an extra-solution activity that is understood as merely nominal to the claim, see MPEP 2106.05(g)(3).
removing only partially the address data stored in the storage circuitry during performance of the sorting algorithm for the first window
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 6 and similarly claim 17 also recites,
performing the sorting algorithm for the second window by controlling the storage circuitry to exclusively insert address data of data elements of the second window which has not been inserted during performance of the sorting algorithm for the first window.
This limitation merely describes manipulating gathered data, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 7 and similarly claim 18 also recites,
after performing the sorting algorithm: selecting a data element indicated by address data stored at a predefined storage segment of the plurality of storage segments
The limitation is selecting particular data to be manipulated and has been found to be an extra-solution activity that is understood as merely nominal to the claim, see MPEP 2106.05(g)(3).
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 8 and similarly claim 19 also recites,
in response to determining presence of the target or the motion of the target, sending an interrupt to processing circuitry to trigger further processing of the radar data.
This limitation merely describes when data is manipulated, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 9 further recites,
storing, at storage circuitry comprising a plurality of storage segments
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2).
control circuitry comprising a processor and a memory coupled to the processor with instructions stored thereon
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2).
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 13 further recites,
the storage circuitry comprises a parallel shift register coupling the plurality of storage segments in a cascade.
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2).
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 14 further recites,
the plurality of storage segments are coupled to respective multiplexers
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2).
each multiplexer of the multiplexers comprises: a first input node coupled to a respective output node of a first one of a previous storage segment or a subsequent storage segment in the cascade, and a second input node coupled to a data input.
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2).
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 15 further recites,
each multiplexer of the multiplexers further comprises a third input node coupled to a respective output node of a second one of the previous storage segment or the subsequent storage segment in the cascade.
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2).
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 20 also recites,
a radar sensor configured to generate the radar data.
Obtaining radar data is mere data gathering, extra solution activity that is understood as merely nominal.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 21 also recites,
the radar sensor comprises a first antenna configured to receive a first signal from a field of view of the radar sensor, wherein the radar sensor is configured to generate the radar data based on the first signal;
Obtaining radar data is mere data gathering, extra solution activity that is understood as merely nominal.
the radar sensor comprises at least one second antenna configured to receive at least one second signal from the field of view of the radar sensor, wherein the radar sensor is configured to generate second radar data based on the second signal;
Obtaining radar data is mere data gathering, extra solution activity that is understood as merely nominal.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 21 further recites,
the radar system comprises at least one second apparatus according to claim 1 configured to process the second radar data.
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2) and specification [0064-0067].
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 22 also recites,
the processing circuitry is configured to, in response to receiving an interrupt from the apparatus, perform further processing of the radar data.
This limitation merely describes when data is manipulated, therefore this limitation is a mere data gathering, extra-solution activity that is understood as merely nominal to the claim.
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 22 further recites,
processing circuitry external to the radar sensor
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2) and specification [0064-0067].
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Claim 23 further recites,
storage circuitry comprising a plurality of storage segments
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2) and specification [0064-0067].
Control circuitry configured to perform a sorting algorithm for ordered statistics constant false alarm rate (OS-CFAR) detection
Merely performing the above step on a computer in its ordinary capacity for tasks or merely adding a general-purpose computer or computer components after the fact to an abstract idea does not integrate a judicial exception into a practical application or provide significantly more. See MPEP 2106.05(f)(2) and specification [0064-0067].
The combination of these additional elements are no more than mere data gathering in conjunction with the abstract idea in order to provide data for the mental process to be applied to. Therefore, this does not meaningfully limit the claim, see MPEP 2106.05(g)(3).
Since this judicial exception is not integrated into a practical application because the claim requires no more than data gathering steps that collect necessary data for estimating, analyzing, and evaluating and requires no more than a generic computer to perform operations and generic computer functions that are well- understood, routine, and conventional activities.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-7, 9-18, 20 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Abboud(US 5179712 A) in view of RAMALINGAM(US20220155368A1).
Regarding claim 1, Abboud discloses
A method for ordered statistics constant false alarm rate (OS-CFAR) detection (“a number ranking circuit for an OS CFAR detector circuit “ [(Col.2, ll.46-47]), comprising: storing, at storage circuitry comprising a plurality of storage segments (“ranking circuitry is provided which includes a number of identically structured rank cells for storing and ranking sample values” [Col.2, ll.64-66]) address data (FIG.2, Parts RC1-RC8)[…]; and performing a sorting algorithm for OS-CFAR detection comprising the steps of: comparing a new data element of the radar data to at least one data element indicated by address data (“a new sample VIN is added to the rank array RC1 . . . RC8, the new sample VIN is compared to the sample VQ in each of the other rank cells RC1 . . . RC8” [Col.4, ll.58-61]) […], determining a storage segment of the plurality of storage segments at which address data of the new data element is to be stored based on the comparing (“The signals in the rank cells RC1 . . . RC8 are then shifted in a manner such that there exists a vacancy for the new sample VIN “ [Col.4, ll.61-64]), and controlling the storage circuitry to shift address data stored at the determined storage segment to another storage segment (“ all signals are once again ranked in descending order after the new sample VIN has been inserted into the vacant rank cell.” [Col.4, ll.64-66]).
Abboud does not explicitly disclose nor limit wherein the address data indicates the addresses of data elements of radar data stored at a further storage circuitry. RAMALINGAM discloses, address data indicating addresses of data elements of radar data at a further storage circuitry (“sorted index array 622 stores the ranks of the samples of left window 604 and right window 606. Sorted index array 622 indicates the ascending order rank of the samples “ [0054]).
RAMALINGAM teaches in the same field of OS-CFAR systems. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Samuelsson with the teachings of RAMALINGAM to incorporate the features of storing addresses of data elements of radar data at a further storage circuitry so as to gain the advantage of reducing hardware costs [0022, RAMALINGAM]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 2, Abboud as modified by RAMALINGAM discloses all the limitations of claim 1. Abboud discloses the method further comprising, controlling the storage circuitry to store the address data of the new data element at the determined storage segment (“ the input sample value VIN, the sample value VQN stored in the next succeeding rank cell RC(N+1)” [Col.6, ll.5-7]).
Regarding claim 3, Abboud as modified by RAMALINGAM discloses all the limitations of claim 1. Abboud discloses the method further comprising, controlling the storage circuitry to shift all address data stored in storage segments subsequent or previous to the determined storage segment by a predefined number of storage segments (“The signals in the rank cells RC1 . . . RC8 are then shifted in a manner such that there exists a vacancy for the new sample VIN such that all signals are once again ranked in descending order after the new sample VIN has been inserted into the vacant rank cell” [Col.4, ll.61-66]).
Regarding claim 4, Abboud as modified by RAMALINGAM discloses all the limitations of claim 1. Abboud discloses wherein performing the sorting algorithm comprises performing an insertion sort for OS-CFAR detection (“the insertion of "38" into the window and the extraction of "59" from the window” [Col.4, ll. 21-25] & FIG.2).
Regarding claim 5, Abboud as modified by RAMALINGAM discloses all the limitations of claim 1. Abboud discloses the method further comprising: performing the sorting algorithm for a first window of data elements of the radar data (“The input VIN is the sample entering the sorting window. The VIN input is provided to each rank cell RC1 . . . RC8 on a respective line 15” [Col.3, ll.34-36]); after the sorting algorithm for the first window is performed, selecting a second window of data elements of the radar data (“The rank cells RC1 . . . RC8 may be cleared or reset by placing a sample value of zero in each rank cell RC1 . . . RC8. To build up the window size after such a reset, as shown in FIG. 4, video samples must be inserted into the window one at a time, while at the same time extracting zero amplitude samples.” [Cpl.4, ll.42-48]); and performing the sorting algorithm for the second window by removing only partially the address data stored in the storage circuitry during performance of the sorting algorithm for the first window (“FIG. 5 illustrates a method of reducing the window size utilizing the rank cell array of the preferred embodiment. In this method, zero is inserted into the window, while, at the same time, one of the video samples is extracted from the window.” [Col.4, ll.48-52])
Regarding claim 6, Abboud as modified by RAMALINGAM discloses all the limitations of claim 5. Abboud discloses the method further comprising performing the sorting algorithm for the second window by controlling the storage circuitry to exclusively insert address data of data elements of the second window which has not been inserted during performance of the sorting algorithm for the first window data (“During a clock cycle wherein a new sample VIN is added to the rank array RC1 . . . RC8, the new sample VIN is compared to the sample VQ in each of the other rank cells RC1 . . . RC8.” [Cpl.4, ll.57-61])
Regarding claim 7, Abboud as modified by RAMALINGAM discloses all the limitations of claim 1. Abboud discloses the method further comprising, after performing the sorting algorithm: selecting a data element indicated by address data stored at a predefined storage segment of the plurality of storage segments (“Selects the sample which has a Predetermined Rank (RT) from the sample set”[Col.1, ll.48-49]); comparing the selected data element to a data element under test (“The amplitude of this sample is used as a basis for setting the Target Detection Threshold.”[Col.1, ll.49-51]); and determining a presence of a target or a motion of the target based on the comparing (“Inputs all video samples within N/2 samples on either side of the sample cell which is being examined for the presence or absence of a Target” [Col.1, ll.40-42]).
Regarding claim 9, Abboud discloses
An apparatus, comprising: storage circuitry comprising a plurality of storage segment (“ranking circuitry is provided which includes a number of identically structured rank cells for storing and ranking sample values” [Col.2, ll.64-66]s, wherein the storage circuitry is configured to store address data (FIG.2, Parts RC1-RC8) […]; and control circuitry comprising a processor and a memory coupled to the processor with instructions stored thereon (“Each pass requires moving data among locations in memory and comparing operations in an arithmetic logic unit (ALU)” [Col.2, ll.1-3]), wherein the instructions, when executed by the processor, enable the apparatus to perform a sorting algorithm for ordered statistics constant false alarm rate (OS-CFAR) detection (“a new sample VIN is added to the rank array RC1 . . . RC8, the new sample VIN is compared to the sample VQ in each of the other rank cells RC1 . . . RC8” [Col.4, ll.58-61])comprising: comparing a new data element of the radar data to at least one data element indicated by address (“a new sample VIN is added to the rank array RC1 . . . RC8, the new sample VIN is compared to the sample VQ in each of the other rank cells RC1 . . . RC8” [Col.4, ll.58-61]) […], determining a storage segment of the plurality of storage segments at which address data of the new data element is to be stored based on the comparing (“The signals in the rank cells RC1 . . . RC8 are then shifted in a manner such that there exists a vacancy for the new sample VIN “ [Col.4, ll.61-64]), and controlling the storage circuitry to shift address data stored at the determined storage segment to another storage segment (“ all signals are once again ranked in descending order after the new sample VIN has been inserted into the vacant rank cell.” [Col.4, ll.64-66]).
Abboud does not explicitly disclose nor limit wherein the address data indicates the addresses of data elements of radar data stored at a further storage circuitry. RAMALINGAM discloses, address data indicating addresses of data elements of radar data at a further storage circuitry (“sorted index array 622 stores the ranks of the samples of left window 604 and right window 606. Sorted index array 622 indicates the ascending order rank of the samples “ [0054]).
RAMALINGAM teaches in the same field of OS-CFAR systems. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Samuelsson with the teachings of RAMALINGAM to incorporate the features of storing addresses of data elements of radar data at a further storage circuitry so as to gain the advantage of reducing hardware costs [0022, RAMALINGAM]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 10, Abboud as modified by RAMALINGAM discloses all the limitations of claim 9. Abboud discloses, when executed by the processor, further enable the apparatus to control the storage circuitry to store the address data of the new data element at the determined storage segment (“ the input sample value VIN, the sample value VQN stored in the next succeeding rank cell RC(N+1)” [Col.6, ll.5-7]).
Regarding claim 11, Abboud as modified by RAMALINGAM discloses all the limitations of claim 9. Abboud discloses, when executed by the processor, further enable the apparatus to control the storage circuitry to shift all address data stored in storage segments subsequent or previous to the determined storage segment by a predefined number of storage segments (“The signals in the rank cells RC1 . . . RC8 are then shifted in a manner such that there exists a vacancy for the new sample VIN such that all signals are once again ranked in descending order after the new sample VIN has been inserted into the vacant rank cell” [Col.4, ll.61-66]).
Regarding claim 12, Abboud as modified by RAMALINGAM discloses all the limitations of claim 9. Abboud discloses, wherein the instructions, when executed by the processor, enable the apparatus to perform an insertion sort for OS-CFAR detection (“the insertion of "38" into the window and the extraction of "59" from the window” [Col.4, ll. 21-25] & FIG.2).
Regarding claim 13, Abboud as modified by RAMALINGAM discloses all the limitations of claim 9. Abboud discloses, wherein the storage circuitry comprises a parallel (“Such a simultaneous insertion and extraction of zero into the rank cells RC1 . . . RC8 is shown in FIG. 6.” [Col.4, ll.55-57]) shift register (“Each rank cell RC1 . . . RC8 contains logic which determines which sample will be clocked into its own internal sample storage register“ [Col.5, ll.19-21]) coupling the plurality of storage segments in a cascade (“a number of rank cell logic arrays, each identical to that disclosed in FIG. 1, may be connected together or ‘cascaded.’” [Col.3, ll.57-59])
Regarding claim 14, Abboud as modified by RAMALINGAM discloses all the limitations of claim 13. Abboud discloses, wherein: the plurality of storage segments (“FIG. 7 discloses the structure of a rank cell RCN” [Col.5, ll.64]) are coupled to respective multiplexers (“a multiplexer (MUX) 49” [Col.5, ll.68]); and each multiplexer of the multiplexers comprises: a first input node coupled to a respective output node of a first one of a previous storage segment or a subsequent storage segment in the cascade (“The inputs A, B, C, D to the MUX 49 are, respectively, the sample value VQP from the preceding rank cell RC(N-1),” [Col.6, ll.3-5]), and a second input node coupled to a data input (“ the sample value VQN stored in the next succeeding rank cell RC(N+1)” [Col.6, ll.5-7]).
Regarding claim 15, Abboud as modified by RAMALINGAM discloses all the limitations of claim 14. Abboud discloses, wherein each multiplexer of the multiplexers further comprises a third input node coupled to a respective output node of a second one of the previous storage segment or the subsequent storage segment in the cascade (“ the sample value VQN stored in the next succeeding rank cell RC(N+1)” [Col.6, ll.5-7]).
Regarding claim 16, Abboud as modified by RAMALINGAM discloses all the limitations of claim 9. Abboud discloses, wherein the instructions, when executed by the processor, further enable the apparatus to: perform the sorting algorithm for a first window of data elements of the radar data (“The input VIN is the sample entering the sorting window. The VIN input is provided to each rank cell RC1 . . . RC8 on a respective line 15” [Col.3, ll.34-36]); after the sorting algorithm for the first window is performed, select a second window of data elements of the radar data (“The rank cells RC1 . . . RC8 may be cleared or reset by placing a sample value of zero in each rank cell RC1 . . . RC8. To build up the window size after such a reset, as shown in FIG. 4, video samples must be inserted into the window one at a time, while at the same time extracting zero amplitude samples.” [Cpl.4, ll.42-48]); and perform the sorting algorithm for the second window by removing only partially the address data stored in the storage circuitry during performance of the sorting algorithm for the first window (“FIG. 5 illustrates a method of reducing the window size utilizing the rank cell array of the preferred embodiment. In this method, zero is inserted into the window, while, at the same time, one of the video samples is extracted from the window.” [Col.4, ll.48-52]).
Regarding claim 17, Abboud as modified by RAMALINGAM discloses all the limitations of claim 16. Abboud discloses, wherein the instructions, when executed by the processor, further enable the apparatus to perform the sorting algorithm for the second window by controlling the storage circuitry to exclusively insert address data of data elements of the second window which has not been inserted during performance of the sorting algorithm for the first window (“During a clock cycle wherein a new sample VIN is added to the rank array RC1 . . . RC8, the new sample VIN is compared to the sample VQ in each of the other rank cells RC1 . . . RC8.” [Cpl.4, ll.57-61]).
Regarding claim 18, Abboud as modified by RAMALINGAM discloses all the limitations of claim 9. Abboud discloses, wherein the instructions, when executed by the processor, further enable the apparatus to, after performing the sorting algorithm: select a data element indicated by address data stored at a predefined storage segment of the plurality of storage segments (“Selects the sample which has a Predetermined Rank (RT) from the sample set”[Col.1, ll.48-49]); compare the selected data element to a data element under test (“The amplitude of this sample is used as a basis for setting the Target Detection Threshold.”[Col.1, ll.49-51]); and determine a presence of a target or a motion of the target based on the comparing (“Inputs all video samples within N/2 samples on either side of the sample cell which is being examined for the presence or absence of a Target” [Col.1, ll.40-42]).
Regarding claim 20, Abboud as modified by RAMALINGAM discloses all the limitations of claim 9. Abboud discloses, a radar system, comprising: the apparatus according to claim 9; and a radar sensor (“radars which employ OS CFAR detection “[Col.1, ll.13-14]) configured to generate the radar data (“Inputs all video samples “ [Col.1, ll.40]).
Regarding claim 23, Abboud discloses,
An apparatus, comprising: storage circuitry comprising a plurality of storage segments (“ranking circuitry is provided which includes a number of identically structured rank cells for storing and ranking sample values” [Col.2, ll.64-66]), wherein the storage circuitry is configured to store address data (FIG.2, Parts RC1-RC8) […]; and control circuitry configured to perform a sorting algorithm for ordered statistics constant false alarm rate (OS-CFAR) detection (“a number ranking circuit for an OS CFAR detector circuit “ [(Col.2, ll.46-47]) using the steps of: comparing a new data element of the radar data to at least one data element indicated by address data (“a new sample VIN is added to the rank array RC1 . . . RC8, the new sample VIN is compared to the sample VQ in each of the other rank cells RC1 . . . RC8” [Col.4, ll.58-61]) […], determining a storage segment of the plurality of storage segments at which address data of the new data element is to be stored based on the comparing (“The signals in the rank cells RC1 . . . RC8 are then shifted in a manner such that there exists a vacancy for the new sample VIN “ [Col.4, ll.61-64]), and controlling the storage circuitry to shift address data stored at the determined storage segment to another storage segment (“ all signals are once again ranked in descending order after the new sample VIN has been inserted into the vacant rank cell.” [Col.4, ll.64-66]).
Abboud does not explicitly disclose nor limit wherein the address data indicates the addresses of data elements of radar data stored at a further storage circuitry. RAMALINGAM discloses, address data indicating addresses of data elements of radar data at a further storage circuitry (“sorted index array 622 stores the ranks of the samples of left window 604 and right window 606. Sorted index array 622 indicates the ascending order rank of the samples “ [0054]).
RAMALINGAM teaches in the same field of OS-CFAR systems. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Samuelsson with the teachings of RAMALINGAM to incorporate the features of storing addresses of data elements of radar data at a further storage circuitry so as to gain the advantage of reducing hardware costs [0022, RAMALINGAM]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Claims 8, 19, 21, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Abboud(US5179712A) as modified by RAMALINGAM(US20220155368A1) as applied to claims 1 and 9 above, and further in view of Will(US20210349203A1)
Regarding claim 8, Abboud as modified by RAMALINGAM discloses all the limitations of claim 7. Abboud as modified by RAMALINGAM do not appear to explicitly disclose sending an interrupt to processing circuitry in response to presence or motion detection. Will discloses the method further comprising, in response to determining presence of the target or the motion of the target, sending an interrupt to processing circuitry to trigger further processing of the radar data (“when a human target remains in static state 408 for longer than a predetermined period of time (e.g., such as 10 frames), processor 104 may determine vital signs of such human target (such as heartbeat rate and/or respiration rate) while the target remains in static state 408” [0188])
Will teaches in the same field of OS-CFAR systems. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Samuelsson as modified by RAMALINGAM with the teachings of Will to incorporate the features of sending an interrupt to processing circuitry in response to presence or motion detection so as to gain the advantage of reducing computational effort [0165, Will]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 19, Abboud as modified by RAMALINGAM discloses all the limitations of claim 18. Abboud as modified by RAMALINGAM do not appear to explicitly disclose sending an interrupt to processing circuitry in response to presence or motion detection. Will discloses, wherein the instructions, when executed by the processor, further enable the apparatus to, in response to determining presence of the target or the motion of the target, send an interrupt to processing circuitry to trigger further processing of the radar data (“when a human target remains in static state 408 for longer than a predetermined period of time (e.g., such as 10 frames), processor 104 may determine vital signs of such human target (such as heartbeat rate and/or respiration rate) while the target remains in static state 408” [0188])
Will teaches in the same field of OS-CFAR systems. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Samuelsson as modified by RAMALINGAM with the teachings of Will to incorporate the features of sending an interrupt to processing circuitry in response to presence or motion detection so as to gain the advantage of reducing computational effort [0165, Will]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 21, Abboud as modified by RAMALINGAM discloses all the limitations of claim 20. Although Abboud discloses the use of radar, Abboud does not appear to explicitly disclose a first antenna configured to receive a first signal from a field of view of the radar sensor. RAMALINGAM discloses wherein: the radar sensor comprises a first antenna configured to receive a first signal from a field of view of the radar sensor (“ Detection occurs when returning radar signals are received by an antenna “ [0002]), wherein the radar sensor is configured to generate the radar data based on the first signal (“Data samples of the returning radar signals are stored in a shift register” [0002]);
Abboud as modified by RAMALINGAM does not appear to disclose a second radar sensor. Will discloses wherein, the radar sensor comprises at least one second antenna configured to receive at least one second signal from the field of view of the radar sensor (“In some cases, multiple antennas may be used“ [0003]), wherein the radar sensor is configured to generate second radar data based on the second signal (“A multiple-input and multiple-output (MIMO) configuration “ [0003]); and the radar system comprises at least one second apparatus according to claim 1 configured to process the second radar data (“ During steps 314b and/or 316b, an order statistics (OS) constant false alarm rate (CFAR) (OS-CFAR) detector may be used “ [0066]).
Will teaches in the same field of OS-CFAR systems. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Samuelsson as modified by RAMALINGAM with the teachings of Will to incorporate the features of a second radar sensor so as to gain the advantage of improving signal processing [0003, Will]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 22, Abboud as modified by RAMALINGAM discloses all the limitations of claim 20. Abboud discloses, processing circuitry external to the radar sensor (“applicable to radars which employ OS CFAR detection” [Col.1, ll.13-14] & Fig.1)
Abboud as modified by RAMALINGAM do not appear to explicitly disclose sending an interrupt to processing circuitry in response to presence or motion detection. Will discloses, wherein the processing circuitry is configured to, in response to receiving an interrupt from the apparatus, perform further processing of the radar data (“when a human target remains in static state 408 for longer than a predetermined period of time (e.g., such as 10 frames), processor 104 may determine vital signs of such human target (such as heartbeat rate and/or respiration rate) while the target remains in static state 408” [0188])
Will teaches in the same field of OS-CFAR systems. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Samuelsson as modified by RAMALINGAM with the teachings of Will to incorporate the features of sending an interrupt to processing circuitry in response to presence or motion detection so as to gain the advantage of reducing computational effort [0165, Will]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Documents Considered but not Relied Upon
The prior art made of record and not relied upon is considered pertinent to the applicant’s Disclosure.
BORGONOVO(US20160334512A1) is considered analogous art to the instant application as it discloses in [0045] “The block 108 is exemplary of window sorting (WN sorting) based on the K-order, where K denotes the rank of the OS-CFAR,.”
Conclusion
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/C.P.R./Examiner, Art Unit 3646
/JACK W KEITH/Supervisory Patent Examiner, Art Unit 3646
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