Prosecution Insights
Last updated: October 22, 2026
Application No. 18/746,144

AUTOMATIC FREQUENCY OSCILLATOR FOR PULSE-REGULATED SWITCH-MODE POWER SUPPLY

Final Rejection §102§112
Filed
Jun 18, 2024
Priority
Apr 18, 2019 — provisional 62/835,756 +2 more
Examiner
TORRES-RIVERA, ALEX
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
3 (Final)
87%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
687 granted / 792 resolved
+18.7% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
30 currently pending
Career history
822
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
54.6%
+14.6% vs TC avg
§102
24.7%
-15.3% vs TC avg
§112
17.3%
-22.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 792 resolved cases

Office Action

§102 §112
DETAILED ACTION This action is in response to the 09/02/2026 amendment. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 112 Claim 3 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “A device comprising…a current source having an output coupled to the input of the amplifier”. Claim 3 recites “wherein the amplifier includes…current source coupled to the second current terminal.” It is unclear if Applicant is attempting to claim a second current source or if it is referring to the current source of claim 1. For examination purpose, the Examiner is going to assume that the current source is the same as the one claimed in claim 1, according to the embodiment of Fig. 4. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 and 3 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by US Pub. No. 2010/0225292; (hereinafter Nishimori). Regarding claim 1, Nishimori [e.g. Fig. 3] discloses a device, comprising: a current mirror [e.g. T12-T15] having a current mirror input [e.g. at upper terminal of T12] and a current mirror output [e.g. at lower terminal of T15]; an amplifier [e.g. 33, T11 and R11] having an input [e.g. Vo] and an output [e.g. at lower terminal of T11], the output of the amplifier coupled to the current mirror input [e.g. at upper terminal of T12]; a current source [e.g. power supply Vi provides a current through R11] having an output coupled to the input of the amplifier [e.g. upper terminal of R11]; a capacitor [e.g. C11] coupled between to the current mirror output [e.g. at node N12] and a ground terminal [e.g. via E1]; and a switch [e.g. SW11] coupled to the capacitor, the switch having a switch control terminal coupled to a clock input [e.g. CLK]. Regarding claim 3, Nishimori [e.g. Fig. 3] discloses wherein the amplifier includes: a transistor [e.g. T11] having first [e.g. lower terminal] and second [e.g. higher terminal] current terminals and a first control terminal [e.g. gate terminal], wherein the first current terminal is coupled to the output of the amplifier [e.g. lower terminal of T11]; a resistor [e.g. R11] coupled to the first current terminal [e.g. via upper terminal of T11]; and a current source [e.g. power supply Vi provides a current through R11] coupled to the second current terminal [e.g. high side terminal]. Allowable Subject Matter Claims 14 – 30 are allowed. Claim 31 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the indication of the allowability of claim 14 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “the first terminal coupled to the first terminal of the first transistor, the control terminal coupled to the control terminal of the second transistor; a third transistor having a terminal coupled to the second terminal of the first transistor; a resistor having a first terminal coupled to the first transistor and a second terminal coupled to a ground terminal; a capacitor having a first terminal coupled to the second terminal of the second transistor and a second terminal coupled to the ground terminal; a fourth transistor having a first terminal coupled to the second terminal of the second transistor, a second terminal coupled to the ground terminal, and a control terminal coupled to a clock signal terminal; and a buffer having an input coupled to the second terminal of the second transistor".”. The primary reason for the indication of the allowability of claim 31 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “a second amplifier having a first input, a second input, and an output, the output of the second amplifier coupled to the input of the first amplifier, and the second input coupled to a reference input; a modulator circuit having a comp input, a clock input, and an output, the comp input coupled to the output of the second amplifier, and the clock input coupled to the capacitor; and a power stage having a power input, a control input, and a power output, the control input coupled to the output of the modulator circuit, and the power output coupled to the first input of the second amplifier”. Claims 15 – 30 are objected to because inherent dependency on claim 14. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Torres-Rivera whose telephone number is (571)272-5261. The examiner can normally be reached M-F 9:00-5:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Show 3 earlier events
Jan 07, 2026
Request for Continued Examination
Jan 23, 2026
Response after Non-Final Action
Apr 09, 2026
Examiner Interview Summary
Apr 09, 2026
Applicant Interview (Telephonic)
Apr 13, 2026
Response Filed
May 05, 2026
Non-Final Rejection mailed — §102, §112
Sep 02, 2026
Response Filed
Oct 06, 2026
Final Rejection mailed — §102, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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BUCK-BOOST CONVERTER REDUCING INDUCTOR CURRENT
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Patent 12756301
FORWARD DC-DC CONVERTER
2y 1m to grant Granted Oct 06, 2026
Patent 12749978
POWER STAGE CONTROLLER
2y 9m to grant Granted Sep 29, 2026
Patent 12744450
METHODS, SYSTEMS, AND DEVICES FOR SOFT SWITCHING OF POWER CONVERTERS
3y 3m to grant Granted Sep 22, 2026
Patent 12744460
VALLEY CURRENT MODE CONTROL FOR A VOLTAGE CONVERTER
3y 2m to grant Granted Sep 22, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
87%
Grant Probability
98%
With Interview (+11.1%)
2y 1m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 792 resolved cases by this examiner. Grant probability derived from career allowance rate.

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