DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Objections
1. Claim 11 is objected to because of the following informalities:
1.1. The claim-element/limitation relative to the “… lateral side …” (line 10-11) of claim 11 should be consistent and be written in as “… lateral surface …” in order to improve consistency and clarity of the claim language.
1.2. Appropriate correction is required. The examiner appreciates the assistance of the Applicant(s).
Specification Objections
2. The disclosure is objected to because of the following informalities:
2.1. the abbreviation/acronym/term/symbol/variable “/” should be spelled out on its first appearance.
2.2. Appropriate correction is required. The examiner appreciates the assistance of the Applicant(s).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
3. Claim(s) 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Specifically:
3.1. Claim 1 recites the limitations “the insert” in line 10. There is insufficient antecedent basis for this limitation in the claim.
3.2. Furthermore, claims 2-10 are also rejected because they further limit and depend on claim-1.
3.3. Claim 2 recites the limitations “advance/retreat member” in line 3, which makes the claim indefinite because the symbol “/” is neither defined by the specification nor by claim in order to determine whether it means “or”, “and”, “and/or”, any of the plain meanings of the ordinary English language, or any meaning that the applicant would intend it to have as a lexicographer of the invention.
3.4. Furthermore, claims 3-7 are also rejected because they further limit and depend on claim-2.
Examiner’s Note
4. All the words in the language of the claims of which the specifications do not provide a definition in the form stated in the MPEP, the examiner has interpreted them by their plain meanings, pursuant to the MPEP 2111.01 “Plain Meaning” and MPEP 2173.01.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
5. Claim(s) 11 are/is rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Lee et al. (Pub. No.: US 2005/0012498 hereinafter mentioned “Lee”).
As per claim 11, the embodiment of Figs. 6-19 of Lee discloses:
An insert (See MPEP 2111.02, Effect of Preamble, and II. Preamble Statements Reciting Purpose or Intended Use. However, Fig. 10, see the inserts 330 that a has a receiver 335 with a pocket 337 where semiconductors 360 are mounted. Also see [0073]-[0074]), to which a semiconductor device with terminals located on a lateral surface thereof is mounted (Figs. 9, 12 and 14A, see any of the semiconductor devices 360 with their lateral terminal/leads 361. Also see [0073] and [0076]), and which receives an external force to push the semiconductor device (see [0076] and [0078]. The pressing force of Lee), the insert (Figs. 9, 10, 12 and 14A, see any of the inserts 330. Also see [0073]-[0075]) comprising:
a mounting block to which the semiconductor device is mounted (Figs. 12 and 14A, see the mounting block formed by the receiver
335 with a pocket 337 where semiconductors 360 are mounted. Also see [0073]-[0074]) with the lateral surface facing in a direction intersecting a direction where the external force is applied (Figs. 9, 12 and 14A, see the lateral surface that includes the lateral terminal/leads 361of any of the semiconductor devices 360 facing and intersecting the external/pressing-force applied by pusher assembly 350. Also see [0073], [0076] and [0078]); and
a push unit which receives the external force to move the semiconductor device toward the direction where the lateral side of the semiconductor device faces (Figs. 9, 12, 13 and 16, see the pusher 351 that receives the pressing force to press terminal/leads 361 located on lateral-side/surface of any of the semiconductor devices 360 and move them. Also see [0073], [0076] and [0078]).
Allowable Subject Matter
6. Claim(s) 1-10 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
7. The following is an examiner's statement of reasons why said claim(s) would be allowable:
8. Regarding claim 1, the prior art of record, alone or in combination, does not disclose or suggest the below underlined limitations incorporated together with the other claimed limitations not mentioned herein:
a push unit which moves the semiconductor device in a pushing direction to be spaced apart from the mounting block.
9. Claims 2-10 would be allowed if overcoming the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action above due to the fact that they are further limiting and depending on claim 1.
10. The prior art of record does not anticipate the limitations of the independent claims.
Furthermore, there is not any obvious motivation for an ordinary skilled in the art to combine some and/or all of the features of the prior art of record to achieve the features of the independent claims. In addition, it will further require substantial structural modification of the components that will also require substantial modification of the measurements, and configurations to achieve the features of the allowable subject matter.
11. The prior art made of record relied and not relied upon is considered pertinent to applicant's disclosure. Please note that any strikethrough portion of the claim language below is not taught by corresponding prior art.
a) Lee teaches a test tray (See MPEP 2111.02, Effect of Preamble, and II. Preamble Statements Reciting Purpose or Intended Use. However, Fig. 10, see tray 240. Also see [0068]) to which a semiconductor device with terminals located on a lateral surface thereof is mounted (Figs. 9 and 12, see any of the semiconductor devices 360 with their lateral terminal/leads 361. Also see [0073]), the test tray comprising:
a plurality of inserts to which the semiconductor devices are mounted (Fig. 10, see the inserts 330 that a has a receiver 335 with a pocket 337 where semiconductors 360 are mounted. Also see [0073]-[0074]); and
a frame which supports the inserts (Figs. 9 and 12, see the socket-guide/frame 317 that supports inserts 330 via pocket 337. Also see [0071]) in arrangement respectively corresponding to sockets (Figs. 9 and 12, see the sockets 315. Also see [0071]) of a test apparatus (Figs. 9, see the semiconductor device test apparatus. Also see [0069]) and has a length in a first axis and a width in a second axis (Figs. 9 and 12, see the socket-guide/frame 317 and/or the semiconductor device test apparatus having length in a first axis and a width in a second axis. Also see [0069] and/or [0071]),
the insert (Fig. 10, see any of the inserts 330. Also see [0073]-[0074]) comprising:
a mounting block to which the semiconductor device (Fig. 10, see the receiver 335 with a pocket 337 where semiconductors 360 are mounted. Also see [0073]-[0074]) is mounted with the lateral surface having an angle to a plane formed by the first axis and the second axis (Fig. 14A, see the guider 335a forming an angle. Also see [0074])
b) Imaizumi (Pub. No.: US 2023/0105734) teaches an insert (Fig. 7, see the insert 710. Also see [0061]-[0063]) comprising:
a mounting block to which the semiconductor device is mounted (Figs. 7, 9 and 12, see the mounting-block/core-body 740 with opening 741 of cores 730 that receives the DUT 90. Also see [0067]) with the lateral surface having an angle to a plane formed by the first axis and the second axis (Fig. 7, see any of the lateral claws 742 forming angles. Also see [0073]);
c) Horino (Pub. No.: US 2022/0026486) teaches “The test tray 110 includes a frame and a plurality of inserts 111 (refer to FIG. 6) movably held by the frame. The plurality of inserts 111 are arranged in a matrix so as to correspond to the arrangement of the sockets 6 of the test head SA to SD, and the plurality of inserts 111 can respectively accommodate the DUTs 200. The testing ofDUTs 200 is performed by pressing the DUTs 200 to the sockets 6 by the pressing device 631 in a state where the DUTs 200 are accommodated in the inserts 111 of the test tray 110” (Paragraph [0062]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALVARO E. FORTICH whose telephone number is (571) 272-0944. The examiner can normally be reached on Monday thru Friday from 8:30am to 5:30pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Huy Phan, can be reached on (571)272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ALVARO E FORTICH/Primary Examiner, Art Unit 2858