DETAILED ACTION
Claim Objections
Claims 12 and 14 are objected to because of the following informalities:
Regarding claim 12, “a substrate film region” in line 6 should be changed to “the substrate film region”.
Regarding claim 14, “the bulk substrate region” in lines 5-6 and in line 8 should be changed to “the underlying bulk substrate region”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 5-6, 8, 12, 14-15, 17, and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bischopink et al. (WO 2011/082857; hereinafter “Bischopink”).
Regarding claim 1, Bischopink teaches a method, comprising:
performing an ion beam implant in a semiconductor substrate (an implantation process in a starting substrate 110) to form an ion-induced damage layer (112) at an implant depth in the semiconductor substrate, wherein a portion of the semiconductor substrate above the ion-induced damage layer defines a substrate film region (113), a portion of the semiconductor substrate below the ion-induced damage layer defines a bulk substrate region (111), and the ion-induced damage layer has a damaged structure (the implanted region of 112) relative to the substrate film region and the bulk substrate region (Fig. 10 and page 8);
forming semiconductor device components (a device layer 123 including circuit structures for power semiconductor components) on the substrate film region, wherein the substrate film region and the semiconductor device components formed thereon define a substrate film-based semiconductor device structure (a structure including 110 and 123) (Fig. 10 and pages 6 and 8-9);
forming a stressed film (a releasable connection layer 140) on the semiconductor device components (Figs. 5-6 and 11 and page 9), wherein the stressed film introduces internal forces in the substrate film-based semiconductor device structure (see below for the functional/property limitation of the stressed film);
separating the substrate film-based semiconductor device structure from the bulk substrate region at the ion-induced damage layer, wherein the separation is facilitated by (a) the damaged structure of the ion-induced damage layer (Figs. 5-6 and 11 and page 9) and (b) the internal forces introduced in the substrate film-based semiconductor device structure by the stressed film (see below for the functional/property limitation of the stressed film); and
mounting the separated substrate film-based semiconductor device structure on a carrier (a final substrate 180) to define a mounted device structure (Fig. 7 and page 9).
It is noted that the limitation are “wherein the stressed film introduces internal forces in the substrate film-based semiconductor device structure” and “(b) the internal forces introduced in the substrate film-based semiconductor device structure by the stressed film” are directed to functional/property limitation of the stressed film in the claim and Bischopink teaches each and every limitation of method steps including the stressed film recited in the claim identically as discussed above. Accordingly, since Bischopink teaches the method steps including the stressed film identical to that of the claim, claimed function/property for the stressed film recited in the claim is presumed to be inherent: Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 195 USPQ 430, 433 (CCPA 1977) and MPEP 2112.01.
Regarding claim 2, Bischopink teaches comprising: securing a transfer device (a transfer substrate 150/151) to the stressed film prior to separating the substrate film-based semiconductor device structure from the bulk substrate region (Figs. 5-6 and page 6); and removing the transfer device after mounting the separated substrate film-based semiconductor device structure on the carrier (Fig. 8 and page 7).
Regarding claim 3, Bischopink teaches wherein the semiconductor substrate comprises silicon carbide, gallium nitride, or diamond (110 including silicon carbide or gallium nitride) (pages 7-8).
Regarding claim 5, Bischopink teaches comprising removing the stressed film from the semiconductor device components (Fig. 11 and page 9).
Regarding claim 6, Bischopink teaches comprising dicing the mounted device structure to form a plurality of discrete devices (123 including the circuit structures separated by 125) (Fig. 11 and pages 6 and 9).
Regarding claim 8, Bischopink teaches wherein forming the stressed film on the semiconductor device components comprises attaching a pre-formed stressed film (140) to the semiconductor device components (Figs. 5-6 and 11 and page 9).
Regarding claim 12, Bischopink teaches a method, comprising:
forming semiconductor device components (a device layer 123 including circuit structures for power semiconductor components) on a semiconductor substrate (a starting substrate 110) to define a semiconductor device structure (a structure including 110 and 123) (Fig. 10 and pages 6 and 8-9);
forming a stressed film (a releasable connection layer 140) over the semiconductor device components (Figs. 5-6 and 11 and page 9), wherein the stressed film introduces internal forces in a substrate film region (113) of the semiconductor substrate (see below for the functional/property limitation of the stressed film);
separating a substrate film region (113) of the semiconductor substrate from an underlying bulk substrate region (111) of the semiconductor substrate, the separated substrate film region carrying the semiconductor device components to collectively define a substrate film-based semiconductor device structure (a structure including 113 and 123) (Figs. 5-6 and 11 and page 9);
wherein the separation of the substrate film region from the underlying bulk substrate region is facilitated by the internal forces introduced in the substrate film region of the semiconductor substrate by the stressed film (see below for the functional/property limitation of the stressed film); and
mounting the separated substrate film-based semiconductor device structure on a carrier (a final substrate 180) (Fig. 7 and page 9).
It is noted that the limitation are “wherein the stressed film introduces internal forces in a substrate film region (113) of the semiconductor substrate” and “wherein the separation of the substrate film region from the underlying bulk substrate region is facilitated by the internal forces introduced in the substrate film region of the semiconductor substrate by the stressed film” are directed to functional/property limitation of the stressed film in the claim and Bischopink teaches each and every limitation of method steps including the stressed film recited in the claim identically as discussed above. Accordingly, since Bischopink teaches the method steps including the stressed film identical to that of the claim, claimed function/property for the stressed film recited in the claim is presumed to be inherent: Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 195 USPQ 430, 433 (CCPA 1977) and MPEP 2112.01.
Regarding claim 14, Bischopink teaches comprising: performing an ion beam implant in the semiconductor substrate (an implantation process in 110) to form an ion-induced damage layer (112) at an implant depth in the semiconductor substrate, wherein a portion of the semiconductor substrate above the ion-induced damage layer defines the substrate film region, and a portion of the semiconductor substrate below the ion-induced damage layer defines the bulk substrate region, wherein the ion-induced damage layer has a damaged structure (the implanted region of 112) relative to the substrate film region and the bulk substrate region (Fig. 10 and page 8);
Regarding claim 15, Bischopink teaches wherein the separation of the substrate film region from the underlying bulk substrate region is facilitated by the damaged structure of the ion-induced damage layer (Figs. 5-6 and 11 and page 9).
Regarding claim 17, Bischopink teaches comprising: securing a transfer device (a transfer substrate 150/151) to the stressed film prior to separating the substrate film region from the underlying bulk substrate region (Figs. 5-6 and page 6); and removing the transfer device after mounting the separated substrate film-based semiconductor device structure on the carrier (Fig. 8 and page 7).
Regarding claim 19, Bischopink teaches a device structure formed by a process comprising: performing an ion beam implant in a semiconductor substrate to form an ion-induced damage layer at an implant depth in the semiconductor substrate, wherein a portion of the semiconductor substrate above the ion-induced damage layer defines a substrate film region (113), a portion of the semiconductor substrate below the ion-induced damage layer defines a bulk substrate region, and the ion-induced damage layer has a damaged structure relative to the substrate film region and the bulk substrate region; forming semiconductor device components (a device layer 123 including circuit structures for power semiconductor components) on the substrate film region, wherein the substrate film region and the semiconductor device components formed thereon define a substrate film-based semiconductor device structure (a structure including 113 and 123); forming a stressed film (a releasable connection layer 140) on the semiconductor device components, wherein the stressed film introduces internal forces in the substrate film-based semiconductor device structure; separating the substrate film-based semiconductor device structure from the bulk substrate region at the ion-induced damage layer, wherein the separation is facilitated by (a) the damaged structure of the ion-induced damage layer and (b) the internal forces introduced in the substrate film-based semiconductor device structure by the stressed film; and mounting the separated substrate film-based semiconductor device structure on a carrier (a final substrate 180) to define a mounted device structure (Figs. 7 and 11 and pages 4-9 and see below regarding a product-by-process limitation).
It is noted that claim 19 reciting “a device structure formed by a process comprising…to define a mounted device structure” is a product-by process claim and therefore is treated according to MPEP 2113. Even through product-by process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. Since Bischopink teaches all features of the mounted device structure as a device structure, the claimed method steps do not distinguish from the prior art.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4, 10, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Bischopink.
Regarding claim 4, while Bischopink does not teach that the implant depth of the ion-induced damage layer is in the range of 0.35-1.0 μm below an upper surface of the semiconductor substrate (an upper surface of 110), it would have been obvious to one of ordinary skill in the art to adjust the implant depth by adjusting the implantation energy as a routine experimentation for obtaining the optimal and workable implant depth range, including the claimed range of range of 0.35-1.0 μm.
Regarding claims 10 and 18, while Bischopink does not explicitly teach that the forming semiconductor device components on the substrate film region comprises: growing an epitaxial region over the substrate film region; and forming metal structures over the epitaxial region, Bischopink teaches forming the device layer 123 with circuit structures for power semiconductor components by known semiconductor manufacturing processes (pages 4-6). Then, it would have been obvious to one of ordinary skill in the art that the circuit structures for the power semiconductor components would include epitaxial regions and metal structures on the epitaxial region in order to provide a plurality of functioning power semiconductor components electrically connected by the metal structures.
Claims 7, 9, 11, 13, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Bischopink as applied to claims 1 and 12 above, and further in view of Hu (US 2020/0058542 A1).
Regarding claims 7 and 16, Bischopink teaches that forming the stressed film on the semiconductor device components comprises depositing the conformal stressed film over the semiconductor device components (Figs. 5-6 and 11 and page 9). However, Bischopink does not further teach that the stressed film comprises a dielectric material (for claims 7 and 16). Hu teaches a method, comprising: forming a stressed film (a stress inducing layer 6) on semiconductor device components (a functional layer 5 with electronic devices fabricated thereon), wherein the stress film comprises a dielectric material (6 formed of epoxy) (Figs. 4-7 and paragraphs 35-37). Therefore, it would have been obvious to one of ordinary skill in the art to combine the teaching of Bischopink with that of Hu in order to provide the stress inducing layer 6 under a handling substrate 7 with readily available dielectric material known in the art. Furthermore, regarding claims 9 and 13, while Bischopink in view of Hu has been discussed above including the stressed film formed of the dielectric material, Hu does not further teach that the stressed film comprising silicon nitride (for claims 9 and 13). Nevertheless, it would have been obvious to one of ordinary skill in the art to also utilize silicon nitride as the well-known stress inducing dielectric film for applying stress toward underlying device structures.
Regarding claim 11, Bischopink does not teach using the separated bulk substrate region to form additional devices after separating the substrate film-based semiconductor device structure from the bulk substrate region. Hu teaches a method, comprising: using a separated bulk substrate region to form additional devices after separating the substrate film-based semiconductor device structure from the bulk substrate region (a remaining main body 2 is reclaimed and reused for subsequent device fabrication after the separation technique) (Fig. 8 and paragraph 42-44). Therefore, it would have been obvious to one of ordinary skill in the art to combine the teaching of Bischopink with that of Hu in order to reuse the remaining substrate main body for additional device fabrications.
Pertinent Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Schaeffer et al. (US2020/0013859 A1, Figs. 6A-6J and related text) similarly teaches the claimed method steps.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL B WHALEN whose telephone number is (571)270-3418. The examiner can normally be reached on M-F: 8AM-5PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DANIEL WHALEN/Primary Examiner, Art Unit 2893
Prosecution Insights