DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5, 6, 8-9, 14, 16-17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over MACHIREDDY PG PUB 2024/0224202 in view of Krishnan et al PG PUB 2023/0083011.
Re Claims 1, 9 and 17, MACHIREDDY teaches in figure 10, a O-R (one memory and processor) is connected to multiple O-DU(s) supporting LLS-CI and LLS-C2 topologies wherein the O-RU’s clock (a clck) is synchronized with Host O-DU master clock (a local synchronization source) associated with one of the topologies [0088 0089]; based on a SMO learning that synchronization is lost between the synchronization chain between the RU’s clock (the clock) and the Host DU master clock (the local synchronization source) wherein the RU and DU can exchange a notification relating to a configuration in the M-plane [0076]; based on the notification, the O-RU performing switching to a new DU master clock by receiving timing information from the DU responsive to the notification [0072].
MACHIREDDY fails to explicitly teach sending to the DU to switch to a synchronization topology.
However, Krishnan et al teaches testing of validation of LLS-CI and LLS-C2 configurations [0043 0049].
By combining the teachings, the SMO can determine a reliable sync topology for O-RAN fronthaul synchronization. Using the M-plane, the O-RU can be modified to send the notification to the DU to switch the synchronization topology.
One skilled in the art would have been motivated to have determined the reliable sync topology. Therefore, it would have been obvious to one skilled to have combined the teachings.
Re Claims 5, 13, 20, MACHIREDDY teaches while the DU is in a holdover state [0072], in view Krishnan et al, the notification is sent to switch the synchronization topology.
Re Claims 8, 16, MACHIREDDY teaches once the at least in part on the O-RU clock with the timing information are synchronized and unlocked, the C-plane and U-plane traffics continues to flow between the DU and the RU without disruption [0072].
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over MACHIREDDY PG PUB 2024/0224202 in view of Krishnan et al PG PUB 2023/0083011 as applied to Claim 1 above and further in view of Boccuzzi et al PG PUB 2024/0205805.
Re Claim 6, Krishnan et al teaches the PTP GM clock supporting 1PPS TOD [0042] but fails to explicitly teach PLFS information. However, Boccuzzi et al teaches supporting PLFS [0156]. One skilled in the art would have been motivated to have supported a known protocol. Therefore, it would have been obvious to one skilled to have combined the teachings.
Allowable Subject Matter
Claims 2-4, 7, 10-12, 15 and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Re Claims 2, 10 and 18, Prior art fails to explicitly teach one or more messages indicating a synchronization topology switching timer as claimed.
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/ANDREW LEE/ Primary Examiner, Art Unit 2475
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