DETAILED ACTION
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/14/2026 has been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5, 7-9, 11, 13-16, 18 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Herring et al. [US 2021/0399450].
Regarding claim 1, Herring et al., disclose a computing device card system (figures 1-8), comprising:
a primary circuit board (304, figure 3) that includes a primary circuit board top surface (a top surface of the primary circuit board 304, figure 3), a primary circuit board bottom surface (an opposite surface of the top surface circuit board 304, figure 3) that is located opposite the primary circuit board from the primary circuit board top surface, and a primary circuit board edge (see attached figure 3) that extends between the primary circuit board top surface and the primary circuit board bottom surface and that defines a primary circuit board edge plane (see attached figure 3) that is perpendicular to the primary circuit board top surface and the primary circuit board bottom surface;
a secondary circuit board (310, figure 3) that is connected to the primary circuit board bottom surface and that includes a secondary circuit board top surface (a top surface of the secondary circuit board 310, figure 3), a secondary circuit board bottom surface (a bottom surface of the secondary circuit board 310, figure 3) that is located opposite the secondary circuit board from the secondary circuit board top surface, a secondary circuit board edge (312, figure 3) that extends between the secondary circuit board top surface and the secondary circuit board bottom surface and that defines a secondary circuit board edge plane (see attached figure 3) that is perpendicular to the secondary circuit board top surface and the secondary circuit board bottom surface, and a plurality of exposed conductive connector contact elements (314, figure 3) formed directly on the secondary circuit board top surface and the secondary circuit board bottom surface adjacent the secondary circuit board edge to provide a plurality of computing device connectors (figure 3), wherein the plurality of exposed conductive connector contact elements are configured to electrically engage a card connector (102, figures 3-4) when portions of the secondary circuit board that provide the plurality of computing device connectors are each received in a card connector slot (102, figure 3) defined by that card connector, wherein the secondary circuit board extends from the primary circuit board edge and through the primary circuit board edge plane such that the secondary circuit board edge plane is spaced apart from the primary circuit board edge plane (figure 3);
a bottom surface component envelope that is defined adjacent the primary circuitboard bottom surface and that is based on the plurality of computing device connectorsincluded on the secondary circuit board edge (figure 3); and
at least one bottom surface component that extends from the primary circuit boardbottom surface and that is located within the bottom surface component envelope (figure 3).
Regarding claim 2, Herring et al., disclose wherein the plurality of computing device connectors are Pluggable Multipurpose Module (PMM) connectors (figures 3-4).
Regarding claim 3, Herring et al., disclose wherein the plurality of computing device connectors are Peripheral Component Interconnect express (PCIe) Card ElectroMechanical (CEM) connectors (604, figure 6 or 704, figure 7).
Regarding claim 5, Herring et al., further disclose wherein the secondary circuit board (310, figure 3) is directly connected to the primary circuit board (304, figure 3).
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Regarding claim 7, Herring et al., disclose an Information Handling System (HIS, figures 1-8), comprising:
a chassis (501, figure 5);
a card connector (314, figure 3 or card connector of a secondary circuit board 510 disposed within a mating slot 550, figure 5) that is housed in the chassis; and
a card (figures 3 or 5) that is connected to the card connector, wherein the card includes:
a primary circuit board (304, figure 3) that includes a primary circuit board top surface (a top surface of the primary circuit board 304, figure 3), a primary circuit board bottom surface (an opposite surface of the top surface circuit board 304, figure 3) that is located opposite the primary circuit board from the primary circuit board top surface, and a primary circuit board edge (see attached figure 3) that extends between the primary circuit board top surface and the primary circuit board bottom surface and that defines a primary circuit board edge plane (see attached figure 3) that is perpendicular to the primary circuit board top surface and the primary circuit board bottom surface;
a secondary circuit board (310, figure 3) that is connected to the primary circuit board bottom surface and that includes a secondary circuit board top surface (a top surface of the secondary circuit board 310, figure 3), a secondary circuit board bottom surface (a bottom surface of the secondary circuit board 310, figure 3) that is located opposite the secondary circuit board from the secondary circuit board top surface, a secondary circuit board edge (312, figure 3) that extends between the secondary circuit board top surface and the secondary circuit board bottom surface and that defines a secondary circuit board edge plane (see attached figure 3) that is perpendicular to the secondary circuit board top surface and the secondary circuit board bottom surface, and a plurality of exposed conductive connector contact elements (314, figure 3) formed directly on the secondary circuit board top surface and the secondary circuit board bottom surface adjacent the secondary circuit board edge to provide a plurality of computing device connectors (figure 3), wherein the plurality of exposed conductive connector contact elements are configured to electrically engage a card connector (102, figures 3-4) when portions of the secondary circuit board that provide the plurality of computing device connectors are each received in a card connector slot (102, figure 3) defined by that card connector, wherein the secondary circuit board extends from the primary circuit board edge and through the primary circuit board edge plane such that the secondary circuit board edge plane is spaced apart from the primary circuit board edge plane (figure 3);
a bottom surface component envelope that is defined adjacent the primary circuitboard bottom surface and that is based on the plurality of computing device connectorsincluded on the secondary circuit board edge (figure 3); and
at least one bottom surface component that extends from the primary circuit boardbottom surface and that is located within the bottom surface component envelope (figure 3).
Regarding claim 8, Herring et al., disclose wherein the card connector and the plurality of computing device connectors are Pluggable Multipurpose Module (PMM) connectors (figures 3-5).
Regarding claim 9, Herring et al., disclose wherein the card connector and the plurality of computing device connectors are Peripheral Component Interconnect express (PCIe) Card ElectroMechanical (CEM) connectors (604, figure 6 or 704, figure 7).
Regarding claim 11, Herring et al., further disclose wherein the secondary circuit board (310, figure 3) is directly connected to the primary circuit board (304, figure 3).
Regarding claim 13, Herring et al., further disclose a top surface component envelope (a shell cover a primary circuit board 504, figure 5) that is located adjacent the primary circuit board top surface and that is based on the plurality of computing device connectors included on the secondary circuit board edge; and at least one top surface component (306, figure 3 or a heatsink mounted on the primary circuit board 504, figure 5) that extends from the primary circuit board top surface and that is located within the top surface component envelope.
Regarding claim 14, Herring et al., disclose a method for providing a card component envelope for a card system used with a computing device (figures 1-8), comprising:
providing a primary circuit board (304, figure 3) that includes a primary circuit board top surface (a top surface of the primary circuit board 304, figure 3), a primary circuit board bottom surface (an opposite surface of the top surface circuit board 304, figure 3) that is located opposite the primary circuit board from the primary circuit board top surface, and a primary circuit board edge (see attached figure 3) that extends between the primary circuit board top surface and the primary circuit board bottom surface and that defines a primary circuit board edge plane (see attached figure 3) that is perpendicular to the primary circuit board top surface and the primary circuit board bottom surface;
providing a secondary circuit board (310, figure 3) that includes a secondary circuit board top surface (a top surface of the secondary circuit board 310, figure 3), a secondary circuit board bottom surface (a bottom surface of the secondary circuit board 310, figure 3) that is located opposite the secondary circuit board from the secondary circuit board top surface, a secondary circuit board edge (312, figure 3) that extends between the secondary circuit board top surface and the secondary circuit board bottom surface and that defines a secondary circuit board edge plane (see attached figure 3) that is perpendicular to the secondary circuit board top surface and the secondary circuit board bottom surface, and a plurality of exposed conductive connector contact elements (314, figure 3) formed directly on the secondary circuit board top surface and the secondary circuit board bottom surface adjacent the secondary circuit board edge to provide a plurality of computing device connectors (figure 3), wherein the plurality of exposed conductive connector contact elements are configured to electrically engage a card connector (102, figures 3-4) when portions of the secondary circuit board that provide the plurality of computing device connectors are each received in a card connector slot (102, figure 3) defined by that card connector,
connecting the secondary circuit board to the primary circuit board bottom surfacesuch that the secondary circuit board extends from the primary circuit board edge andthrough the primary circuit board edge plane and the secondary circuit board edge plane is spaced apart from the primary circuit board edge plane (figure 3); and
providing, on the primary circuit board, at least one bottom surface component thatextends from the primary circuit board bottom surface and is located within a bottomsurface component envelope that is defined adjacent the primary circuit board bottomsurface and that is based on the plurality of computing device connectors included on thesecondary circuit board edge (figure 3).
Regarding claim 15, Herring et al., disclose wherein the plurality of computing device connectors are Pluggable Multipurpose Module (PMM) connectors (figures 3-4).
Regarding claim 16, Herring et al., disclose wherein the plurality of computing device connectors are Peripheral Component Interconnect express (PCIe) Card ElectroMechanical (CEM) connectors (604, figure 6 or 704, figure 7).
Regarding claim 18, Herring et al., further disclose wherein the secondary circuit board (310, figure 3) is directly connected to the primary circuit board (304, figure 3).
Regarding claim 20, Herring et al. further disclose on the primary circuit board (304, figure 3 or 504, figure 5), at least one top surface component (306, figure 3 or a heatsink disposed on the top of the primary circuit board 504, figure 5) that extends from the primary circuit board top surface and is located within a top surface component envelope (a shell cover disposed on the at least one top surface component, figure 5) that is defined adjacent the primary circuit board top surface and that is based on the plurality of computing device connectors included on the secondary circuit board edge.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4, 10 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Herring et al.
Regarding claims 4, 10 and 17, Herring et al., disclose wherein the least one top surface component includes at least one Compression Attached Memory Module (CAMM) component (306, figure 3, paragraph 0035).
Herring et al., disclose the claimed invention except for wherein the least one bottom surface component includes at least one Compression Attached Memory Module (CAMM) component.
It would have been to one of ordinary skill in the art at the time the invention was made to mount at least one compression attached memory module component on a bottom surface component of a computing card system of Herring et al., in order to rearrange a component therein the computing card system, since it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Claims 6, 12 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Herring et al., in view of another embodiment, as shown in figure 4, of Herring et al.
Regarding claims 6, 12 and 19, Herring et al., further disclose the claimed invention except for wherein the secondary circuit board is connected to the primary circuit board by a connector subsystem that is mounted to at least one of the primary circuit board and the secondary circuit board.
Herring et al., as shown in figure 4, disclose a secondary circuit board (404, figure 4) is connected to a primary circuit board (406, figure 4) by a connector subsystem (406, figure 4) that is mounted to at least one of the primary circuit board and the secondary circuit board.
It would have been to one of ordinary skill in the art at the time the invention was made to use a connector subsystem on a secondary circuit board to connect a primary circuit board in a computing card system of Herring et al., in order to provide electrical connection between a multiple circuit boards in the computing card system.
Response to Arguments
Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Castello et al. [US 2005/0215107] disclose guide receptacle with tandem mounting apparatus; and
Standing [US 2009/0108821] discloses multi-phase voltage regulation module.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Hung S. Bui whose telephone number is (571)272-2102. The examiner can normally be reached on M-F: 8am-5pm.
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/HUNG S. BUI/
Primary Examiner
Art Unit 2841
/HUNG S. BUI/Primary Examiner, 2841/2800
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