DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species B, fig. 6 (claims 1-20) in the reply filed on 8-18-2026 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 8-14, and 16-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takagi (US 2019/0269013).
[claim 1] A semiconductor package (fig. 1, 17) comprising: a core layer (100, fig. 1) ; a capacitor (109, fig. 1, [0038]) on the core layer; one or more build-up layers (120,130A/B/C, fig. 1) on the core layer, wherein the capacitor is embedded in the one or more build-up layers (fig. 1); and one or more metal layers (102/103, fig. 1, [0058][0055]) on the core layer.
[claim 2] The semiconductor package according to claim 1, wherein the one or more metal layers comprise at least one metal layer that is in contact with a surface of the core layer (fig. 1), and wherein the capacitor is in contact with the at least one metal layer (fig. 1).
[claim 3] The semiconductor package according to claim 2, wherein the one or more build-up layers comprise at least one build-up layer that covers the capacitor and the at least one metal layer (fig. 1).
[claim 4] The semiconductor package according to claim 1, wherein a thickness of the capacitor is substantially equal to a thickness of the at least one metal layer (capacitor structure as shown in fig. 17 is 110/111/112 and the at least one metal layer is 102/103, thickness of 110 , thickness of 103 may be 3 um [0062], thickness of 102 may be near zero [0058] with a total thickness near 3 um, thickness of 110 and 112 may have a thickness of 1 um each [0049] while the thickness of 111 may be 1 um for a total of 3um ).
[claim 5] The semiconductor package according to claim 1 wherein a thickness of the at least one build-up layer is greater than a thickness of the capacitor (fig. 1).
[claim 6] The semiconductor package according to claim 1, wherein a thickness of the at least one build-up layer is greater than a combination of the thickness of the capacitor and the thickness of the at least one metal layer (fig. 1).
[claim 8] The semiconductor package according to claim 1, wherein the one or more build-up layers comprise a first build-up layer (120, fig. 1) that is in contact with the core layer, and a second build-up layer (130A, fig. 1) on the first build-up layer, wherein the capacitor is disposed on the first build-up layer before the second build- up layer is formed (fig. 1).
[claim 9] The semiconductor package according to claim 1, wherein the capacitor is an active capacitor (fig. 1), and wherein the semiconductor package further comprises: a non-active capacitor (e.g. non-active capacitor is formed between the sidewalls of adjacent metal layers 103 formed on the sidewalls of 100 separated by buildup layer 120, fig. 1) that is included in a same build-up layer from the one or more build-up layers as the active capacitor.
[claim 10] The semiconductor package according to claim 1, wherein the one or more metal layers comprises a metal selected from the group consisting of copper (Cu) [0055][0087], aluminum (Al), tungsten (W), cobalt (C), titanium (Ti), tantalum (Ta), molybdenum (Mo), and ruthenium (Ru).
[claim 11] A semiconductor package (fig. 1) comprising: a core layer (100, fig. 1); a capacitor (109, fig. 1, [0038]) that is in contact with a surface on the core layer; one or more build-up layers (120,130A/B/C, fig. 1) on the core layer in which the capacitor is embedded in the one or more build-up layers; and one or more metal layers (102/103, fig. 1, [0058][0055]) on the core layer.
[claim 12] The semiconductor package of claim 11, wherein the one or more metal layers comprise at least one metal layer that is in contact with the surface of the core layer (fig.1).
[claim 13] The semiconductor package of claim 12, wherein the one or more build-up layers comprise at least one build-up layer that covers the capacitor and the at least one metal layer (fig. 1).
[claim 14] The semiconductor package of claim 11, wherein a thickness of the capacitor is substantially equal to a thickness of the at least one metal layer (capacitor structure as shown in fig. 17 is 110/111/112 and the at least one metal layer is 102/103, thickness of 110 , thickness of 103 may be 3 um [0062], thickness of 102 may be near zero [0058] with a total thickness near 3 um, thickness of 110 and 112 may have a thickness of 1 um each [0049] while the thickness of 111 may be 1 um for a total of 3um ), and wherein a thickness of the at least one build-up layer is greater than the thickness of the capacitor (fig. 1).
[claim 16] The semiconductor package according to claim 11, wherein the one or more build-up layers comprise a first build-up layer (102, fig. 1) that is in contact with the core layer (fig. 1), and a second build-up layer (130A, fig. 1) on the first build-up layer, wherein the capacitor is disposed on the first build-up layer before the second build- up layer is formed (fig. 1).
[claim 17] The semiconductor package according to claim 11, wherein the capacitor is an active capacitor (109, fig. 1), and wherein the semiconductor package further comprises: a non-active capacitor (e.g. non-active capacitor is formed between the sidewalls of adjacent metal layers 103 formed on the sidewalls of 100 separated by buildup layer 120, fig. 1) that is included in a same build-up layer from the one or more build-up layers as the active capacitor.
[claim 18] The semiconductor package according to claim 11, wherein the one or more metal layers comprises a metal selected from the group consisting of copper (Cu) [0055][0087], aluminum (Al), tungsten (W), cobalt (C), titanium (Ti), tantalum (Ta), molybdenum (Mo), and ruthenium (Ru).
[claim 19] A semiconductor device (fig. 1) comprising: a semiconductor package (fig. 1) comprising: a core layer (100, fig. 1), a capacitor (109, fig. 1, [0038]), one or more build-up layers (120,130A/B/C, fig. 1) on the core layer in which the capacitor is embedded in the one or more build-up layers, and one or more metal layers (102/103, fig. 1, [0058][0055]) on the core layer; and one or more integrated circuits (ICs) coupled to the semiconductor package [0045].
[claim 20] The semiconductor device of claim 19, wherein the capacitor is an integrated stack capacitor (ISC) (fig. 1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takagi (US 2019/0269013) in view of Kamgaing (US 2020/0219861).
Takagi discloses the semiconductor package of claims 1 and 11 further comprises: N contacts (133, fig. 1) disposed on the capacitor, wherein N is a positive integer greater than or equal to 3 (fig. 1) but does not expressly disclose that the contacts are made of metal.
Kamgaing discloses a semiconductor package which comprises contacts made of metal [0026].
It would have been obvious to one of ordinary skill in the art before the time of filing to made Takagi’s contacts out a metal in order to provide a conductor that has high conductivity.
Conclusion
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/AMAR MOVVA/Primary Examiner, Art Unit 2898
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