DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on Nov. 24, 2025 has been entered.
The following is a non-final Office Action (“Action”) after the filing of the Response with claim amendments on Nov. 24, 2025 (“Nov. Resp.”). In the Nov. Resp., claims 1, 6, 7, and 9-13 are pending, with claims 2 and 8 being canceled. Claims 1 and 3-6 are based on the claims patented in U.S. Patent No. 11,368,331 (“the ‘331 patent”), from which this reissue application is filed. Claims 7 and 9-13 are newly filed with this reissue application.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This reissue application was filed on or after September 16, 2012, therefore, all reference to 35 U.S.C. 251 and 37 CFR 1.172, 1.75, and 3.73 are to the current provisions enacted under the Leahy-Smith American Invents Act (“AIA ”). See Federal Register, Vol. 77, No. 157, pg. 48820, August 16, 2012.
Response to Arguments and Amendments
Applicant argues that “HUSTAVA ‘310 only identifies whether or not the selected slave device is capable of high-speed data response.” See Nov. Resp. 12. Applicant also argues that Asano1 “does not disclose whether the ‘Slave device address’ distinguishes multiple slave devices or the memory address of a single slave device.” Nov. Resp. 14. As Applicant further argues, “[i]n other words, ASANO merely appears to disclose that one of the devices sends commands only to the slave device address specified in ‘to Slave device address.’” Id. Lastly, Applicant argues that “ASANO appears to be completely silent about a received command not being transmitted if no destination is specified.” Id.
While the claim amendments and prior art were discussed in the interview conducted Oct. 22, 2025, and tentative agreement was reached that the claim amendments appeared to distinguish over the prior art of record, upon further review of the claim amendments, specification of the ‘331 patent, and the prior art, the proposed claim amendments do not distinguish over the prior art and Applicant’s arguments are not persuasive for the reasons below.
The limitations at issue, taking claim 1 as a representative claim of all independent claims, recite:
a control circuit that sorts and stores commands addressed to the two or more slave apparatuses … based on destination information indicating a destination of each of the commands …;
the control circuit … simultaneously transmits the commands …,
wherein among the commands received by the control circuit, one or more first commands corresponding to one or more first destinations specified by the destination information is transmitted by the control circuit, and
among the commands received by the control circuit, one or more second commands corresponding to one or more second destinations not specified by the destination information is not transmitted by the control circuit.
Based on a broadest reasonable interpretation of these limitations, consistent with the specification but not reading limitations from the specification into the claims (see MPEP § 2111.01), these limitations under understood as follows.
A control circuit organizes (e.g., sorts) and stores commands addresses to at least two slave apparatuses based on “destination information” that indicates a destination (i.e., which slave device) of each of the commands. The term “destination information” is not defined in the claim but can be reasonably interpreted as a singular address or only those destination addresses to which data is to be transmitted. See ‘331 Pat. 5:45-50, “[t]he destination information is information that indicates a destination of each [received] command … (for example, register address information).” The commands are transmitted “simultaneously” or at least during a same transmit period. Finally, at least one command of the commands is transmitted to the associated destination based on the destination information, and at least one command of the commands is not transmitted as not being identified in the destination information. In other words, taking the last two newly added “wherein” clauses together the claim requires only those commands identified in the destination information to be transmitted (e.g., simultaneously) to the addressed slave apparatuses. If only those commands associated with the destination information are transmitted, then it is also logically true that those commands not associated with the destination information, since the destination information does not identify them, are also not transmitted.
Applicant appears to be arguing that the claim language, or specifically that the “destination information” expressly identifies “destinations” that should receive a command and “destinations” that should not receive a command. However, the claim language does not define the “destination information” in this way, nor does there appear to be support for such a feature in the specification. For example, the specification describes that only “CH1 and CH3 designation[s]” are received and the corresponding commands are sent to “CH1 and CH3”, and “[i]n this case, no commands are transmitted from the master ports corresponding to CH2 and CH4.” See ‘331 Pat. 7:64-8:6. This part of the specification, while describe which of the destinations receive commands based on the “destination information,” does not describe the “destination information” as containing both information of devices that are to receive commands and information of devices that are to not receive commands.
With the above in mind, Hustava ‘310 does not just “only identif[y] whether or not the selected slave device is capable of high-speed data response,” but also sends frames to the associated slave device based on the identifier, which effectively is a command for either standard or high-speed data transmission. See Hustava ‘310, ¶¶39, 40. Thus, Applicant’s argument is not persuasive.
Asano teaches sending an identified command only to the corresponding slave device. Thus, whether or not expressly indicated in any type of information, Asano in paragraph 42 teaches “[t]he command and the selected m-tag are then sent, through lines 255, to the slave device from which the data is to be read over bus 250.” (Emphasis added.) In other words, only devices specifically addressed are sent commands and the others are not. Moreover, and consistent with the section 112(b) rejection below, the claims are not entirely clear if one or two commands are sent to the addressed slave devices. Thus, even if Asano only transmits a single command, this would be sufficient to teach the limitations as currently written.
For at least these reasons, Applicant’s arguments are not persuasive.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1, 3-7, and 9-13 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention.
Taking claim 1 as a representative claim for each of independent claims 1, 7, 12, and 13, the following limitations together make the claims unclear:
the control circuit … simultaneously transmits the commands …,
wherein among the commands received by the control circuit, one or more first commands corresponding to one or more first destinations specified by the destination information is transmitted by the control circuit, and
among the commands received by the control circuit, one or more second commands corresponding to one or more second destinations not specified by the destination information is not transmitted by the control circuit.
Based on a broadest reasonable interpretation of these limitations, the claim requires that the commands (two or more, since the term is plural) are “simultaneously” transmitted, but also that only “one … first command” of the commands is transmitted, while the rest may not be. Thus, the claim requires that at least two commands are simultaneously transmitted and that only one command of the commands is transmitted. As a result, it is unclear if just one or at least two commands are transmitted. Similar limitations are recited in independent claims 7, 12, and 13, and thus, these claims are also unclear for the same reasons.
Accordingly, independent claims 1, 6, 7, 12, and 13 are rejected as indefinite under section 112(b), as are dependent claims 3-5 and 9-11 for depending from a rejected base claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
The following applies to all rejections below, absent any discussion elaborating on any of the elements. Regarding element 1, the scope and contents of the prior art are evident based on the citations and explanations provided in the rejections below. See MPEP § 2141(II)(A). Regarding element 2, the differences between the prior art and claims are noted in the rejections below. See MPEP § 2141(II)(B). Regarding element 3, the level of ordinary skill is expressly or implicitly found in the prior art of record as applied in the rejections below, where the teachings of the art show a presumed knowledge of the relevant art at the relevant time. See MPEP §§ 2141(II)(C), 2141.03(III). Regarding element 4, to the extent that there is evidence available as to secondary considerations, they will be addressed below, otherwise, it is assumed there are no secondary considerations to take into account.
Claims 7 and 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Hustava ‘3102 in view of Hustava ‘6533, both of which are in the same field of bus communications as the claimed invention.
Claim 7
Claim 7 recites and Hustava ‘310 teaches:
A communication apparatus configured to be mounted on a vehicle as a master apparatus (Hustava ‘310, ¶30, Fig. 5, serial bus bridges 506A-C, which are mounted on a vehicle as shown in Fig. 1 and act as master apparatuses to control and send/receive data from their respective slave devices 510A-C), the communication apparatus comprising:
a slave port which, in operation, is used in communication with an on-vehicle control apparatus (Hustava ‘310, ¶30, Fig. 5, the SPI/I2C INTERFACE is a slave port in that it connects to the slave devices 510A-C and is in communication with ECU (electronic control unit) 502, which is “an on-vehicle control apparatus,” see Figs. 1, 2);
two or more master ports which, in operation, are paired with two or more slave apparatuses installed on the vehicle, and communicate with the two or more slave apparatuses using different channels … (Hustava ‘310, ¶30, Fig. 5, the UART00-11 are master ports paired with the slave devices 510A-C and communication on different channels, e.g., “CH00,” “CH01,” “CH02,” etc.); and
a control circuit which, in operation, receives commands addressed to the two or more slave apparatuses respectively, destination information indicating a destination of each of the commands (Hustava ‘310, ¶30, the serial bus bridges 506A-C “may be, e.g., a MAX14830 Quad Serial UART with FIFO chip from Maxim Integrated,” and that “[t]he datasheets for these chips are hereby incorporated herein by reference,” as such, turning to MAX14830 Datasheet4, Functional Diagram, p. 7, the “REGISTERS AND CONTROL” is a control circuit that stores, through the registers, data and commands for sorting to the respective UART_, see p. 18, left column, ¶1, further, Hustava ‘310 teaches that each of the slave devices receives commands addressed to it (see id. at ¶¶39-41) and this can be done “concurrently,” (see id. at ¶42) thus, these commands are considered sent based on their respective destination information), and a trigger instructing transmission of the commands from the on-vehicle control apparatus, and simultaneously transmits the commands with the two or more master ports respectively based on the trigger (Hustava ‘310, ¶30, the serial bus bridges 506A-C can receive a trigger command to simultaneously transmit buffered data, including control data, to the corresponding slave devices, as evidenced by the functionality described in the MAX14830 Datasheet, p. 1, left column, ¶3, p. 23, left column, ¶3-right column, ¶3),
wherein among the commands received by the control circuit, one or more first commands corresponding to one or more first destinations specified by the destination information is transmitted by the control circuit (Hustava ‘310, ¶¶30, 39, 40, the identifier identifies the slave device that is to receive the command, such as the “standard” or “compliant” frame header that elicits a response, see e.g., Fig. 9), and
among the commands received by the control circuit, one or more second commands corresponding to one or more second destinations not specified by the destination information is not transmitted by the control circuit (Hustava ‘310, ¶¶30, 39, 40, only those messages intended to specific slave devices are sent, thus, those not addressed to not receive commands/messages).
Hustava ‘310 is silent as to the remaining limitations, including that the “communication with the two or more slave apparatuses [is] based on Distributed System Interface 3 (DSI3) protocol.” Hustava ‘653 partially this and teaches that master and slave devices can use the DSI3 protocol for communication. See Hustava ‘653, ¶¶3, 28. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the DSI protocol, such as in Hustava ‘653, with the apparatus of Hustava ‘310 because (1) a communications protocol must be used in systems with two nodes communicating to account for accurate signal transmission, reception, encoding, decoding, etc., and (2) the DSI3, in particular, requires only a single conductor operating in a half-duplex mode, thus, a “one-wire” system can be used for both transmission and reception of data between nodes resulting in a simpler system to implement and increased data rate. See id. ¶34, Abstract.
Claim 10
Claim 10 recites and Hustava ‘310 teaches “at least one of the two or more master ports is configured to be connected to at least two of the two or more slave apparatuses by parallel bus connection.” Hustava ‘310, ¶30, Fig. 5, the slave devices S00, S04, S08, S12, for example, are connected in parallel.
Claim 11
Claim 11 recites and Hustava ‘310 teaches “at least one of the two or more slave apparatuses is an ultrasonic sonar sensor that performs sensing of a periphery of the vehicle.” Hustava ‘310, ¶¶23-26, Fig. 2, among the many sensors includes an ultrasonic (sonar) sensor.
Claim 12
Claim 12 recites and Hustava ‘310 and Hustava ‘653 teach:
A communication system (Hustava ‘310, ¶30, Fig. 5) comprising:
the communication apparatus according to claim 7 which, in operation, is the master apparatus (Hustava ‘310, Fig. 5, the serial bus bridges 506A-C and Hustava ‘653 as explained above in the rejection of claim 7);
the two or more slave apparatuses which, in operation, communicate with the communication apparatus (Hustava ‘310, ¶30, Fig. 5, slave devices S00-S47); and
an on-vehicle control apparatus which, in operation, communicates with the communication apparatus (Hustava ‘310, ¶30, Fig. 5, ECU 502).
As noted above in the rejection of claim 7, Hustava ‘310 is silent as to the communication with the two or more slave apparatuses is “based on Distributed System Interface 3 (DSI3) protocol.” Hustava ‘653 remedies this and teaches that master and slave devices can use the DSI3 protocol for communication. See Hustava ‘653, ¶28. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the a DSI3 protocol, such as in Hustava ‘653, with the apparatus of Hustava ‘310 because (1) a communications protocol must be used in systems with two nodes communicating to account for accurate signal transmission, reception, encoding, decoding, etc., and (2) the DSI3, in particular, requires only a single conductor operating in a half-duplex mode, thus, a “one-wire” system can be used for both transmission and reception of data between nodes resulting in a simpler system to implement and increased data rate. See id. ¶34, Abstract.
Claim 13
Claim 13 recites and Hustava ‘310 teaches:
A communication apparatus configured to be mounted on a vehicle as a master apparatus (Hustava ‘310, ¶30, Fig. 5, serial bus bridges 506A-C, which are mounted on a vehicle as shown in Fig. 1 and act as master apparatuses to control and send/receive data from their respective slave devices 510A-C), the communication apparatus comprising:
a slave port that is used in communication with an on-vehicle control apparatus (Hustava ‘310, ¶30, Fig. 5, the SPI/I2C INTERFACE is a slave port in that it connects to the slave devices 510A-C and is in communication with ECU (electronic control unit) 502, which is “an on-vehicle control apparatus,” see Figs. 1, 2);
two or more master ports that are paired with two or more slave apparatuses installed on the vehicle, and communicate with the two or more slave apparatuses using different channels … (Hustava ‘310, ¶30, Fig. 5, the UART00-11 are master ports paired with the slave devices 510A-C and communication on different channels, e.g., “CH00,” “CH01,” “CH02,” etc.); and
a control circuit which, in operation, receives a command group from the on-vehicle control apparatus, the command group including commands addressed to the two or more slave apparatuses respectively and destination information indicating a destination information indicating a destination of each of the commands (Hustava ‘310, ¶30, the serial bus bridges 506A-C “may be, e.g., a MAX14830 Quad Serial UART with FIFO chip from Maxim Integrated,” and that “[t]he datasheets for these chips are hereby incorporated herein by reference,” as such, turning to MAX14830 Datasheet5, Functional Diagram, p. 7, the “REGISTERS AND CONTROL” is a control circuit that stores, through the registers, data and commands for sorting to the respective UART_, see p. 18, left column, ¶1, further, Hustava ‘310 teaches that each of the slave devices receives commands addressed to it (see id. at ¶¶39-41) and this can be done “concurrently,” (see id. at ¶42) thus, these commands are considered part of a “command group” and sent based on their respective destination information), and simultaneously transmits the commands from the two or more master ports, respectively, after receiving the command group (Hustava ‘310, ¶30, the serial bus bridges 506A-C can receive a trigger command to simultaneously transmit buffered data, including control data, to the corresponding slave devices, as evidenced by the functionality described in the MAX14830 Datasheet, p. 1, left column, ¶3, p. 23, left column, ¶3 to right column, ¶3; see also Hustava ‘310, ¶¶39-42, with “concurrently” transmitted commands), wherein
among the commands received by the control circuit, one or more first commands corresponding to one or more first destinations specified by the destination information is transmitted by the control circuit (Hustava ‘310, ¶¶30, 39, 40, the identifier identifies the slave device that is to receive the command, such as the “standard” or “compliant” frame header that elicits a response, see e.g., Fig. 9), and
among the commands received by the control circuit, one or more second commands corresponding to one or more second destinations not specified by the destination information is not transmitted by the control circuit (Hustava ‘310, ¶¶30, 39, 40, only those messages intended to specific slave devices are sent, thus, those not addressed to not receive commands/messages).
Hustava ‘310 is silent as to the remaining limitations, including that the “communication with the two or more slave apparatuses [is] based on Distributed System Interface 3 (DSI3) protocol.” Hustava ‘653 partially this and teaches that master and slave devices can use the DSI3 protocol for communication. See Hustava ‘653, ¶¶3, 28. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the DSI3 protocol, such as in Hustava ‘653, with the apparatus of Hustava ‘310 because (1) a communications protocol must be used in systems with two nodes communicating to account for accurate signal transmission, reception, encoding, decoding, etc., and (2) the DSI3, in particular, requires only a single conductor operating in a half-duplex mode, thus, a “one-wire” system can be used for both transmission and reception of data between nodes resulting in a simpler system to implement and increased data rate. See id. ¶34, Abstract.
Claims 1 and 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Hustava ‘310 in view of Hustava ‘653, and in further view of Asano6, all of which are in the same field of master/slave communications as the claimed invention.
Claim 1
Claim 1 recites and Hustava ‘310 teaches:
A communication apparatus configured to be mounted on a vehicle as a master apparatus (Hustava ‘310 ¶30, Fig. 5, serial bus bridges 506A-C, which are mounted on a vehicle as shown in Fig. 1 and act as master apparatuses to control and send/receive data from their respective slave devices 510A-C), the communication apparatus comprising:
a slave port that is used in communication with an on-vehicle control apparatus (Hustava ‘310 ¶30, Fig. 5, the SPI/I2C INTERFACE is a slave port in that it connects to the slave devices 510A-C and is in communication with ECU (electronic control unit) 502, which is “an on-vehicle control apparatus,” see Figs. 1, 2);
two or more master ports that are paired with two or more slave apparatuses installed on the vehicle, and communicate with the two or more slave apparatuses using different channels … (Hustava ‘310 ¶30, Fig. 5, the UART00-11 are master ports paired with the slave devices 510A-C and communication on different channels, e.g., “CH00,” “CH01,” “CH02,” etc.);
two or more buffer memories that are paired with the two or more master ports (Hustava ‘310 ¶30, each of the UART00-11 has a “FIFO” for buffering transmitted/received data streams); and
a control circuit that sorts and stores commands addressed to the two or more slave apparatuses, respectively, received from the on-vehicle control apparatus into the two or more buffer memories, respectively, … (Hustava ‘310 ¶30, the serial bus bridges 506A-C “may be, e.g., a MAX14830 Quad Serial UART with FIFO chip from Maxim Integrated,” and that “[t]he datasheets for these chips are hereby incorporated herein by reference,” as such, turning to MAX14830 Datasheet7, Functional Diagram, p. 7, the “REGISTERS AND CONTROL” is a control circuit that stores, through the registers, data and commands for sorting to the respective UART_, see p. 18, left column, ¶1) and after the control circuit receives a trigger instructing transmission of the commands from the on-vehicle control apparatus, the control circuit reads the commands from the two or more buffer memories, and simultaneously transmits the commands from the two or more master ports, respectively (Hustava ‘310 ¶30, the serial bus bridges 506A-C can receive a trigger command to simultaneously transmit buffered data, including control data, to the corresponding slave devices, as evidenced by the functionality described in the MAX14830 Datasheet, p. 1, left column, ¶3, p. 23, left column, ¶3-right column, ¶3),
wherein among the commands received by the control circuit, one or more first commands corresponding to one or more first destinations specified by the destination information is transmitted by the control circuit (Hustava ‘310, ¶¶30, 39, 40, the identifier identifies the slave device that is to receive the command, such as the “standard” or “compliant” frame header that elicits a response, see e.g., Fig. 9), and
among the commands received by the control circuit, one or more second commands corresponding to one or more second destinations not specified by the destination information is not transmitted by the control circuit (Hustava ‘310, ¶¶30, 39, 40, only those messages intended to specific slave devices are sent, thus, those not addressed to not receive commands/messages).
Hustava ‘310 is silent as to the remaining limitations, including that the “communication with the two or more slave apparatuses [is] based on Distributed System Interface (DSI) protocol.” Hustava ‘653 partially this and teaches that master and slave devices can use the DSI protocol for communication. See Hustava ‘653, ¶¶3, 28. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the DSI protocol, such as in Hustava ‘653, with the apparatus of Hustava ‘310 because (1) a communications protocol must be used in systems with two nodes communicating to account for accurate signal transmission, reception, encoding, decoding, etc., and (2) the DSI3, in particular, requires only a single conductor operating in a half-duplex mode, thus, a “one-wire” system can be used for both transmission and reception of data between nodes resulting in a simpler system to implement and increased data rate. See id. ¶34, Abstract.
Neither Hustava ‘310 nor Hustava ‘653 teach the additional limitation added in the Aug. Resp. Asano remedies this and teaches sorting and storing “commands addressed to the two or more slave apparatuses … based on destination information indicating a destination of each of the commands received.” Asano, ¶¶41-42, 52-55, Figs. 1-4, a command is stored in buffer 230 of the master device 115, 120, 210 and then sent to the respective slave device 125, 130, 310 (see Fig. 4, “to Slave device address”) for execution of the command based on an address of the slave device. As a result, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to expressly store and sort commands in a master device for respective slave devices, as in Asano, in the combination of Hustava ‘310 and Hustava ‘653 to make use of using multiple devices to share in “computational load,” such as master and slave devices, but also to make more efficient use of such systems because there will be read/write commands happening at various phases for each of the slave devices, such as by using the tag-based system in Asano. See Asano, ¶¶5, 7, 10-11.
Claim 4
Claim 4 recites and Hustava ‘310 teaches “at least two of the two or more slave apparatuses are connected to at least one of the two or more master ports by parallel bus connection.” Hustava ‘310, ¶30, Fig. 5, the slave devices S00, S04, S08, S12, for example, are connected in parallel.
Claim 5
Claim 5 recites and Hustava ‘310 teaches “at least one of the two or more slave apparatuses is an ultrasonic sonar sensor that performs sensing of a periphery of the vehicle.” Hustava ‘310, ¶¶23-26, Fig. 2, among the many sensors includes an ultrasonic (sonar) sensor.
Claim 6
Claim 6 recites and Hustava ‘310, Hustava ‘653, and Asano teach:
A communication system (Hustava ‘310, ¶30, Fig. 5) comprising:
the communication apparatus according to claim 1 that is used as a master apparatus (Hustava ‘310, Fig. 5, the serial bus bridges 506A-C, Hustava ‘653, and Asano as explained above in the rejection of claim 1);
the two or more slave apparatuses that communicate with the communication apparatus (Hustava ‘310, ¶30, Fig. 5, slave devices S00-S47); and
the on-vehicle control apparatus that communicates with the communication apparatus (Hustava ‘310, ¶30, Fig. 5, ECU 502).
As noted above, in the rejection of claim 1, Hustava ‘310 is silent as to the communication with the two or more slave apparatuses is “based on Distributed System Interface (DSI) protocol,” as further recited in claim 1. Hustava ‘653 remedies this and teaches that master and slave devices can use the DSI protocol for communication. See Hustava ‘653, ¶28. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the a DSI3 protocol, such as in Hustava ‘653, with the apparatus of Hustava ‘310 because (1) a communications protocol must be used in systems with two nodes communicating to account for accurate signal transmission, reception, encoding, decoding, etc., and (2) the DSI3, in particular, requires only a single conductor operating in a half-duplex mode, thus, a “one-wire” system can be used for both transmission and reception of data between nodes resulting in a simpler system to implement and increased data rate. See id. ¶34, Abstract.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Hustava ‘310, Hustava ‘653, and Asano, and in further in view of Monreal, all of which are in the same field of bus communications as the claimed invention.
Claim 3
Claim 3 recites “at least two of the two or more slave apparatuses are connected to at least one of the two or more master ports by daisy chain connection.” None of Hustava ‘310, Hustava ‘653, or Asano explicitly teach that at least two of the slave devices are connected in a daisy chain configuration to one of the master ports. Even so, Monreal remedies this and teaches that in a master and slave bus architecture, the slave devices may be connected in a daisy chain configuration to one of the master devices. See Monreal 2:66-3:20, 3:49-52, the slave components 18a-18d are connected in daisy chain connection to the master component 14. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the slave devices of the combination of Hustava ‘310, Hustava ‘653, and Asano in a daisy chain configuration, as in Monreal, to realize several advantages, including “electrical components are self-addressable,” such that “the address defines a position of an electrical component in the daisy chain with respect to the other electrical components,” and “each electrical component may be fabricated generically so that if an electrical component fails anywhere in the daisy chain system, it can be easily replaced by any other electrical component without any modifications.” Id. at 3:2-17.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Hustava ‘310 and Hustava ‘653, and in further in view of Monreal, all of which are in the same field of bus communications as the claimed invention.
Claim 9
Claim 9 recites “at least one of the two or more master ports is configured to be connected to at least two of the two or more slave apparatuses by daisy chain connection.” Neither Hustava ‘310 nor Hustava ‘653 explicitly teach that at least two of the slave devices are connected in a daisy chain configuration to one of the master ports. Even so, Monreal remedies this and teaches that in a master and slave bus architecture, the slave devices may be connected in a daisy chain configuration to one of the master devices. See Monreal 2:66-3:20, 3:49-52, the slave components 18a-18d are connected in daisy chain connection to the master component 14. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the slave devices of the combination of Hustava ‘310 and Hustava ‘653 in a daisy chain configuration, as in Monreal, to realize several advantages, including “electrical components are self-addressable,” such that “the address defines a position of an electrical component in the daisy chain with respect to the other electrical components,” and “each electrical component may be fabricated generically so that if an electrical component fails anywhere in the daisy chain system, it can be easily replaced by any other electrical component without any modifications.” Id. at 3:2-17.
Amendments in Reissue Applications
Amendments made during examination of a reissue application are different than amendments made during examination of a standard utility application. See 37 CFR § 1.173; see also MPEP § 1453.
A few notable, but by no means the only, differences are:
Throughout examination of a reissue application, amendments are always with respect to the original patent regardless of any amendments that have already been filed. See 37 CFR § 1.173(g).
Deleted limitations must be shown in single brackets while newly added limitations and the entirety of newly added claims are underlined, including number and status identifier. See 37 CFR § 1.173(d).
Changes to the specification must mention where in the issued patent (i.e., column and lines numbers) the changes are to be made and the entirety of an amended paragraph must be presented, unless canceling the paragraph. See 37 CFR § 1.173(b)(1)(i); see also MPEP § 1453, subsection V.A., Example (1).
Status identifiers, after the first amendment, must indicate how many times an original patent claim has been amended during examination of the reissue application (e.g., “Twice Amended”, etc.). See 37 CFR § 1.173(b)(2).
When claims are amended, “there must also be supplied, on pages separate from the pages containing the changes, the status (i.e., pending or canceled), as of the date of the amendment, of all patent claims and of all added claims, and an explanation of the support in the disclosure of the patent for the changes made to the claims.” 37 CFR § 1.173(c).
Applicant Obligations
Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceed-ing in which Patent No. 11,368,331 is or was involved. These proceedings would include interferences, reissues, reexaminations, post-grant proceedings before the Patent Trial and Appeal Board, and litigation.
Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is mate-rial to patentability of the claims under consideration in this reissue appli-cation.
These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04.
Conclusion
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/JOSHUA KADING/ Reexamination Specialist, Art Unit 3993
Conferees:
/Laura Davison/ Reexamination Specialist, Art Unit 3993
/EILEEN D LILLIS/ SPRS, Art Unit 3993
1 U.S. Patent Application Publication No. 2006/0236008 A1, to Asano et al. (“Asano”).
2 U.S. Patent Application Publication No. 2019/0158310 A1, to Hustava et al. (“Hustava ‘310”).
3 U.S. Patent Application Publication No. 2019/0153653 A1, to Hustava et al. (“Hustava ‘653”).
4 Hustava ‘310 teaches that the serial bus bridges 506A-C can be the MAX14830 Quad Serial UART with FIFO chip and that the corresponding datasheet is incorporated by reference. See Hustava ‘310, ¶30. As a result, the MAX14830 Datasheet referenced in the rejections is merely provided to describe in more detail the inherent characteristics of the MAX14830 Quad Serial UART with FIFO chip. See MPEP § 2131.01, subsection III.
5 See supra footnote 3.
6 See supra footnote 1.
7 See supra footnote 3.
Prosecution Insights