Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are presented for Examination.
DETAILED ACTION
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts for described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
1) Claim limitations [1]:
“ a controller configured to: drive the power stage; ..”
have been interpreted under 35 U.S.C. 112(f) because they use a generic placeholder:
“ a controller ”
Since the claim limitation(s) invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, claim 1have been interpreted to cover the corresponding structure described in the specification that achieves the claimed function, and equivalents thereof.
A review of the specification shows that the following appears to be the corresponding structure described in the specification for the 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph limitation:
“ a controller” [Para 0018, 0020; Fig.1, “102”]
If applicant wishes to provide further explanation or dispute the examiner’s interpretation of the corresponding structure, applicant must identify the corresponding structure with reference to the specification by page and line number, and to the drawing, if any, by reference characters in response to this Office action.
If applicant does not intend to have the claim limitation(s) treated under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112 , sixth paragraph, applicant may amend the claim(s) so that it/they will clearly not invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, or present a sufficient showing that the claim recites/recite sufficient structure, material, or acts for performing the claimed function to preclude application of 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
For more information, see MPEP § 2173 et seq. and Supplementary Examination Guidelines for Determining Compliance With 35 U.S.C. 112 and for Treatment of Related Issues in Patent Applications, 76 FR 7162, 7167 (Feb. 9, 2011).
Claim Rejections - 35 USC § 101
Claims 1-9 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
a) Regarding claim 1,
i) The limitations “determine information related to the power stage based on the telemetry data”, is a process that under its broadest reasonable interpretation, is performing the evaluation in the human mind.
Hence the limitation falls into the “mental process” group of abstract ideas.
ii)The judicial exception is not integrated into a practical application because the additional elements, “a power stage configured to output a voltage” , a controller configured to: drive the power stage and “transmit the determined information via a network communication“ are performed by generic components “ a controller”, “ a power stage” that is well-understood, routine or conventional .
The limitation “receive telemetry data related to the power stage”, which amounts to mere data gathering which amounts to mere data gathering is an insignificant extra-solution activity.
As explained by the Supreme court , the addition of insignificant extra-solution activity does not amount to an inventive concept, particularly when the activity is well understood or conventional.
The combination of these additional elements is no more than insignificant extra solution activity that provides data for the exception, with mere instructions to apply the exception using a generic computer component (the controller). Accordingly, even in combination, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to the abstract idea.
iii) The claim does not include additional elements that are sufficient amount to significantly more than the judicial exception. A Controller, a Power stage are all generic components. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements recite insignificant extra-solution activity that is well understood, routine and conventional.
Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The claims are not patent eligible.
b) Regarding claim 2 the judicial exception is not integrated into a practical application because the additional elements of the telemetry data comprises an input current of the power stage, an output current of the power stage, an input voltage of the power stage, an output voltage of the power stage, a temperature of the power stage, or communication data packets.”, which amounts to mere data gathering is an insignificant extra-solution activity.
The combination of these additional elements is no more than insignificant extra solution activity that provides data for the exception, with mere instructions to apply the exception using generic computer components. Accordingly, even in combination, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea as stated above in claims 1.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. Mere instructions to apply an exception cannot provide an inventive concept. The claims are not patent eligible.
c) Regarding claims 6, 8 the judicial exception is not integrated into a practical application because the additional elements “the first controller is configured to output the determined information to a second controller to transmit the determined information to an external storage device.”, “a buffer configured to store a number of samples of the telemetry data.”, are generic components that is well-known or conventional.
The combination of these additional elements is no more than insignificant extra solution activity that provides data for the exception, with mere instructions to apply the exception using generic computer components. Accordingly, even in combination, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea as stated above in claims 1.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. Mere instructions to apply an exception cannot provide an inventive concept. The claims are not patent eligible.
c) Regarding claim 7, the judicial exception is not integrated into a practical application because the additional elements of “ identify a number of malformed communication packets.”, under its broadest reasonable interpretations is performing the evaluation in the human mind.
Hence the limitation falls into the “mental process” group of abstract ideas.
The combination of these additional elements is a mental process . Accordingly, even in combination, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea as stated above in claims 1, 7, 20.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. Mere instructions to apply an exception cannot provide an inventive concept. The claims are not patent eligible.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 16, 17, 18 is/are rejected under 35 U.S.C. 102(a) (1) as being anticipated by Zhu et.al. (U.S Patent Application Publication 2023/0097568; hereinafter “Zhu”].
Regarding Claim 16, Zhu discloses , an apparatus comprising:
a driver including an input terminal and an output terminal, the output terminal of the driver structured adapted to be coupled to a power stage[0016;“At a high level, controller 102 monitors the power (and phase) of each of phases A, B, and C (i.e., monitors the current and voltage of each of the phases) as indicated by power measurements 112A, 112B, and 112C, to detect whether the phases are balanced or unbalanced with respect to power loading across the phases. When controller 102 detects that the phases are unbalanced, the controller generates PWM control signals 110A, 110B, and 110C to control power inverters 104A, 104B, and 104C, which in turn control supplemental powers (A-B, A-C), (B-A, B-C), and (C-A, C-B) that are supplied to and summed at loads 106, to restore balance across the phases. For example, when controller 102 detects an unbalance among the three phases, the controller controls one or more of power inverters 104 to drain and convert a certain amount of power, with appropriate phase shifting, from one or more relatively lighter loaded phases to supplemental power, and feed the supplemental power to one or more relatively heavier loaded phase to restore/achieve balance.”, 0017; Fig.1; Fig.5; ( i.e. the controller corresponds to a driver that is structured to be coupled to the power phases via the respective power inverters based on the inputs received from the power sensors)]
a first analog-to-digital converter including an input terminal and an output terminal, the input terminal of the first analog-to-digital converter structured adapted to be coupled to at least one of a terminal of a power converter, a terminal of the power stage, or a terminal of a load device; [“The power sensors provide to controller 102 phase A power measurements 112A, phase B power measurements 112B, and phase C power measurements 112C. In one example, the power sensors may include analog-to-digital converters (ADCs) to digitize phase A, B, and C currents and voltages, and provide their digitized representations or waveforms to controller 102 as the power measurements. In another example, the power sensors may include voltage and current sensors to measure the voltage and current of each phase, and ADCs to digitize the current and voltage measurements, and provide the digitized measurements to controller 102 as the power measurements. An example set of power sensors is described below in connection with FIG. 4.”, 0016; “Power sensor arrangement 400 includes a current sensor A and a voltage sensor V coupled to terminal TA and load 106A to provide analog current and voltage measurements of phase A to inputs of respective ADCs 402 and 404. ADC 402 digitizes the analog current measurement into a digitized current measurement MI and provides the same to controller 102..”, 0039]
second analog-to-digital converter including an input terminal and an output terminal, the input terminal of the second analog-to-digital converter structured adapted to be coupled to at least one of the terminal of the power converter, the terminal of the power stage, or the terminal of the load device[ 0016; “ ..ADC 404 digitizes the analog voltage measurement into a digitized voltage measurement MV and provides the same controller 102. Respective power sensors associated with phases B and C may be configured similarly to the power sensors in FIG. 4]; and
digital circuitry including an output terminal, a first input terminal, and a second input terminal, the output terminal of the digital circuitry coupled to the input terminal of the driver, the first input terminal of the digital circuitry coupled to the output terminal of the first analog-to-digital converter, the second input terminal of the digital circuitry coupled to the output terminal of the second analog-to-digital converter [“In another example, the power sensors may include voltage and current sensors to measure the voltage and current of each phase, and ADCs to digitize the current and voltage measurements, and provide the digitized measurements to controller 102 as the power measurements.,. 0016; 0039; Fig.1, 4; ( i.e the digitized output of the analog-to-digital converters (ADCs) are coupled the controller / driver )].
Regarding Claim 17, Zhu discloses, wherein: the first analog-to-digital converter structured adapted to be coupled to a supply voltage terminal of the power stage[0016; 0039; Fig.4] ; and the second analog-to-digital converter structured adapted to be coupled to the load device via an interface [0023;0016; 0039; Fig.4].
Regarding Claim 18, Zhu discloses wherein the first analog-to-digital converter is structured to be coupled to an output terminal of the power stage[0016-0017; 0023-0024; Fig.1] .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6, 8-12, 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over in view of Schurmann et.al. (U.S Patent Application Publication 10, 666279; hereinafter “Schurmann”) in view of Nicholson et.al. (U.S Patent Application Publication 2013/0253861; hereinafter “Nicholson”].
Regarding Claim 1, Schurmann discloses , An apparatus comprising:
a power stage configured to output a voltage[“the multi-phase power supply 105 includes a controller 120, and a plurality of power stages 125A, 125B, . . . 125N… Each of the plurality of amplifiers 160A, 160B, . . . 160N is configured to couple to a respective one of the plurality of power stages 125A, 125B, . . . 125N (sometimes referred to as power phases) to provide measured and/or sensed data to the sequencer from the respective one of the plurality of power stages 125A, 125B, . . . 125N. ..”, col 4 lines 33-67; ““the measurements are related to operating temperatures of the plurality of power stages 125A, 125B, . . . 125N, while in other examples the measurements are related to voltage outputs of the plurality of power stages 125A, 125B, . . . 125N ..”, col 6 lines 10-22] and
a controller configured to[“a controller 120”, Fig.1] :
drive the power stage[ “ the controller 120 is configured to perform self-calibration to optimize performance of the multi-phase power supply 105. The self-calibration, in various examples, adapts for, compensates for, mitigates, and or otherwise makes adjustment to the multi-phase power supply 105 for, one or more errors associated with the multi-phase power supply 105. The errors can include, for example, systematic errors..”, col 5 lines 42-60; “the self-calibration includes applying a known, calibrated load to the multi-phase power supply 105 and the controller 120 controlling the plurality of power stages 125A, 125B, . . . 125N to each be individually active at any particular time to determine calibration metrics associated with each respective power stage of the plurality of power stages 125A, 125B, . . . 125N. For example, the controller 120 controls the power stage 125A to be on and the power stages 125B and 125N to be off while one or more measurements of characteristics associated with the power stage 125A are performed…”, col 5 lines 60-67; col 7 lines 1-10 ] ;
receive telemetry data related to the power stage [ “the controller 120 includes a digital logic and memory 130, a loop controller 135, a phase manager 140 (sometimes referred to as phase control logic), a communication interface 145, an analog-to-digital converter (ADC) 150…” The sequencer 155 is configured to receive signals from each of the plurality of amplifiers 160A, 160B . . . 160N and provide those signals individually to the ADC 150, for example, by switching an output of the sequencer 155 among the signals received from each of the plurality of amplifiers 160A, 160B, . . . 160N ..”, col 4 lines 33-67; Fig.1; “ the controller receives an analog signal representative of the output of the active phase of the power supply at a terminal of the controller and converts that analog signal to a digital signal for processing and/or storage by digital structures (e.g., such as digital logic or processing devices) of the controller..”, col 7 lines 39-44;]
determine information related to the power stage based on the telemetry data[“..the CPU polls the controller to determine operational characteristics of the power supply, such as a temperature of the power supply, temperature of one or more power stages of the power supply, output current of the power supply, output voltage of the power supply, etc…”, col 3 lines 1-30; “the measurements are related to operating temperatures of the plurality of power stages 125A, 125B, . . . 125N, while in other examples the measurements are related to voltage outputs of the plurality of power stages 125A, 125B, . . . 125N and in yet other examples the measurements are related to current outputs of the plurality of power stages 125A, 125B, . . . 125N. In various examples, any number of measurements of characteristics associated with each of the plurality of power stages 125A, 125B, . . . 125N are performed and to obtain any form of data available from each of the plurality of power stages 125A, 125B, . . . 125N”, col 6 lines 10-22; “the controller determines a current offset associated with the active phase of the power supply.. the controller determines the offset by subtracting one of the measurement captured at operation 315 or the value conveyed to the controller in the transactional message at operation 210 from the other of the measurement captured at operation 315 ..”, col 7 lines 39-44]; and
However, Schurmann does not expressly disclose transmitting, by the controller, the power stage characteristic.
In the same field of endeavor ( e.g. monitoring the power usage data of the outlets / receptacles receiving power from the respective rack-mounted power distribution units (PDUs) and controlling over the network using the network power manager to balance the power phases of the PDU), Nicholson teaches,
transmitting, by the controller[“The intelligent power module 514”,(IPM) Fig.5], the power stage characteristic[“a rack-mounted PDU having a network communication interface may be coupled to a network power manager over a network (e.g., over an Ethernet or the Internet), ..”, 0032; “The IPM 514 may also provide power state sensing and/or load-sensing with respect to the corresponding power outlet(s)..”, 0033 “The network power manager 504 of FIG. 5 communicates with the power manager agent 510 and IPM 514. The network power manager 504 may receive information from, and provide instructions to, the IPM 514 and power manager agent 510. The network power manager 504 may also receive related power measurements from the IPM 514 and report power information related to the PDU 500 and one or more individual outlets (and thus power information for individual assets powered by the outlet) of the PDU 500.”, 0034. Fig.5; ( i.e the controller(IPM) determines the power information of the outlets based on the voltage and current sensor data and transmits the power characteristic of the outlet to the network power manager.)].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Schurmann with Nicholson. Nicholson’s teaching of configuring , monitoring and controlling the power characteristics of the power distribution units (PDUs) by a network power manager ill substantially improve Schurmann’s system to “monitor the power usage of power feed circuits that supply power to equipment racks in a data center, but are useful in mapping and managing the physical infrastructure of the power systems feeding one or many electrical equipment racks, thereby enabling a user to determine where losses in efficiency exist as a result of conditions such as power system overload, underuse or imbalance. These conditions can exist, and can be monitored, at the PDU level, at the cabinet level, within a row of cabinets, within a zone, or at any other group, level or location that a user defines”, [0058].
Regarding Claim 2, Schurmann discloses wherein the telemetry data comprises an input current of the power stage, an output current of the power stage, an input voltage of the power stage, an output voltage of the power stage, a temperature of the power stage, or communication data packets [col 6 lines 10-22].
Regarding Claim 3, Schurmann discloses including an inductive device and a capacitor coupled between a load device and the power stage [col 5 lines 30-40].
Regarding Claim 4, Schurmann discloses wherein the information comprises a capacitance of the capacitor, an equivalent series inductance of the capacitor, an effective series resistance of the capacitor, an output inductance of the inductive device, a impedance of the inductive device, a impedance of a power distribution network path, an efficiency of the power stage, a leakage current of the power stage, an output power, a timestamp, inductor core loss, cooling failures, or a communication issue [ “ the controller 120 is configured to perform self-calibration to optimize performance of the multi-phase power supply 105. The self-calibration, in various examples, adapts for, compensates for, mitigates, and or otherwise makes adjustment to the multi-phase power supply 105 for, one or more errors associated with the multi-phase power supply 105. The errors can include, for example, systematic errors (e.g., predictable errors that may be related to a true value, such as incorrect offset or gain settings), part-to-part errors (e.g., errors specific to particular components, such as resulting from manufacture of the specific component), assembly errors (e.g., errors resulting from and/or related to interconnecting components and/or the interconnects coupling components together), environmental error (e.g., such as resulting from temperature, radiation, etc.), and/or any other error that may be associated with the multi-phase power supply 105 and at least partially capable of being mitigated and/or compensated for by the controller 12”, col 5 lines 42-60] .
Regarding Claim 5, Schurmann discloses wherein the controller includes an analog-to-digital converter configured to convert the received telemetry data into digital data, the controller configured to determine the information based on the digital data [ “the controller 120 includes a digital logic and memory 130, a loop controller 135, a phase manager 140 (sometimes referred to as phase control logic), a communication interface 145, an analog-to-digital converter (ADC) 150…” The sequencer 155 is configured to receive signals from each of the plurality of amplifiers 160A, 160B . . . 160N and provide those signals individually to the ADC 150, for example, by switching an output of the sequencer 155 among the signals received from each of the plurality of amplifiers 160A, 160B, . . . 160N ..”, col 4 lines 33-67; Fig.1; col 3lines 1-30; col 6 lines 10-22; col 7 lines 39-44].
Regarding Claim 6, Schurmann discloses a first controller [“a controller 120”, Fig.1]
Nicholson teaches wherein the controller is a first controller, and the first controller [ “The intelligent power module 514”, Fig.5] is configured to output the determined information to a second controller to transmit the determined information to an external storage device [“The network power manager 504 of FIG. 5 communicates with the power manager agent 510 and IPM 514. The network power manager 504 may receive information from, and provide instructions to, the IPM 514 and power manager agent 510. The network power manager 504 may also receive related power measurements from the IPM 514 and report power information related to the PDU 500 and one or more individual outlets (and thus power information for individual assets powered by the outlet) of the PDU 500.”, 0034; 0056; Fig.7; ( i.e. as illustrated in Fig.7 , it is apparent to store the information in the database/ memory connected to the network power manager) ].
Regarding Claim 8, Schurmann discloses wherein the controller includes a buffer configured to store a number of samples of the telemetry data. [ col 5 lines 22-27].
Regarding Claim 9, Schurmann discloses wherein the controller is configured to: identify a state change based on an instruction to adjust operation of the power stage; based on the state change, stop sampling of the telemetry data; and transmit the number of samples in the buffer to an external device[ col 8 lines 46-51; col 12 lines 44-56; col 13 lines 1-13 ].
Regarding Claim 10, Schurmann discloses, A method comprising:
receiving, by a controller, analog telemetry power stage data[ “the multi-phase power supply 105 includes a controller 120, and a plurality of power stages 125A, 125B, . . . 125N… Each of the plurality of amplifiers 160A, 160B, . . . 160N is configured to couple to a respective one of the plurality of power stages 125A, 125B, . . . 125N (sometimes referred to as power phases) to provide measured and/or sensed data to the sequencer from the respective one of the plurality of power stages 125A, 125B, . . . 125N. Additionally, while described as amplifiers, in some examples the plurality of amplifiers 160A, 160B, . . . 160N are representative of an analog processing, filtering, gain adjustment, etc. that may be performed on an analog signal prior to digitization by an ADC (e.g., such that each of the plurality of amplifiers 160A, 160B, . . . 160N may instead be referred to as an analog front end (AFE))…”, col 4 lines 33-67; Fig.1]
converting, by an analog-to-digital (ADC) converter of the controller, the analog power stage telemetry data to digital telemetry data[ “the controller 120 includes a digital logic and memory 130, a loop controller 135, a phase manager 140 (sometimes referred to as phase control logic), a communication interface 145, an analog-to-digital converter (ADC) 150…” The sequencer 155 is configured to receive signals from each of the plurality of amplifiers 160A, 160B . . . 160N and provide those signals individually to the ADC 150, for example, by switching an output of the sequencer 155 among the signals received from each of the plurality of amplifiers 160A, 160B, . . . 160N ..”, col 4 lines 33-67; Fig.1]
determining, by digital circuitry of the controller, a power stage characteristic based on the digital telemetry data[“..the CPU polls the controller to determine operational characteristics of the power supply, such as a temperature of the power supply, temperature of one or more power stages of the power supply, output current of the power supply, output voltage of the power supply, etc…”, col 3 lines 1-30; “the measurements are related to operating temperatures of the plurality of power stages 125A, 125B, . . . 125N, while in other examples the measurements are related to voltage outputs of the plurality of power stages 125A, 125B, . . . 125N and in yet other examples the measurements are related to current outputs of the plurality of power stages 125A, 125B, . . . 125N. In various examples, any number of measurements of characteristics associated with each of the plurality of power stages 125A, 125B, . . . 125N are performed and to obtain any form of data available from each of the plurality of power stages 125A, 125B, . . . 125N”, col 6 lines 10-22; “ the controller receives an analog signal representative of the output of the active phase of the power supply at a terminal of the controller and converts that analog signal to a digital signal for processing and/or storage by digital structures (e.g., such as digital logic or processing devices) of the controller..”, col 7 lines 39-44;” the controller determines a current offset associated with the active phase of the power supply.. the controller determines the offset by subtracting one of the measurement captured at operation 315 or the value conveyed to the controller in the transactional message at operation 210 from the other of the measurement captured at operation 315 ..”, col 7 lines 39-44;]; and
However, Schurmann does not expressly disclose transmitting, by the controller, the power stage characteristic.
In the same field of endeavor ( e.g. monitoring the power usage data of the outlets / receptacles receiving power from the respective rack-mounted power distribution units (PDUs) and controlling over the network using the network power manager to balance the power phases of the PDU), Nicholson teaches,
transmitting, by the controller[“The intelligent power module 514”,(IPM) Fig.5], the power stage characteristic[“a rack-mounted PDU having a network communication interface may be coupled to a network power manager over a network (e.g., over an Ethernet or the Internet), ..”, 0032; “The IPM 514 may also provide power state sensing and/or load-sensing with respect to the corresponding power outlet(s)..”, 0033 “The network power manager 504 of FIG. 5 communicates with the power manager agent 510 and IPM 514. The network power manager 504 may receive information from, and provide instructions to, the IPM 514 and power manager agent 510. The network power manager 504 may also receive related power measurements from the IPM 514 and report power information related to the PDU 500 and one or more individual outlets (and thus power information for individual assets powered by the outlet) of the PDU 500.”, 0034. Fig.5; ( i.e the controller(IPM) determines the power information of the outlets based on the voltage and current sensor data and transmits the power characteristic of the outlet to the network power manager.)]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Schurmann with Nicholson. Nicholson’s teaching of configuring , monitoring and controlling the power characteristics of the power distribution units (PDUs) by a network power manager ill substantially improve Schurmann’s system to “monitor the power usage of power feed circuits that supply power to equipment racks in a data center, but are useful in mapping and managing the physical infrastructure of the power systems feeding one or many electrical equipment racks, thereby enabling a user to determine where losses in efficiency exist as a result of conditions such as power system overload, underuse or imbalance. These conditions can exist, and can be monitored, at the PDU level, at the cabinet level, within a row of cabinets, within a zone, or at any other group, level or location that a user defines”, [0058].
Regarding Claim 11, Schurmann discloses , wherein the analog power stage telemetry data includes at least one of a power stage input current, a power stage output current, a power stage input voltage, a power stage output voltage, a power stage temperature, or communication data packets[ col 6 lines 10-22].
Regarding Claim 12, Schurmann discloses wherein the power stage characteristic includes at least one of a capacitance of a capacitor connected to a load device, an equivalent series inductance of the capacitor, an effective series resistance of the capacitor, an output inductance of an inductive device coupled to the power stage, a impedance of the inductive device, an on impedance of a power distribution network path, an efficiency of the power stage, a leakage current of the power stage, an output power, or a communication issue[ “ the controller 120 is configured to perform self-calibration to optimize performance of the multi-phase power supply 105. The self-calibration, in various examples, adapts for, compensates for, mitigates, and or otherwise makes adjustment to the multi-phase power supply 105 for, one or more errors associated with the multi-phase power supply 105. The errors can include, for example, systematic errors (e.g., predictable errors that may be related to a true value, such as incorrect offset or gain settings), part-to-part errors (e.g., errors specific to particular components, such as resulting from manufacture of the specific component), assembly errors (e.g., errors resulting from and/or related to interconnecting components and/or the interconnects coupling components together), environmental error (e.g., such as resulting from temperature, radiation, etc.), and/or any other error that may be associated with the multi-phase power supply 105 and at least partially capable of being mitigated and/or compensated for by the controller 12”, col 5 lines 42-60].
Regarding Claim 14, Schurmann discloses further including storing the digital telemetry data into a buffer[ col 5 lines 22-27].
Regarding Claim 15, Schurmann discloses identifying a state change; based on the state change, stopping the converting of the analog power stage telemetry data to the digital telemetry data; and transmitting the stored digital telemetry data in the buffer [ col 8 lines 46-51; col 12 lines 44-56; col 13 lines 1-13 ].
Claims 7, 13 are rejected under 35 U.S.C. 103 as being unpatentable over in view of Schurmann in view of Nicholson as applied to claims 1, 10 further in view of Kaplan et. al. (U.S Patent 11,354,258; hereinafter “Kaplan”].
Regarding Claims 7, 13, Schurmann, Nicholson teaches the limitations outlined in Claims 1,10 . However, Schurmann, Nicholson does not expressly disclose wherein the controller is configured to identify a number of malformed communication packets and transmitting information corresponding to the number of malformed communication packets.
In the same field of endeavor ( e.g. computing device can receive a subset of the data from the network, and perform the sub-operation on the subset of the data in parallel to generate the output.), Kaplan teaches
the controller is configured to identify a number of malformed communication packets[where the host processor of a computing device is involved in the movement of data between the hardware data processor and the network adapter, the host processor may obtain packets of input data (e.g., weight gradients from other computing devices) from the network adapter, extract the input data from the packets (e.g., to determine whether there are missing/corrupted packets), and forward the input data to the hardware data processor”, col 43 lines 65-67; Col 4 lines 1-5]
transmitting information corresponding to the number of malformed communication packets [ “ when network adapter 308 receives a set of packets for a transaction from network fabric 330, network adapter 308 can store a WQE including/representing the message data of the transaction, which are extracted from the packets, in RQ 326… col 16; lines 60-67; col 17 lines 1-7; “ after network adapter 308 completes the transmission of the write requests to hardware data processor 306, network adapter 308 can store a transfer complete message, such as a CQE, in CQ 322. The transfer complete message can indicate that network adapter has initiated the transfer of data to hardware data processor via the interconnect. ..The CQE can also include other information, such as a status of reception/transmission of packets (e.g., whether there are missing packets, whether the packets contain data error). ..The notification allows the host processor 303 to instruct hardware data processor 306 either to start the processing of the data or not to process the data. ..In a case where the CQE indicates missing or corrupted data, the host processor can also control hardware data processor 306 to not perform the computation operation on the data”, col 17 lines 15-40]; ( as recited in claim 13)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Schurmann in view of Nicholson with Kaplan. Kaplan’s teaching of performing the sub-operation on the subset of the data in parallel and providing status of the data packets will substantially improve performance and reduce time by determining whether or not to process the power stage data by indicating the status of the incoming packets/ data.
Claim 19, is rejected under 35 U.S.C. 103 as being unpatentable over Zhu in view of Schurmann.
Regarding claim 19, Zhu teaches the limitations as outlined in Claim 16. However, Zhu does not expressly disclose the first analog-to-digital converter is coupled to a temperature sensor of the power stage.
In the same field of endeavor (e.g. operating in a self-calibration mode for each power phase of the plurality of power phases based on a received instruction to control the power supply to the plurality of power phases) , Schurmann teaches ,
the first analog-to-digital converter is coupled to a temperature sensor of the power stage [“Each of the plurality of amplifiers 160A, 160B, . . . 160N is configured to couple to a respective one of the plurality of power stages 125A, 125B, . . . 125N (sometimes referred to as power phases) to provide measured and/or sensed data to the sequencer from the respective one of the plurality of power stages 125A, 125B, . . . 125N. Additionally, while described as amplifiers, in some examples the plurality of amplifiers 160A, 160B, . . . 160N are representative of an analog processing, filtering, gain adjustment, etc. that may be performed on an analog signal prior to digitization by an ADC (e.g., such that each of the plurality of amplifiers 160A, 160B, . . . 160N may instead be referred to as an analog front end (AFE))…”, col 4 lines 33-67; Fig.1; “the measurements are related to operating temperatures of the plurality of power stages 125A, 125B, . . . 125N, while in other examples the measurements are related to voltage outputs of the plurality of power stages 125A, 125B, . . . 125N ..”, col 6 lines 10-22 ].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Zhu with Schurmann Schurmann’s teaching of calibrating the power stages based on measurements related to various parameters of the power stages will substantially improve Zhu’s system to optimize performance of the multi-phase power supply and adaptively compensates for, mitigates, and or otherwise makes adjustment to the multi-phase power supply for, one or more errors including, for example, systematic errors , part-to-part errors, assembly errors environmental error (e.g., such as resulting from temperature, radiation, etc.), and/or any other error that may be associated with the multi-phase power supply .
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Zhu
Regarding claim 20, Zhu discloses , a third analog-to-digital converter including a first terminal and a second terminal, the first terminal of the third analog-to-digital converter coupled to the digital circuitry, the second terminal[ 0016; Fig.1; ( i.e. each power sensor includes analog-to-digital converters (ADCs) with input and output terminals to receive and send the voltage / current) )].
However, Zhu does not expressly disclose the third analog-to-digital converter coupled to a board management controller.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhu to couple an analog-to-digital converter to a board management controller ,since it has been held to be within the general skill of a worker in the art to select the component on the basis of its suitability for the intended use as a matter of design choice.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Roth et. al., U.S Patent Application Publication 2024/0094271, teaches a measurement method of determining a corrected averaged power signal.
Chou et al., U.S Patent Application Publication 2019/0250194, teaches A voltage detecting circuit includes a rectifying circuit, a voltage dividing circuit, and a comparing circuit. The rectifying circuit is configured to rectify a plurality of AC phase voltages to output a plurality of rectified voltages respectively. The voltage dividing circuit is configured to divide the plurality of rectified voltages respectively to output a plurality of sampling voltages. The comparing circuit is configured to compare the plurality of sampling voltages with a reference voltage respectively to provide a plurality of corresponding phase failure detecting voltages. On the condition that the AC phase voltages are unbalanced, the phase failure detecting voltage switches between a high level and a low level.
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/GAYATHRI SAMPATH/ Examiner, Art Unit 2176
/PHIL K NGUYEN/ Primary Examiner, Art Unit 2176