DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed June 5, 2026.
Claims 13-27 are pending. Claims 1-12 are canceled. Claims 16-17, 21-22 and 25 are amended. Claims 26-27 are new. Claim 13 is independent.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 13 and 17-27 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Merced Grafals et al. (U.S. 9,691,479; hereinafter “Merced Grafals”).
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Regarding independent claim 13, Merced Grafals discloses a first crossbar circuit (see Examiner’s Markup Merced Grafals Figure 2) comprising a first plurality of cross-point devices (Fig. 2: 203) connecting a plurality of word lines (Fig. 2: 201), a first plurality of select lines (Fig. 2: 220s), and a first plurality of bit lines (Fig. 2: 202), wherein each of the first plurality of select lines (Fig. 2: 220s) is connected to multiple cross-point devices (Fig. 2: 203) of the first crossbar circuit (see Examiner’s Markup Merced Grafals Figure 2) that are connected to the plurality of word lines (Fig. 2: 201) and one of the first plurality of bit lines (Fig. 2: 202); and
a second crossbar circuit (see Examiner’s Markup Merced Grafals Figure 2) comprising a second plurality of cross-point devices (Fig. 2: 203) connecting to the plurality of word lines (Fig. 2: 201), a second plurality of select lines (Fig. 2: 220s), and a second plurality of bit lines (Fig. 2: 202), wherein the second plurality of select lines (Fig. 2: 220s) comprises a first select line (see Examiner’s Markup Merced Grafals Figure 2) connecting a first group of the second plurality of cross-point devices (see Examiner’s Markup Merced Grafals Figure 2) and a second select line (see Examiner’s Markup Merced Grafals Figure 2) connecting a second group of the second plurality of cross-point devices (see Examiner’s Markup Merced Grafals Figure 2), and wherein the first group of the second plurality of cross-point devices comprises a first cross-point device connecting a first word line (see Examiner’s Markup Merced Grafals Figure 2) and a first bit line (see Examiner’s Markup Merced Grafals Figure 2) and a second cross-point device connecting a second word line and a second bit line (see Examiner’s Markup Merced Grafals Figure 2), and wherein the second group of the second plurality of cross-point devices comprises a third cross- point device connecting a third word line and the first bit line (see Examiner’s Markup Merced Grafals Figure 2) and a fourth cross-point device connecting a fourth word line and the second bit line (see Examiner’s Markup Merced Grafals Figure 2).
Regarding claim 17, Merced Grafals discloses a first selection logic (see Second Examiner’s Markup Merced Grafals Figure 2) connected to the first plurality of cross-point devices (Fig. 2: 203) through the first plurality of select lines (Fig. 2: 220s), wherein the first selection logic is configured to selectively enable one or more of the first plurality of cross-point devices via the first plurality of select lines (see col. 9, ll. 42-50); and
a second selection logic (see Second Examiner’s Markup Merced Grafals Figure 2) connected to the second plurality of cross-point devices (Fig. 2: 203) through the second plurality of select lines (Fig. 2: 220s), wherein the second selection logic is configured to selectively enable one or more of the second plurality of cross-point devices via the second plurality of select lines (see col. 10, ll. 53-67; col. 11, ll. 1-3 and col. 11, ll. 31-39).
Regarding claim 18, Merced Grafals discloses wherein the second selection logic comprises a plurality of selection registers (Fig. 2: 211), wherein the first group of the second plurality of cross-point devices (see Examiner’s Markup Merced Grafals Figure 2) is connected to a first selection register (Fig. 2: 211-6/211-5) via the first select line (see Examiner’s Markup Merced Grafals Figure 2).
Regarding claim 19, Merced Grafals discloses wherein a second selection register (Fig. 2: 211-2/211-1) of the second selection logic is connected to the second group of the second plurality of cross-point devices (see Examiner’s Markup Merced Grafals Figure 2) via the second select line (see Examiner’s Markup Merced Grafals Figure 2).
Regarding claim 20, Merced Grafals discloses wherein the first group of the second plurality of cross-point devices are enabled while a first supply voltage is applied to the first select line of the second plurality of select lines (Fig. 2: voltage applied to 211-6).
Regarding claim 21, Merced Grafals discloses wherein a group of the first plurality of cross-point devices (see Examiner’s Markup Merced Grafals Figure 2) are enabled while a second voltage (Fig. 2: a voltage applied to 205-3) is applied to a third select line of the first plurality of select lines (see Examiner’s Markup Merced Grafals Figure 2), wherein the group of the first plurality of cross-point devices are connected to the third select line (see Examiner’s Markup Merced Grafals Figure 2), the plurality of word lines (Fig. 2: 201) and a third bit line of the first plurality of bit lines (Fig. 2 only shows a portion of a memristor array, however any number of column lines 202 may be present in the memristor array, see col. 8, ll. 36-42).
Regarding claim 22, Merced Grafals discloses a programming logic configured to program the selectively enabled first plurality of cross-point devices and the selectively enabled second plurality of cross-point devices (Fig. 1: 101 and 111-113).
Regarding claim 23, Merced Grafals discloses wherein the second plurality of select lines are not parallel to the second plurality of bit lines (Fig. 2: lines 220s are not parallel to bit lines 202).
Regarding claim 24, Merced Grafals discloses wherein the second plurality of select lines are not parallel to the plurality of word lines (Fig. 2: lines 220s are not parallel to word lines 201).
Regarding claim 25, Merced Grafals discloses wherein at least one of the second plurality of cross-point devices comprises a transistor and a memristor (see Fig. 3 and Fig. 9.
Regarding claim 26, Merced Grafals discloses the limitations with respect to claim 22.
As discussed above, Merced Grafals’s apparatus is substantially identical in structure to the claimed “apparatus,” where the differences reside only in the remaining limitations relating to function of “program the first plurality of cross-point devices of the first crossbar circuit to store two-dimensional convolution kernels for performing two-dimensional convolution operations, and program the second plurality of cross-point devices of the second crossbar circuit to store depth-wise convolution kernels for performing depth-wise convolution operations.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Merced Grafals’s apparatus appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 27, Merced Grafals discloses the limitations with respect to claim 26.
As discussed above, Merced Grafals’s apparatus is substantially identical in structure to the claimed “apparatus,” where the differences reside only in the remaining limitations relating to function of “in response to an application of a plurality of input signals to the plurality of word lines, the first crossbar circuit is configured to output, via the first plurality of bit lines, a first plurality of output signals representative of convolution results of input data and the two-dimensional convolution kernels, and the second crossbar circuit is configured to output, via the second plurality of bit lines, a second plurality of output signals representative of convolution results of the input data and the depth-wise convolution kernels.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Merced Grafals’s apparatus appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Merced Grafals et al. (U.S. 9,691,479; hereinafter “Merced Grafals”) in view of Hu et al. (U.S. 2018/0350433; hereinafter “Hu”).
Regarding claim 14, Merced Grafals discloses the limitations with respect to claim 13.
Furthermore, Merced Grafals teaches wherein the first plurality of cross-point devices and the second plurality of cross-point devices are connected to a word line logic through the plurality of word lines (Fig. 2: 211s).
However, Merced Grafals is silent with respect to the word line logic comprises a plurality of digital-to-analog converters.
Similar to Merced Grafals, Hu teaches an apparatus comprising first and second crossbar circuit (Fig. 2: 220s) comprising a plurality of cross-point devices (Fig. 2: 230) connecting a plurality of word lines (Fig. 2: 210).
Furthermore, Hu teaches the plurality of cross-point devices are connected to a word line logic through the plurality of word lines, wherein the word line logic comprises a plurality of digital-to-analog converters (see pages 3-4, par. 0037).
Since Hu and Merced Grafals are from the same field of endeavor, the teachings described by Hu would have been recognized in the pertinent art of Merced Grafals.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teachings of Hu with the teachings of Merced Grafals for the purpose of minimize sneak path currents in the array, see Hu’s page 4, par. 0041.
Regarding claim 15, Merced Grafals discloses the limitations with respect to claim 13.
Furthermore, Merced Grafals teaches wherein the first plurality of cross-point devices is connected to a sensing circuit through the first plurality of bit lines (Fig. 2: 210s).
However, Merced Grafals is silent with respect to the sensing circuit comprises a plurality of analog-to-digital converters.
Similar to Merced Grafals, Hu teaches an apparatus comprising first and second crossbar circuit (Fig. 2: 220As) comprising a plurality of cross-point devices (Fig. 2: 230) connected to a sensing circuit (Fig. 4: 418) through a plurality of bit lines (Fig. 2: 220).
Furthermore, Hu teaches the plurality of cross-point devices are connected to a sensing circuit through the plurality of bit lines, wherein the sensing circuit comprises a plurality of analog-to-digital converters (see pages 3-4, par. 0037).
Since Hu and Merced Grafals are from the same field of endeavor, the teachings described by Hu would have been recognized in the pertinent art of Merced Grafals.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teachings of Hu with the teachings of Merced Grafals for the purpose of minimize sneak path currents in the array, see Hu’s page 4, par. 0041.
Regarding claim 16, Merced Grafals in combination with Hu teaches the limitation with respect to claim 15.
Furthermore, Merced Grafals teaches the second plurality of cross-point devices is connected to the sensing circuit (Fig. 2: 210s) through the second plurality of bit lines (Fig. 2: 202).
Response to Arguments
Applicant's arguments filed with respect to claim 13 have been fully considered but they are not persuasive.
With respect to independent claim 13, Applicant asserts that Merced Grafals fails to disclose the requirement of claim 13 of each select line of the first crossbar circuit to connect multiple cross-point devices associated with one bit line, rather than multiple bit lines, see Applicant’s Remarks pages 5-7. This particular remark is not considered persuasive.
While raising an interesting point, claim 13 does not preclude more than one bit line associated to multiple cross-point devices.
Furthermore, Applicant asserts that Merced Grafals fails to disclose different select-line arrangement as required by claim 13: first crossbar circuit requires each select line to connect multiple cross-point devices associated with one bit line, while the second crossbar circuit requires first and second select line connecting respective first and second groups of cross-point devices across first and second bit lines, see Applicant’s Remarks page 7.
As recited above, Merced Grafals discloses a first crossbar circuit comprising each select line to connect multiple cross-point devices associated with one bit line. Claim 13 does not preclude more than one bit line associated to multiple cross-point devices. Further, Merced Grafals discloses a second cross bar circuit comprising a first select line connected to a group of cross-point devices and a second select line connected to another group of cross-point devices, see the rejection above.
For the above reasons, the previously applied rejections are considered proper and maintained.
The other claims were argued for substantially the same reasons as claim 13, and the arguments are not persuasive for the same reasons.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFREDO BERMUDEZ LOZADA whose telephone number is (571)272-0877. The examiner can normally be reached 7:00AM-3:30PM EST.
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/Alfredo Bermudez Lozada/ Primary Examiner, Art Unit 2825
