DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-7, 9, and 15-19 are rejected under 35 U.S.C. 103 as being unpatentable over Shi (US 2026/0177865) in view of Fan (US 2023/0134900) .
Regarding claim 1, Shi teaches display panel, comprising: a display region (pixel region A1) and a non-display region at least partially surrounding the display region (non-display regions A2-A3); wherein a plurality of drive signal lines are arranged in the display region and extending to the non-display region (data lines 103); in the display region, the plurality of drive signal lines extend in a first direction and are arranged in a second direction; the first direction is intersected with the second direction (Fig. 1 data lines 103 extend in the vertical direction and are arranged along the horizontal direction); a fanout region (fanout region A2) and a connection terminal region are disposed in the non-display region (driver chip 104) , and the connection terminal region is disposed at a side of the fanout region away from the display region;(driver chip 104 is disposed on the side of the fanout region A2 that is opposite the side of the pixel region 103) a plurality of fanout wires are arranged in the fanout region (fanout wires 105); a plurality of connection terminals are arranged in the connection terminal region (bonding pads 1041 and redundant pads 1042) ; and each of first ends of the plurality of fanout wires is connected to a respective one of the plurality of drive signal lines (fanout wires 105 are connected to data lines 103 at one end), and each of second ends of the plurality of fanout wires is connected to a respective one of the plurality of connection terminals (fanout wires 105 are connected to bonding pads 1041 and redundant pads 1042.) Although Shi teaches the limitations as discussed above, he fails to teach wherein the plurality of fanout wires comprise a first fanout wire and a second fanout wire; the first fanout wire comprises a first wire segment; the first wire segment has a width different from a width of the second fanout wire; and a length of the first wire segment is equal to at least a portion of a length of the first fanout wire.
However in the field manufacturing a display device, Fan teaches a display wherein the plurality of fanout wires comprise a first fanout wire and a second fanout wire (Fig. 7 plurality of fanout wire 7 comprising fanout wires for each sub-fanout area); the first fanout wire comprises a first wire segment; the first wire segment has a width different from a width of the second fanout wire (Fig. 7 comprising wire segment 71 [0203]); and a length of the first wire segment is equal to at least a portion of a length of the first fanout wire (Fig. 7 shows the wire segment 71 as a portion of fanout wire 7 which also comprises wire segments 73 and 72).
Therefore it would have been obvious to one of ordinary skill in the art to combine the device as taught by Shi with the fanout method as taught by Fan. This combination provides an adjusted resistance for different wire widths as taught by Fan.
Regarding claim 4, Fan teaches wherein a length of the first wire segment Is equal to the whole length of the first fanout wire; and a width of the first fanout wire is greater than the width of the second fanout wire ([0203]).
Regarding claim 5, Fan teaches wherein the plurality of fanout wires comprise a plurality of first fanout wires, and at least one of the plurality of first fanout wires has a width different from a width of another one of the plurality of first fanout wires(Fig. 7 show fanout wires in sub-fanout area D and sub-fanout area E. [0203] teaches the fanout wires 7 of sub fanout area D/E have different widths).
Regarding claim 6, Fan teaches wherein the length of the first wire segment is equal to a portion of the length of the first fanout wire; and the width of the first wire segment is greater than the width of the second fanout wire(Fig. 7, [0203] teaches the fanout wires 7 of sub fanout area D/E have different widths).
Regarding claim 7, Fan teaches wherein a plurality of adjacent first fanout wires are provided in a fourth direction, and the fourth direction is intersected with the second direction; and along the fourth direction and in a direction from an edge of the display panel to a center of the display panel, lengths of first wire segments of the plurality of adjacent first fanout wires gradually decrease (Fig. 7 shows how wire segments closer to the edge are shorter than wire segments near the center.).
Regarding claim 9, Fan teaches wherein the first fanout wire further comprises a second wire segment (fanout wire comprises segments 71,72,73); and the width of the first wire segment is greater than a width of the second wire segment, and the width of the second wire segment is the same as the width of the second fanout wire (Fig. 7 shows that segment 71 has a width greater than segment 73. And segments 72 are the same [0203]).
Regarding claim 15, Fan teaches wherein the first metal layer serves as a gate layer of the pixel driving circuit, and the second metal layer also serves as a source and drain layer of the pixel driving circuit ([0200]).
Regarding claim 16, Fan teaches herein a length of the display panel in the second direction is greater than a length of the display panel in the first direction (Fig. 6 display panel); and Shi teaches the fanout region and the connection terminal region are disposed in an edge region of the display panel, and along an opposite direction of the first direction, the fanout region and the connection terminal region are disposed on a side away from the display region (Fig. 1 connection terminal 104 is disposed opposite pixel region A1 and fanout wires 105 disposed on edge between connection region and pixel region).
Regarding claim 17, Fan teaches wherein along the second direction, the first fanout wire is arranged at a side of the second fanout wire away from a center of the display panel (Fig. 7 show fanout wires in sub-fanout area D and sub-fanout area E are arranged on opposite sided of a center line of the panel)..
Regarding claim 18, Shi teaches wherein the plurality of connection terminals are configured to connect a driver chip; or the plurality of connection terminals are configured to connect a driver chip through a flexible printed circuit board (driver chip 104).
Regarding claim 19, Shi teaches display panel, comprising: a display region (pixel region A1) and a non-display region at least partially surrounding the display region (non-display regions A2-A3); wherein a plurality of drive signal lines are arranged in the display region and extending to the non-display region (data lines 103); in the display region, the plurality of drive signal lines extend in a first direction and are arranged in a second direction; the first direction is intersected with the second direction (Fig. 1 data lines 103 extend in the vertical direction and are arranged along the horizontal direction); a fanout region (fanout region A2) and a connection terminal region are disposed in the non-display region (driver chip 104) , and the connection terminal region is disposed at a side of the fanout region away from the display region;(driver chip 104 is disposed on the side of the fanout region A2 that is opposite the side of the pixel region 103) a plurality of fanout wires are arranged in the fanout region (fanout wires 105); a plurality of connection terminals are arranged in the connection terminal region (bonding pads 1041 and redundant pads 1042) ; and each of first ends of the plurality of fanout wires is connected to a respective one of the plurality of drive signal lines (fanout wires 105 are connected to data lines 103 at one end), and each of second ends of the plurality of fanout wires is connected to a respective one of the plurality of connection terminals (fanout wires 105 are connected to bonding pads 1041 and redundant pads 1042.) wherein the plurality of connection terminals are configured to connect a driver chip (driver chip 104 comprises bonding pads 1041 and 1042) Although Shi teaches the limitations as discussed above, he fails to teach wherein the plurality of fanout wires comprise a first fanout wire and a second fanout wire; the first fanout wire comprises a first wire segment; the first wire segment has a width different from a width of the second fanout wire; and a length of the first wire segment is equal to at least a portion of a length of the first fanout wire.
However in the field manufacturing a display device, Fan teaches a display wherein the plurality of fanout wires comprise a first fanout wire and a second fanout wire (Fig. 7 plurality of fanout wire 7 comprising fanout wires for each sub-fanout area); the first fanout wire comprises a first wire segment; the first wire segment has a width different from a width of the second fanout wire (Fig. 7 comprising wire segment 71 [0203]); and a length of the first wire segment is equal to at least a portion of a length of the first fanout wire (Fig. 7 shows the wire segment 71 as a portion of fanout wire 7 which also comprises wire segments 73 and 72).
Therefore it would have been obvious to one of ordinary skill in the art to combine the device as taught by Shi with the fanout method as taught by Fan. This combination provides an adjusted resistance for different wire widths as taught by Fan.
Claims 2-3, 11 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Shi (US 2026/0177865) in view of Fan (US 2023/0134900) and Cui (US 2021/0082962).
Regarding claims 2 and 20, Shi in view of Fan teach the limitations as discussed above but fail to teach wherein a sum of a resistance of a fanout wire of the plurality of fanout wires and a resistance of a drive signal line connected to the fanout wire serves as a panel resistance of the fanout wire; and
a panel resistance of the first fanout wire is less than or equal to a set impedance threshold value.
However in the field of adjusting fanout regions of a display device, Cui teaches a display device where wherein a sum of a resistance of a fanout wire of the plurality of fanout wires and a resistance of a drive signal line connected to the fanout wire serves as a panel resistance of the fanout wire; and
a panel resistance of the first fanout wire is less than or equal to a set impedance threshold value ([0004][0042][0045] teach the fanout line connected to the data lines have an increased total impedance and the impedance variation of the fanout lines has less impact. Since it is well known that impedance is a combination of individual resistances, then it is obvious that a total impedance (or impedance threshold) would be a derived by summing resistance of a the fanout line and the data lines and that a summation of resistances should not exceed a total impedance of the panel.) .
Therefore it would have been obvious to one of ordinary skill in the art to combine the device as taught by Shi with the fanout method as taught by Fan and the fanout manufacturing method as taught by Cui.. This combination reduces the impedance variation of the fanout lines corresponding to different data lines and achieves stable input of data signals as taught by Cui [0005].
Regarding claim 3, Fan teaches wherein the plurality of drive signal lines comprise a first drive signal line and a second drive signal line, the first drive signal line is connected to the first fanout wire, and the second drive signal line is connected to the second fanout wire ([0057]-[0058]); and wherein the greater a resistance of the first drive signal line is, the greater the width of the first wire segment is to make the panel resistance of the first fanout wire less than the set impedance threshold value; or the smaller a resistance of the first drive signal line is, the smaller the width of the first wire segment is to make the panel resistance of the first fanout wire less than the set impedance threshold value ([0059-0060][0194-0195] .
Regarding claim 11, Cui teaches a first metal layer and a second metal layer; wherein the plurality of fanout wires comprise a first wire part and a second wire part; the first wire part is arranged in the first metal layer, the second wire part is arranged in the second metal layer, and the first wire part and the second wire part are connected by a connection hole between the first metal layer and the second metal layer([0042][0045]).
Allowable Subject Matter
Claims 8, 10, and 12-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. These claims are objected to based on the layout of the fanout wires according to the equation of the respective claim.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRE L MATTHEWS whose telephone number is (571)270-5806. The examiner can normally be reached Mon-Fri 9:00-6:00.
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/ANDRE L MATTHEWS/ Primary Examiner, Art Unit 2621
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