DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 4, 2026 has been entered.
Response to Arguments
Applicant’s arguments, filed May 4, 2026, have been noted; however, these arguments are moot in view of the new grounds of rejection discussed below.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 2 and 17 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ise et al. (US 2018/0115729 A1, referred to herein as “Ise”).
Regarding claim 2, Ise discloses: An imaging apparatus comprising:
an imaging element having a plurality of pixels (Ise: Fig. 2A, paragraph [0073], disclosing a stacked image sensor with a pixel array) including first pixels that output a first signal based on charges photoelectrically converted during a first charge accumulation time (Ise: paragraphs [0078]-[0079], disclosing photoelectric conversion of charges to generate a signal from pixels associated with a first semiconductor chip of the stacked image sensor; paragraph [0084], disclosing a first pixel group) and second pixels that output a second signal based on charges photoelectrically converted during a second charge accumulation time different from the first charge accumulation time (Ise: paragraphs [0078]-[0080], disclosing photoelectric conversion of charges to generate a signal from pixels associated with a second semiconductor chip of the stacked image sensor; paragraph [0084], disclosing a second pixel group; paragraph [0086], disclosing that first and second image signals have different charge accumulation times), the imaging element being configured to output image data based on the first signal and the second signal (Ise: paragraphs [0086]-[0090], disclosing output of image data based on the first and second signals ); and
a processor to perform a compression process on first image data output from the imaging element by using the first charge accumulation time and the second charge accumulation time (Ise: paragraphs [0069]-[0071], disclosing use of a processor to compress the image data—e.g., the image data generated from first and second pixel groups associated with the first and second charge accumulation times).
Regarding claim 17, Ise discloses: A video compression apparatus comprising:
a communication unit configured to receive image data from an imaging element having a plurality of pixels (Ise: Fig. 1, paragraphs [0056]-[0061], disclosing a controller and associated components in communication; Fig. 2A, paragraph [0073], disclosing a stacked image sensor with a pixel array to transmit image data) including first pixels that output a first signal generated based on a first charge accumulation time (Ise: paragraphs [0078]-[0079], disclosing photoelectric conversion of charges to generate a signal from pixels associated with a first semiconductor chip of the stacked image sensor; paragraph [0084], disclosing a first pixel group) and second pixels that output a second signal generated based on a second charge accumulation time (Ise: paragraphs [0078]-[0080], disclosing photoelectric conversion of charges to generate a signal from pixels associated with a second semiconductor chip of the stacked image sensor; paragraph [0084], disclosing a second pixel group; paragraph [0086], disclosing that first and second image signals have different charge accumulation times); and
a processor configured to perform a compression process on the image data received from the imaging element by using the first charge accumulation time and the second charge accumulation time (Ise: paragraphs [0069]-[0071], disclosing use of a processor to compress the image data—e.g., the image data generated from first and second pixel groups associated with the first and second charge accumulation times).
Allowable Subject Matter
Claims 3-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 3, Ise, either alone or in combination with other prior art of record, does not teach, suggest, or disclose where the processor is configured to perform the compression process on the first image data by using the first charge accumulation time, the second charge accumulation time, and the second image data output from the imaging element prior to the first image data.
Regarding claims 4-13, Ise, either alone or in combination with other prior art of record, does not teach, suggest, or disclose where the processor is configured to perform, in the compression process, block matching on the first image data and the second image data by using the first charge accumulation time and the second charge accumulation time.
Claim 18 is allowed.
The following is an examiner’s statement of reasons for allowance:
Ise, either alone or in combination with other prior art of record, does not teach, suggest, or disclose where the processor is configured to perform, in the compression process, block matching for the first image data and second image data output from the imaging element prior to the first image data, by using the first charge accumulation time and the second charge accumulation time.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher Braniff whose telephone number is (571) 270-5009. The examiner can normally be reached M-F 7AM to 4PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thai Tran can be reached at (571) 272-7382. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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CHRISTOPHER T. BRANIFF
Primary Examiner
Art Unit 2484
/CHRISTOPHER BRANIFF/Primary Examiner, Art Unit 2484
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