Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/10/2026 has been entered.
Response to Amendment
This Office action is in response to Applicant' s communication filed 2/10/2026 in response to the Office action dated 12/10/2025. Claims 1, 5, 7, 14-15, and 20 have been amended. Claims 1-20 are pending in this application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5-6, 15, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Alwala (US 20210365200 A1) in view of Luo et al. (US 20230195356 A1), hereinafter Luo, and further in view of Matsudaira et al. (US 20150339223 A1), hereinafter Matsudaira.
Regarding claim 1, Alwala teaches a storage device, comprising: a memory device including a plurality of memory blocks (Paragraphs 24, 28; Fig. 1, storage device 102 includes multiple blocks);
and a memory controller configured to: match sets of memory blocks in the plurality of memory blocks to respective super blocks in a plurality of super blocks (Paragraphs 33, 42; Figs. 1 and 4, controller 123 matches pairs [sets] of two blocks into respective superblocks 412),
release a matching of the selected at least one memory block from the respective super block to which the selected at least one memory block is matched (Paragraphs 43, 46; Fig. 4, unforming superblocks 412 and unassigning good blocks from superblocks to spare pool 414),
and generate at least one additional super block based on the selected at least one memory block (Paragraphs 43, 50; Fig. 4, reforming the good blocks from spare pool 414 into new superblocks).
Alwala does not explicitly teach select at least one memory block from each super block of the plurality of super blocks that does not include a bad memory block, and based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks, switch a matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with a matching of at least one memory block of a second super block of the plurality of super blocks, the second super block being free of a bad memory block.
However, Luo teaches select at least one memory block from each super block of the plurality of super blocks that does not include a bad memory block (Paragraphs 47, 50; Fig. 2B, reallocating [including selecting] memory blocks from each full superblock 227-1, 227-4, 227-5, and 227-8 (superblocks that do not include a bad block)).
Alwala and Luo are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the storage device of Alwala to further include the selecting of memory blocks from superblocks that do not include a bad memory block according to the teachings of Luo. The motivation for doing so would have been to reduce the impact of bad blocks on memory system performance (Luo, Paragraph 53).
Alwala in view of Luo does not explicitly teach based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks, switch a matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with a matching of at least one memory block of a second super block of the plurality of super blocks, the second super block being free of a bad memory block.
However, Matsudaira teaches based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks (Paragraph 43; Figs. 8-9, step S3, determining that logical [first super] blocks 13, 14 contain multiple bad blocks),
switch a matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with a matching of at least one memory block of a second super block of the plurality of super blocks (Paragraph 45; Figs. 8-10, step S5, changing the arrangement [switching the matching] of physical blocks such that logical [first super] blocks 13, 14 swap bad blocks with normal blocks from logical [second super] blocks 5-8),
the second super block being free of a bad memory block (Paragraph 45; Figs. 9-10, logical [second super] blocks 5-8 previously contained no bad blocks).
Alwala, Luo, and Matsudaira are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the storage device of Alwala in view of Luo to further include the switching a matching of bad memory blocks according to the teachings of Matsudaira. The motivation for doing so would have been to reduce variations in access speed (Matsudaira, Paragraph 49).
Regarding claim 5, Alwala in view of Luo, further in view of Matsudaira teaches the storage device of claim 1, wherein the memory controller is configured to switch the matching of at least one bad memory block of the plurality of memory blocks in the first super block with the matching of the at least one memory block of the second super block (Matsudaira, Paragraph 45; Figs. 8-10, step S5, changing the arrangement [switching the matching] of physical blocks such that logical [first super] blocks 13, 14 swap bad blocks with normal blocks from logical [second super] blocks 5-8)
such that a number of bad blocks included in at least one super block of the plurality of super blocks is minimized (Matsudaira, Paragraph 45; Fig. 10, the number of bad blocks in each logical [super] block is equalized (equal distribution of bad blocks minimizes the amount of bad blocks in each use target superblock)).
Regarding claim 6, Alwala in view of Luo, further in view of Matsudaira teaches the storage device of claim 1, wherein the memory controller is configured to match the selected at least one memory block to the at least one additional super block after generating the at least one additional super block such that a number of memory blocks included in each of the plurality of super blocks is equal to a number of memory blocks included in the at least one additional super block (Alwala, Paragraphs 44, 50; Fig. 5, adding [matching] pairs of blocks to newly formed superblocks until the size of the new superblock equals the superblock threshold size 506, which dictates the size of all superblocks).
Regarding claim 15, Alwala teaches a super block managing method of a storage device including a plurality of memory blocks (Paragraphs 24, 28; Fig. 1, storage device 102 includes multiple blocks), the method comprising:
setting a plurality of super blocks by matching sets of memory blocks of a plurality of memory blocks to respective super blocks in the plurality of super blocks (Paragraph 42; Fig. 4, matching pairs [sets] of two blocks into superblocks 412); and
generating at least one additional super block based on selected memory blocks (Paragraph 43; Fig. 4, reforming the good blocks into new superblocks).
Alwala does not explicitly teach selecting at least one memory block from each of the plurality of super blocks; maintaining, for each super block of the plurality of super blocks, matching of memory blocks other than the selected at least one memory block; and based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks, switch matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with matching of at least one memory block of a second super block of the plurality of super blocks, wherein the second super block is free of a bad memory block.
However, Luo teaches selecting at least one memory block from each of the plurality of super blocks (Paragraph 50; Fig. 2B, reallocating [selecting] memory blocks from each full superblocks 227-1, 227-4, 227-6, and 227-8); and
maintaining, for each super block of the plurality of super blocks, matching of memory blocks other than the selected at least one memory block (Paragraph 50; Fig. 2B, reallocating memory blocks from full superblocks 227-1, 227-4, 227-6, and 227-8 without deconstructing the full superblocks).
Alwala and Luo are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Alwala to further include the selecting of memory blocks from superblocks while maintaining matching of other memory blocks according to the teachings of Luo. The motivation for doing so would have been to reduce the impact of bad blocks on memory system performance (Luo, Paragraph 53).
Alwala in view of Luo does not explicitly teach based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks, switch matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with matching of at least one memory block of a second super block of the plurality of super blocks, wherein the second super block is free of a bad memory block.
However, Matsudaira teaches based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks (Paragraph 43; Figs. 8-9, step S3, determining that logical [first super] blocks 13, 14 contain multiple bad blocks),
switch matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with matching of at least one memory block of a second super block of the plurality of super blocks (Paragraph 45; Figs. 8-10, step S5, changing the arrangement [switching the matching] of physical blocks such that logical [first super] blocks 13, 14 swap bad blocks with normal blocks from logical [second super] blocks 5-8),
wherein the second super block is free of a bad memory block (Paragraph 45; Figs. 9-10, logical [second super] blocks 5-8 previously contained no bad blocks).
Alwala, Luo, and Matsudaira are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Alwala in view of Luo to further include the switching matching of bad memory blocks according to the teachings of Matsudaira. The motivation for doing so would have been to reduce variations in access speed (Matsudaira, Paragraph 49).
Regarding claim 19, Alwala in view of Luo, further in view of Matsudaira teaches the method of claim 15, wherein the selecting of at least one memory block comprises selecting the at least one memory block from super blocks that do not include bad memory blocks (Luo, Paragraphs 47, 50; Fig. 2B, reallocating [including selecting] memory blocks from full superblocks 227-1, 227-4, 227-6, and 227-8 (superblocks that do not include bad memory blocks).
Regarding claim 20, Alwala in view of Luo, further in view of Matsudaira teaches the method of claim 15, comprising switching the matching of the at least one bad memory block of the plurality of memory blocks in the first super block with the matching of the at least one memory block of the second super block (Matsudaira, Paragraph 45; Figs. 8-10, step S5, changing the arrangement [switching the matching] of physical blocks such that logical [first super] blocks 13, 14 swap bad blocks with normal blocks from logical [second super] blocks 5-8)
such that a number of bad blocks included in one super block is minimized (Matsudaira, Paragraph 45; Fig. 10, the number of bad blocks in each logical [super] block is equalized (equal distribution of bad blocks minimizes the amount of bad blocks in each use target superblock)).
Claims 2-4, 7-14, and 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Alwala in view of Luo, further in view of Matsudaira as applied to claims 1 and 15 above, and further in view of Emelyanov et al (US 11016684 B1), hereinafter Emelyanov.
Regarding claim 2, Alwala in view of Luo, further in view of Matsudaira teaches the storage device of claim 1, the memory controller (Alwala, Paragraph 33; Fig. 1, controller 123),
and the first and second sets of superblocks among the plurality of superblocks (Alwala, Paragraph 42; Fig. 1, superblocks 412 across multiple memory dies 404 (first and second sets of superblocks being from different memory dies)).
Alwala in view of Luo does not explicitly teach to store meta data in a first set of super blocks of the plurality of super blocks and store user data in a second set of super blocks of the plurality of super blocks.
However, Emelyanov teaches to store meta data in a first set of super blocks of the plurality of super blocks and store user data in a second set of super blocks of the plurality of super blocks (Col. 4, lines 7-18, 37-55; Fig. 2, [sets of] blocks of user data are stored in separate locations of the same device from [sets of] blocks of metadata).
Alwala, Luo, Matsudaira, and Emelyanov are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the storage device of Alwala in view of Luo, further in view of Matsudaira to further include the storing of metadata and user data to different blocks according to the teachings of Emelyanov. The motivation for doing so would have been to improve read/write efficiency by improving the management of file system metadata and data (Emelyanov, Col. 5, lines 53-56).
Regarding claim 3, Alwala in view of Luo, further in view of Matsudaira and Emelyanov teaches the storage device of claim 2, wherein the memory controller is configured to select the at least one memory block from each super block of the first set of super blocks that does not include a bad memory block (Luo, Paragraphs 48, 51-52; Fig. 2B, reallocating [including selecting] memory blocks from full superblocks 227-4, 227-1 [first set] which do not include a bad block) and
match the selected at least one memory block to a first additional super block (Alwala, Paragraphs 43, 50; Fig. 4, pairing [matching] good blocks to form new [first] superblocks).
Regarding claim 4, Alwala in view of Luo, further in view of Matsudaira and Emelyanov teaches the storage device of claim 2, wherein the memory controller is configured to select the at least one memory block from each super block of the second set of super blocks that does not include a bad memory block (Luo, Paragraphs 48, 51-52; Fig. 2B, reallocating [including selecting] memory blocks from full superblocks 227-5, 227-8 [second set] which do not include a bad block) and
match the selected at least one memory block to a second additional super block (Alwala, Paragraphs 43, 48, 50; Fig. 4, pairing [matching] good blocks to form new [second] superblocks in another memory die 404).
Regarding claim 7, Alwala teaches a storage device, comprising: a memory device including a plurality of memory dies (Paragraphs 28, 30; Fig. 1, storage device 102 comprises memory 110 including memory dies 112);
and a memory controller configured to: match at least one memory block included in each of the plurality of memory dies to each of a plurality of super blocks (Paragraphs 33, 42; Figs. 1 and 4, controller 123 matches pairs of two blocks into superblocks 412),
select first memory blocks from the first group of super blocks (Paragraph 43; Fig. 4, selecting good blocks from a plurality of superblocks 412 in a die 404 [first group]),
select second memory blocks from the second group of super blocks (Paragraph 43; Fig. 4, selecting good blocks from a plurality of superblocks 412 in a separate die 404 [second group]), and
generate at least one additional super block based on the first memory blocks and the second memory blocks (Paragraphs 43, 50; Fig. 4, forming new superblocks from memory blocks from each die 404 in spare pool 414).
Alwala does not explicitly teach to store meta data in a first group of super blocks of the plurality of super blocks, store user data in a second group of super blocks of the plurality of super blocks, release matching of the first memory blocks with the first group of super blocks while maintaining matching of a remainder of memory blocks with the first group of super blocks, release matching of the second memory blocks with the second group of super blocks while maintaining matching of a remainder of memory blocks with the second group of super blocks, and based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks, switch matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with matching of at least one memory block of a second super block of the plurality of super blocks, wherein the second super block is free of a bad memory block.
However, Luo teaches release matching of the first memory blocks with the first group of super blocks while maintaining matching of a remainder of memory blocks with the first group of super blocks (Paragraphs 51-52; Fig. 2B, reallocating [releasing matching] memory blocks from superblocks 227-1, 227-4 [first group] without deconstructing the superblocks), and
release matching of the second memory blocks with the second group of super blocks while maintaining matching of a remainder of memory blocks with the second group of super blocks (Paragraphs 51-52; Fig. 2B, reallocating [releasing matching] memory blocks from superblocks 227-5, 227-8 [second group] without deconstructing the superblocks).
Alwala and Luo are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the storage device of Alwala to further include the releasing matching of memory blocks from super blocks according to the teachings of Luo. The motivation for doing so would have been to reduce the impact of bad blocks on memory system performance (Luo, Paragraph 53).
Alwala in view of Luo does not explicitly teach to store meta data in a first group of super blocks of the plurality of super blocks, store user data in a second group of super blocks of the plurality of super blocks, and based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks, switch matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with matching of at least one memory block of a second super block of the plurality of super blocks, wherein the second super block is free of a bad memory block.
However, Emelyanov teaches to store meta data in a first group of super blocks of the plurality of super blocks, and store user data in a second group of super blocks of the plurality of super blocks (Col. 4, lines 7-18, 37-55; Fig. 2, blocks of user data are stored in separate locations of the same device from blocks of metadata).
Alwala, Luo and Emelyanov are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the storage device of Alwala in view of Luo to further include the storing of metadata and user data to different blocks according to the teachings of Emelyanov. The motivation for doing so would have been to improve read/write efficiency by improving the management of file system metadata and data (Emelyanov, Col. 5, lines 53-56).
Alwala in view of Luo, further in view of Emelyanov does not explicitly teach based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks, switch matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with matching of at least one memory block of a second super block of the plurality of super blocks, wherein the second super block is free of a bad memory block.
However, Matsudaira teaches based on a determination that a first super block of the plurality of super blocks comprises a plurality of bad memory blocks (Paragraph 43; Figs. 8-9, step S3, determining that logical [first super] blocks 13, 14 contain multiple bad blocks),
switch matching of at least one bad memory block of the plurality of bad memory blocks in the first super block with matching of at least one memory block of a second super block of the plurality of super blocks (Paragraph 45; Figs. 8-10, step S5, changing the arrangement [switching the matching] of physical blocks such that logical [first super] blocks 13, 14 swap bad blocks with normal blocks from logical [second super] blocks 5-8),
wherein the second super block is free of a bad memory block (Paragraph 45; Figs. 9-10, logical [second super] blocks 5-8 previously contained no bad blocks).
Alwala, Luo, Emelyanov, and Matsudaira are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the storage device of Alwala in view of Luo, further in view of Emelyanov to further include the switching a matching of bad memory blocks according to the teachings of Matsudaira. The motivation for doing so would have been to reduce variations in access speed (Matsudaira, Paragraph 49).
Regarding claim 8, Alwala in view of Luo, further in view of Emelyanov and Matsudaira teaches the storage device of claim 7, wherein the memory controller is configured to select the first memory blocks and the second memory blocks to be evenly distributed across the plurality of memory dies (Alwala, Paragraph 54, selecting one pair of blocks from each die [evenly distributed] to form a new superblock).
Regarding claim 9, Alwala in view of Luo, further in view of Emelyanov and Matsudaira teaches the storage device of claim 7, wherein the memory controller is configured to set a number of memory blocks included in each super block of the at least one additional super block equal to a number of memory blocks remaining in each super block of the plurality of super blocks (Alwala, Paragraphs 44, 50; Fig. 5, forming superblocks with a number of blocks equal to a superblock threshold 506, which dictates the size of all superblocks).
Regarding claim 10, Alwala in view of Luo, further in view of Emelyanov and Matsudaira teaches the storage device of claim 7, wherein the memory controller is configured to set a number of memory blocks included in each super block of the at least one additional super block different from a number of memory blocks remaining in each super block of the plurality of super blocks (Alwala, Paragraph 43; Fig. 4, blocks are grouped into superblocks according to a minimum and maximum size range, with newly formed superblocks having a different size due to being partially populated).
Regarding claim 11, Alwala in view of Luo, further in view of Emelyanov and Matsudaira teaches the storage device of claim 7, wherein the memory controller is configured to select the first memory blocks and the second memory blocks by sequentially rotating through the plurality of super blocks (Alwala, Paragraph 50; Fig. 4, selecting blocks from each die, containing superblocks, in sequence).
Regarding claim 12, Alwala in view of Luo, further in view of Emelyanov and Matsudaira teaches the storage device of claim 11, wherein, after a memory block is selected from a first memory die of one super block, the memory controller is configured to select a memory block from a second memory die of another super block excluding the first memory die (Alwala, Paragraph 50; Fig. 4, after selecting a block from a die 404 containing a superblock, selecting another block from a different die 404 next in sequence containing another superblock).
Regarding claim 13, Alwala in view of Luo, further in view of Emelyanov and Matsudaira teaches the storage device of claim 7, wherein the memory controller is configured to set the first memory blocks and the second memory blocks in each of remaining super blocks excluding super blocks that include bad blocks among the plurality of super blocks (Luo, Paragraphs 50-52; Fig. 2B, reallocating [setting] memory blocks within only full superblocks 227-1, 227-4, 227-6, and 227-8 (superblocks having only good blocks)).
Regarding claim 14, Alwala in view of Luo, further in view of Emelyanov and Matsudaira teaches the storage device of claim 7, wherein the memory controller is configured to switch the matching of the at least one bad memory block of the plurality of memory blocks in the first super block with the matching of the at least one memory block of the second super block (Matsudaira, Paragraph 45; Figs. 8-10, step S5, changing the arrangement [switching the matching] of physical blocks such that logical [first super] blocks 13, 14 swap bad blocks with normal blocks from logical [second super] blocks 5-8)
such that a number of bad blocks included in one super block is minimized (Matsudaira, Paragraph 45; Fig. 10, the number of bad blocks in each logical [super] block is equalized (equal distribution of bad blocks minimizes the amount of bad blocks in each use target superblock)).
Regarding claim 16, Alwala in view of Luo, further in view of Matsudaira teaches the method of claim 15 and first and second groups of superblocks of the plurality of superblocks (Alwala, Paragraph 42; Fig. 1, superblocks 412 across multiple memory dies 404 (first and second groups of superblocks being from different memory dies)).
Alwala in view of Luo, further in view of Matsudaira does not explicitly teach wherein a first group of super blocks of the plurality of super blocks are configured to store meta data, and a second group of super blocks of the plurality of super blocks are configured to store user data.
However, Emelyanov teaches wherein a first group of super blocks of the plurality of super blocks are configured to store meta data, and a second group of super blocks of the plurality of super blocks are configured to store user data. (Col. 4, lines 7-18, 37-55; Fig. 2, [groups of] blocks of user data are stored in separate locations of the same device from [groups of] blocks of metadata).
Alwala, Luo, Matsudaira, and Emelyanov are analogous art because they are in the same field of endeavor, that storage block management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Alwala in view of Luo, further in view of Matsudaira to further include the storing of metadata and user data to different blocks according to the teachings of Emelyanov. The motivation for doing so would have been to improve read/write efficiency by improving the management of file system metadata and data (Emelyanov, Col. 5, lines 53-56).
Regarding claim 17, Alwala in view of Luo, further in view of Matsudaira and Emelyanov teaches the method of claim 16, wherein first memory blocks selected from each of the first group of super blocks are matched to a first additional super block (Alwala, Paragraphs 43, 50; Fig. 4, selecting good blocks from a plurality of super blocks 412 [first group] and pairing [matching] good blocks to form new [first] superblocks).
Regarding claim 18, Alwala in view of Luo, further in view of Matsudaira and Emelyanov teaches the method of claim 16, wherein second memory blocks selected from each of the second group of super blocks are matched to a second additional super block (Alwala, Paragraphs 43, 48, 50; Fig. 4, selecting good blocks from a plurality of super blocks 412 in another memory die 404 [second group] and pairing [matching] good blocks to form new [second] superblocks).
Response to Arguments
Applicant’s arguments (see page 7 of the remarks, filed 2/10/2026) with respect to the rejection of claims 1, 5-6, 15, and 19-20 under 35 U.S.C 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Alwala, Luo, and Matsudaira.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Pinga whose telephone number is (571) 272-2620. The examiner can normally be reached on M-F 8:30am-6pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
supervisor, Arpan Savla, can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/J.M.P./Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137
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