Prosecution Insights
Last updated: October 01, 2026
Application No. 18/750,724

APPARATUS AND METHOD FOR ENSURING INTEGRITY OF QUANTUM COMPUTER

Non-Final OA §103§112
Filed
Jun 21, 2024
Priority
Jun 23, 2023 — RE 10-2023-0081176
Examiner
BEAN, GRIFFIN TANNER
Art Unit
Tech Center
Assignee
Korea University Research and Business Foundation
OA Round
1 (Non-Final)
28%
Grant Probability
At Risk
1-2
OA Rounds
2y 2m
Est. Remaining
43%
With Interview

Examiner Intelligence

Grants only 28% of cases
28%
Career Allowance Rate
9 granted / 32 resolved
-31.9% vs TC avg
Strong +15% interview lift
Without
With
+15.3%
Interview Lift
resolved cases with interview
Typical timeline
4y 5m
Avg Prosecution
25 currently pending
Career history
68
Total Applications
across all art units

Statute-Specific Performance

§101
36.6%
-3.4% vs TC avg
§103
44.3%
+4.3% vs TC avg
§102
9.9%
-30.1% vs TC avg
§112
8.8%
-31.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 32 resolved cases

Office Action

§103 §112
DETAILED ACTION This Action is responsive to Claims filed 08/09/2024. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Claims Claims 1-13 are currently pending. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 06/21/2024 was filed before the mailing date of the first Action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Drawings Receipt of Drawing filed on 08/09/2024 is acknowledged. These Drawings are acceptable. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-13 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The Claims’ use of “respectively into one” or “into one” creates ambiguity in Claims 1, 6, 7, 11, 12, and 13. It is unclear what the “one” represents, amid the rest of the claim verbiage pertaining to at least one first cubit, at least one quantitative gate, etc. The Dependent Claims and Specification do not clarify this grammatical ambiguity and are therefore similarly rejected. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (Variational quantum circuits for quantum state tomography, 2020), hereinafter Liu and Sotnikov et al. (Certification of quantum states with hidden structure of their bitstrings, 2022), hereinafter Sotnikov. In regards to Claim 1: The present invention claims: “A method for ensuring the integrity of a quantum computer, which is performed by a computing device including the quantum computer, the method comprising: performing an operation for at least one first qubit initialized, by using a first quantum circuit including at least one quantitative gate to obtain a first quantum state including first quantum information for each of the at least one first qubit;” Liu teaches “Given an unknown quantum state, it can be learned by maximizing the fidelity between the output of a variational quantum circuit and this state. The number of parameters of the variational quantum circuit grows linearly with the number of qubits and the circuit depth, so that only polynomial measurements are required, even for highly entangled states. After that, a subsequent classical circuit simulator is used to transform the information of the target quantum state from the variational quantum circuit into a familiar format.” (Abstract). See FIG. 1 and Section II (Page 2) for the operation being performed on the first circuit. “and composing first quantum states obtained for the at least one first qubit, respectively into one by using a second quantum circuit that composes the first quantum states obtained for the at least one first qubit, respectively into one…” Liu teaches “The information of the state is then stored with a quantum data structure: the variational circuit with optimized parameters. Then the information of the state can be transferred into a familiar format (e.g., a state vector) using a classical circuit simulator. (b) The structure of the variational quantum circuit for state estimation.” (FIG. 1) and “The classical circuit simulator based on MPS. (a) A 2n-qubit quantum state represented with MPS.” (FIG. 2) Liu fails to explicitly teach: “to generate a first hash qubit including the first quantum states composed into one as a hash value.” However, Sotnikov, in a similar field of endeavor, teaches “Here, we propose a numerically cheap procedure to distinguish quantum states which is based on a limited number of projective measurements in at least two different bases and computing inter-scale dissimilarities of the resulting bit-string patterns via coarse-graining. The information one obtains through this procedure can be viewed as a ‘hash function’ of quantum state—a simple set of numbers which is specific for a concrete wave function and can be used for certification.” (Abstract) and “Thus, instead of its complete reconstruction, one could hope to read out simple signature serving as a fingerprint of the many-body state—in a spirit similar to hash functions in computer science12,13—to make sure that the state is, with high probability, indeed the correct one (see ref. 14 for the usage of hash functions in quantum tomography).” (Introduction, right column). Sotnikov’s Methods Section teaches “To assign a characteristic hash function to a quantum state we perform three steps (Fig. 1): (i) initialization of the quantum state on a real quantum device or simulator, (ii) a number of projective measurements in at least two different bases, and (iii) computing the inter-scale dissimilarities of the resulting bit-string arrays.” (beginning Page 9, right column) Sotnikov teaches “The rapid development of quantum computing technologies already made it possible to manipulate a collective state of several dozens of qubits, which poses a strong demand on efficient methods for characterization and verification of large-scale quantum states.” (Abstract), and both Sotnikov and Liu make reference to the need to encode and verify the integrity of a quantum state in quantum tomography. It would have been obvious to one of ordinary skill in the art at the time of the Applicant’s filing to verify the integrity of a quantum state with the pseudo-hash method of Sotnikov in a system similar to Liu’s. In regards to claim 2: The present invention claims: “wherein the first quantum information includes information on a spin for each of the at least one first qubit.” See Liu Section IV (Page 4, left column) for the use/measurement of qubit spin. Sotnikov also references the use of spin in their disclosure (Page 2, left column). In regards to claim 3: The present invention claims: “wherein the first quantum information includes information on an operation result accumulated by an operation through the at least one quantum gate with respect to each of the at least one first qubit.” Liu teaches “In Fig. 1(b), we show a possible implementation of the VQC, which consists of interlacing layers of single-qubit rotation gates and two-qubit CNOT gates. To represent generic quantum states, both parametric rotational X (Rx) gates and rotational Y (Ry) gates are used, which are defined as…” (Page 2, right column). Sotnikov also references the use of gates in their disclosure (Page 2, Fig. 1). In regards to claim 4: The present invention claims: “obtaining a first rotation value from the composed first quantum state included in the first hash qubit by using a predetermined first rotation algorithm;” Liu teaches “In Fig. 1(b), we show a possible implementation of the VQC, which consists of interlacing layers of single-qubit rotation gates and two-qubit CNOT gates. To represent generic quantum states, both parametric rotational X (Rx) gates and rotational Y (Ry) gates are used, which are defined as…” (Page 2, right column). Sotnikov also references the use of gates in their disclosure (Page 2, Fig. 1). “and validating the first hash qubit based on whether the first rotation value and a predetermined first ground truth value correspond to each other.” Liu teaches “In Fig. 1(b), we show a possible implementation of the VQC, which consists of interlacing layers of single-qubit rotation gates and two-qubit CNOT gates. To represent generic quantum states, both parametric rotational X (Rx) gates and rotational Y (Ry) gates are used, which are defined as…” (Page 2, right column). Sotnikov teaches “First, with rotational gate Uθ one prepares cosðθ2 Þj0i þ sinðθ2 Þj1i state of one of the qubits in the system and takes it as a control qubit to perform controllable-NOT operation on the second qubit.” (Page 2, right column) In regards to claim 5: The present invention claims: “wherein the first predetermined first ground truth value is determined as 0 or 1 based on the predetermined first rotation algorithm.” See above how a combination of Liu and Sotnikov teaches Claim 4, although the combination does not teach the values of 0 and 1 specifically. It would have been obvious to one having ordinary skill in the art at the time the invention was made to use such ground truth values, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272,265 USPQ 215 (CCPA 1980). In regards to claims 6-11: The limitations of claims 6-11 are not materially different from the limitations of claim 1-5, save for, it appears to the Examiner, that the second quantum circuit is encoded similarly to the first circuit of claim 1 by a third circuit; therefore, the Examiner submits the process would be similar and that a combination of Liu and Sotnikov would reasonably be able to encode the second circuit similar to the first. In regards to claim 12: Claim 12 recites similar limitations to Claim 1, with the exception of “A computer program storing computer readable storage medium, wherein the computer program comprises instructions for causing a processor of a computing device including a quantum computer to perform the following steps for ensuring the integrity for the quantum computer, the steps comprising…”; therefore, both claims are similarly rejected. In regards to claim 13: Claim 13 recites similar limitations to Claim 1, with the exception of “A computing device including a quantum computer, for ensuring the integrity of the quantum computer, comprising: a processor; and a memory, wherein the processor performs an operation…”; therefore, both claims are similarly rejected. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GRIFFIN T BEAN whose telephone number is (703)756-1473. The examiner can normally be reached M - F 7:30 - 4:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Li Zhen can be reached at (571) 272-3768. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GRIFFIN TANNER BEAN/ Examiner, Art Unit 2121 /Li B. Zhen/ Supervisory Patent Examiner, Art Unit 2121
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Prosecution Timeline

Jun 21, 2024
Application Filed
Sep 23, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
28%
Grant Probability
43%
With Interview (+15.3%)
4y 5m (~2y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 32 resolved cases by this examiner. Grant probability derived from career allowance rate.

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