DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-X is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by WATANABE (Publication No.: US 2009/0087155 A1).
Regarding claim 1, 6, 14, WATANABE teaches A method comprising forming a stack of layers on a substrate, wherein the stack of layers comprises at least a first layer (reference numeral 21 in Figure 3D) and a second layer (reference numeral 24 in Figure 3D), wherein the first layer has an etch rate lower than an etch rate of a layer under the first layer (e.g. “slower for the lower clad layer 81 than for the upper clad layer 82 and the core layer 84” as in paragraphs [0012], [0032]), wherein the second layer is configured to operate as a core of a waveguide (e.g. “core layer 24” as in paragraph [0027] and throughout), patterning the stack of layers to simultaneously form at least a portion of one or more alignment aids (reference numeral 92, 94, 96 in Figure 4E) and at least a portion of the waveguide (reference numeral 24 in Figure 4E) , removing the first layer from the portion of the waveguide (e.g. as illustrated in Figure 4F), wherein the one or more alignment aids (e.g. “alignment markers” as in paragraph [0008] and throughout) are configured to assist in aligning an optical axis of an optical or optoelectronic device assembled on the substrate with an optical axis of the waveguide.
Regarding claim 2, 7, WATANABE teaches A method as in claim 1, wherein the first layer is disposed directly on the second layer, or wherein the second layer is disposed directly on the first layer, or wherein the first layer is separated from the second layer by one or more third layers (e.g. as illustrated in Figure 3A-4G) .
Regarding claim 3, WATANABE teaches A method as in claim 1, wherein the first layer comprises aluminum or an alloy (e.g. “metal” as in paragraph [0008]) or aluminum, wherein the second layer comprises at least one of silicon oxynitride, silicon nitride, or silicon (e.g. “silica film on the silicon substrate” as in paragraph [0008 and throughout]).
Regarding claim 4, WATANABE teaches A method as in claim 1, wherein patterning the stack of layers comprises etching the first layer using a first chemistry (e.g. “anisotropic dry etching” as in paragraph [0031]) and etching the second layer using a second chemistry different from the first chemistry (e.g. “wet etching” as in paragraph [0031]).
Regarding claim 5, 8, 9, 15, WATANABE teaches A method as in claim 1, wherein a top surface of a first alignment aid of the one or more alignment aids (e.g. “alignment markers” as in paragraph [0008] and throughout) is separated from a lateral surface of the waveguide core (reference numeral 24 in Figure 4G) by a first vertical distance (e.g. distance between the upper surface of reference numeral 73 and center line of reference numeral 74 as illustrated in Figure 4G) along a first direction perpendicular to a lateral direction parallel to the substrate (reference numeral 73 in Figure 4G) , wherein the first vertical distance is configured to match with a second vertical distance (e.g. distance between the upper surface of reference numeral 73 and center line of reference numeral 244 as illustrated in Figure 4G), with the second vertical distance being between a bottom surface of the optical or optoelectronic device and a lateral surface of an optical output of the optical or optoelectronic device, wherein a side surface of a second alignment aid of the one or more alignment aids (reference numeral 92, 94, or 96 in Figure 4G) is separated from a vertical surface of the waveguide core (reference numeral 24 in Figure 4G) by a first horizontal distance along a lateral direction parallel to the substrate, wherein the first horizontal distance is configured to match with a second horizontal distance (e.g. as illustrated in Figure 4G), with the second horizontal distance being between a side surface of the optical or optoelectronic device and a vertical surface of an optical output of the optical or optoelectronic device (reference numeral 72 in Figure 4G).
Regarding claim 10, 16, WATANABE teaches A method as in claim 6, wherein an alignment aid of the one or more alignment aids comprises a fiducial pattern (reference numeral 91-96 in Figure 1) , with the fiducial pattern configured to assist in placing the optical or optoelectronic device on the substrate.
Regarding claim 11, 17, WATANABE teaches A method as in claim 6, wherein an optical fiber or a fiber mounting block or a fiber attachment unit is coupled to the substrate (reference numeral 20 in Figure 1) , wherein an alignment aid of the one or more alignment aids (reference numeral 91-96 in Figure 1) is configured to align the optical fiber or the fiber mounting block or the fiber attachment unit with the waveguide.
Regarding claim 13, WATANABE teaches A method as in claim 6, wherein the waveguide comprises a wavelength selection structure or a loopback waveguide structure (reference numeral 24 in Figure 4G), wherein the wavelength selection structure comprises a Bragg grating structure or a ring oscillator structure.
Regarding claim 18, WATANABE teaches A method as in claim 14, wherein the optical or optoelectronic device is assembled on the substrate using one or more solder connections between one or more metal contacts on the optical or optoelectronic device and one or more metal contacts formed on the substrate (e.g. “patterning of metals such as electrodes” as in paragraph [0046]), the method further comprising heating the one or more solder connections to move the facet of the optical or optoelectronic device (reference numeral 72 in Figure 1) toward the facet of the waveguide (reference numeral 24a in Figure 1) , with the one or more alignment aids (reference numeral 91-96 in Figure 1) assisting in aligning an optical axis of an optical or optoelectronic device disposed in the cavity with an optical axis of the waveguide.
Regarding claim 19, WATANABE teaches A method as in claim 14, wherein the substrate comprises an electrical interconnect layer comprising one or more electrical interconnect lines (e.g. “patterning of metals such as electrodes” as in paragraph [0046]), with at least an electrical interconnect line of the one or more electrical interconnect lines connected to a first metal contact formed on the substrate (e.g. “patterning of metals such as electrodes” as in paragraph [0046]), wherein the first metal contact is configured to be electrically coupled to a second metal contact on the optical or optoelectronic device (reference numeral 75, 76 in Figure 1) .
Regarding claim 20, WATANABE teaches A method as in claim 14, further comprising forming one or more layers comprising at least one of a spacer layer, a buffer layer, an encapsulate layer, or a planarization layer formed from one or more of silicon oxide, silicon oxynitride, silicon nitride, or polymer (e.g. any of the layers 20 as illustrated in Figure 4G) .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over WANTANABE in view of Sherrer (Patent No.: US 2005/0111797 A1).
Regarding claim 12, WATANABE teaches A method as in claim 6, wherein an alignment aid of the one or more alignment aids (reference numeral 91-96 in Figure 1) is configured to align a waveguide, but fails to specifically teach that a ball lens is coupled to the substrate, said alignment aids configured to align the ball lens with the waveguide. However, Sherrer teaches that this concept is well known in the art (reference numeral 22, 32 in Figure 5A). One skilled in the art would have been motivated to utilize a ball lens coupled to the substrate, where said alignment aids are configured to align the ball lens with the waveguide in order to form mounting features as small as possible to minimize etch depth into silicon, allowing tighter tolerances to be held (e.g. as in paragraph [0051] of Sherrer). Therefore, it would have been obvious for one skilled in the art to utilize a ball lens coupled to the substrate, where said alignment aids are configured to align the ball lens with the waveguide.
Conclusion
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/AGUSTIN BELLO/ Primary Examiner, Art Unit 2635
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