Prosecution Insights
Last updated: September 17, 2026
Application No. 18/753,288

DIGITAL AUDIO AMPLIFIER, CHIP, AND ELECTRONIC DEVICE

Non-Final OA §103
Filed
Jun 25, 2024
Priority
Mar 17, 2023 — CN 202310269376.1 +1 more
Examiner
MARANO, NATASHA YOLANDA
Art Unit
Tech Center
Assignee
Shanghai Awinic Microelectronics Technology Co. Ltd.
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
4 granted / 4 resolved
+40.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
15 currently pending
Career history
12
Total Applications
across all art units

Statute-Specific Performance

§103
62.9%
+22.9% vs TC avg
§102
16.1%
-23.9% vs TC avg
§112
21.0%
-19.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 4 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 12, 13, 14, 15 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US-20200228076-A1) in view of Berkhout et al. (US-20170294888-A1). Regarding claim 1: Lee, Fig. 1, discloses a digital audio amplifier (100), comprising: a digital-to-analog conversion section (DAC 108 with PDM DAC 106 upstream); a drive section (PWM loop140/PWM encoder 122, driver 124); Wherein the digital-to-analog conversion section (DAC 108 with PDM DAC 106 upstream) is configured to convert a to-be-amplified digital audio signal into an analog signal (current DAC 108 output current); the drive section (124) is configured to perform pulse width modulation (PWM)on the analog signal and then output a drive signal (driver 124/outputs112, 114). However, Lee does not disclose the audio amplification section is configured to amplify the drive signal into a first amplified signal at a first amplification factor when the audio amplification section is provided with a first voltage by a first voltage source, and amplify the drive signal into a second amplified signal at a second amplification factor when the audio amplification section is provided with a second voltage by a second voltage source, wherein the first voltage of the first voltage source is lower than the second voltage of the second voltage source, and the first amplification factor is smaller than the second amplification factor. Berkhout, Fig. 13, discloses the audio amplification section (964) is configured to amplify the drive signal into a first amplified signal at a first amplification factor when the audio amplification section (964) is provided with a first voltage by a first voltage source, and amplify the drive signal into a second amplified signal at a second amplification factor when the audio amplification section (964) is provided with a second voltage by a second voltage source, wherein the first voltage of the first voltage source is lower than the second voltage of the second voltage source, and the first amplification factor is smaller than the second amplification factor (Berkhout: paragraphs, [0111]-[0113], [0115]). It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Lee’s audio amplifier to operate at different power supply voltage levels and correspondingly adjust the gain of the audio amplification section in order to reduce noise in the amplifier system while maintaining a desired overall gain (Berkhout, paragraph [0114]). Regarding claim 2: Lee, Fig. 1, further discloses, the drive signal outputted from the drive section is a first drive signal (driver 124/outputs 112, 114; PWM encoder 122); the first drive signal is a signal obtained by performing pulse width modulation on the analog signal based on a first reference signal (PWM loop 140/PWM encoder 122); the second drive signal is a signal obtained by performing pulse width modulation on the analog signal based on a second reference signal (PWM encoder 122 selectively providing pulses at different voltage levels); and an amplitude of the first reference signal is smaller than an amplitude of the second reference signal (encoder 122 selects voltages such as 0.1v, 0.6v, and 1.2v, whereby the pulses vary in height according to the selected voltage; paragraph [0028], lines 5-10). However, Lee does not disclose that when the audio amplification section is provided with the first voltage by the first voltage source, the drive signal outputted from the drive section is a first drive signal; when the audio amplification section is provided with the second voltage by the second voltage source, the drive signal outputted from the drive section is a second drive signal. Berkhout, Fig. 13, discloses a first operating mode in the audio amplification section (964) is provided with the first voltage by the first voltage source (wherein the DC-DC booster (962) operates in the follower mode such that the booster output voltage Vbst is approximately equal to the battery supply voltage Vbat), the drive signal outputted from the drive section is a first drive signal (the drive signal corresponding to Berkhout’s first/low-power operating mode; paragraph [0112], lines 1-9); and a second operating mode in which the audio amplification section (964) is provided with the second voltage by the second voltage source (higher voltage, wherein the DC-DC booster (962) provides a boosted voltage Vbst>Vbat), the drive signal outputted from the drive section is a second drive signal (the drive signal corresponding to Berkhout’s second/ high-power operating mode; paragraph [0113], lines 1-3, 6-8); It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Lee’s audio amplifier such that the respective drive-signal conditions are employed according to different power-supply voltage operating modes, as taught by Berkhout, in order to reduce noise at lower power-supply voltages while maintaining the desired overall gain of the amplifier system (Berkhout, paragraph [0114]). Regarding claim 12: Lee, Fig. 1, disclose a digital-to-analog conversion section (DAC 108 with PDM DAC 106 upstream), the drive section (PWM loop140/PWM encoder 122, driver 124), However, Lee does not disclose the audio amplification section form a first amplification branch circuit of the amplifier; and the amplifier further comprises a second amplification branch circuit configured to amplify a differential signal of the digital audio signal. Berkhout, Fig. 13, discloses the audio amplification section (964) forms a first amplification branch circuit of the amplifier; and the amplifier further comprises a second amplification branch circuit configured to amplify a differential signal of the digital audio signal (Berkhout: paragraphs, [0111] - [0113], [0115]). It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Lee’s audio amplification section to include the differential amplification branch arrangement taught by Berkhout in order to provide differential amplification and corresponding analog feedback paths for producing a differential PWM output for driving the load while maintaining stability of the analog feedback loops (Berkhout, paragraph [0068]). Regarding claim 13: Lee does not disclose the first amplification branch circuit and the second amplification branch circuit has an equal amplification factor for the digital audio signal. Berkhout, Fig. 4, discloses the first amplification branch circuit and the second amplification branch circuit have an equal amplification factor for the digital audio signal (paragraphs [0050], lines 17-18, 21-24; [0052], lines 14-17; [0062], lines 11-16; [0066], lines 1-3). The differential A and B amplification paths include corresponding feedback resistances RFBA and RFBB, and Berkhout teaches that corresponding feedback resistances may be equal to each other and that the gain of the class-D amplifier is linearly dependent on the feedback resistance value. It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to configure the corresponding feedback resistances of the first and second amplification branches to have equal resistance values, as taught by Berkhout, thereby providing equal amplification branches, because Berkhout teaches that the gain of the class-D amplifier is linearly dependent on the feedback resistance value. Regarding claim 14: Lee, Fig. 1, discloses a chip (paragraph [0032], lines 23-24), comprising: a digital audio amplifier (100), comprising: a digital-to-analog conversion section (DAC 108 with PDM DAC 106 upstream); a drive section (PWM loop140/PWM encoder 122, driver 124); Wherein the digital-to-analog conversion section (DAC 108 with PDM DAC 106 upstream) is configured to convert a to-be-amplified digital audio signal into an analog signal (current DAC 108 output current); the drive section (124) is configured to perform pulse width modulation (PWM)on the analog signal and then output a drive signal (driver 124/outputs112, 114). However, Lee does not disclose the audio amplification section is configured to amplify the drive signal into a first amplified signal at a first amplification factor when the audio amplification section is provided with a first voltage by a first voltage source, and amplify the drive signal into a second amplified signal at a second amplification factor when the audio amplification section is provided with a second voltage by a second voltage source, wherein the first voltage of the first voltage source is lower than the second voltage of the second voltage source, and the first amplification factor is smaller than the second amplification factor. Berkhout, Fig. 13, discloses the audio amplification section (964) is configured to amplify the drive signal into a first amplified signal at a first amplification factor when the audio amplification section (964) is provided with a first voltage by a first voltage source, and amplify the drive signal into a second amplified signal at a second amplification factor when the audio amplification section (964) is provided with a second voltage by a second voltage source, wherein the first voltage of the first voltage source is lower than the second voltage of the second voltage source, and the first amplification factor is smaller than the second amplification factor (Berkhout: paragraphs, [0111]-[0113], [0115]). It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Lee’s audio amplifier to operate at different power supply voltage levels and correspondingly adjust the gain of the audio amplification section in order to reduce noise in the amplifier system while maintaining a desired overall gain (Berkhout, paragraph [0114]). Regarding claim 15: Lee, Fig. 1, discloses an electronic device (paragraph [0032], lines 6-16), comprising: a chip (paragraph [0032], lines 23-24), comprising: a digital audio amplifier, comprising: a digital audio amplifier (100), comprising: a digital-to-analog conversion section (DAC 108 with PDM DAC 106 upstream); a drive section (PWM loop140/PWM encoder 122, driver 124); Wherein the digital-to-analog conversion section (DAC 108 with PDM DAC 106 upstream) is configured to convert a to-be-amplified digital audio signal into an analog signal (current DAC 108 output current); the drive section (124) is configured to perform pulse width modulation (PWM)on the analog signal and then output a drive signal (driver 124/outputs112, 114). However, Lee does not disclose the audio amplification section is configured to amplify the drive signal into a first amplified signal at a first amplification factor when the audio amplification section is provided with a first voltage by a first voltage source, and amplify the drive signal into a second amplified signal at a second amplification factor when the audio amplification section is provided with a second voltage by a second voltage source, wherein the first voltage of the first voltage source is lower than the second voltage of the second voltage source, and the first amplification factor is smaller than the second amplification factor. Berkhout, Fig. 13, discloses the audio amplification section (964) is configured to amplify the drive signal into a first amplified signal at a first amplification factor when the audio amplification section (964) is provided with a first voltage by a first voltage source, and amplify the drive signal into a second amplified signal at a second amplification factor when the audio amplification section (964) is provided with a second voltage by a second voltage source, wherein the first voltage of the first voltage source is lower than the second voltage of the second voltage source, and the first amplification factor is smaller than the second amplification factor (Berkhout: paragraphs, [0111]-[0113], [0115]). It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Lee’s audio amplifier to operate at different power supply voltage levels and correspondingly adjust the gain of the audio amplification section in order to reduce noise in the amplifier system while maintaining a desired overall gain (Berkhout, paragraph [0114]). Allowable Subject Matter Claims 3-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: Regarding claim 3, none of the references teach a first field effect transistor; a second field effect transistor; a third field effect transistor; and a fourth field effect transistor, wherein: a first input terminal of the first field effect transistor is configured to receive a high level signal of the first drive signal, a second input terminal of the first field effect transistor is connected to the first voltage source, and an output terminal of the first field effect transistor is connected to an output terminal of the fourth field effect transistor; a first input terminal of the second field effect transistor is configured to receive a high level signal of the second drive signal, a second input terminal of the second field effect transistor is connected to the second voltage source, and an output terminal of the second field effect transistor is connected to a second input terminal of the third field effect transistor; a first input terminal of the third field effect transistor is configured to receive a low level signal of the first drive signal or the second drive signal, and an output terminal of the third field effect transistor is grounded; and a first input terminal of the fourth field effect transistor is configured to receive the high level signal of the first drive signal, and a second input terminal of the fourth field effect transistor is connected to the output terminal of the second field effect transistor and is connected to the second input terminal of the third field effect transistor. Regarding claims 4-5: depend therefrom claim 3 and include the same allowable features Regarding claims 6, none of the references teach the integrating unit is configured to perform pulse width modulation on the analog signal based on the first reference signal when the audio amplification section is provided with the first voltage by the first voltage source, to output the first drive signal to the driving gate unit, and perform pulse width modulation on the analog signal based on the second reference signal when the audio amplification section is provided with the second voltage by the second voltage source, to output the second drive signal to the driving gate unit; and the driving gate unit is configured to output a high level signal of the first drive signal by a first output terminal, output a high level signal of the second drive signal by a second output terminal, and output a low level signal of the first drive signal or the second drive signal by a third output terminal. Regarding claims 7-11: depend therefrom claim 3 and include the same allowable features Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yamauchi (US-20180076806-A1) discloses carrier-based PWM modulation using comparison circuitry to generate PWM outputs. LI et al. (US-20200169234-A1) discloses an audio amplifier having supply-voltage control that adjusts operation based on selected supply voltages. Any inquiry concerning this communication or earlier communications from the examiner should be directed to /NATASHA Y MARANO/ whose telephone number is (571)272-9512. The examiner can normally be reached Mon - Fri 7:30am - 3:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached at 571-272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NATASHA Y MARANO/ /JOHN W POOS/ Primary Examiner, Art Unit 2843 Examiner, Art Unit 2843
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Prosecution Timeline

Jun 25, 2024
Application Filed
Sep 03, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12738899
TRANSCONDUCTOR WITH CURRENT LIMITER
3y 1m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 1 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
2y 11m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 4 resolved cases by this examiner. Grant probability derived from career allowance rate.

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