Prosecution Insights
Last updated: October 27, 2026
Application No. 18/753,499

DIFFERENTIAL HYBRID SUPPLY GENERATOR AND SUPPLY MODULATOR WITH THREE OR FOUR LEVELS

Final Rejection §103
Filed
Jun 25, 2024
Examiner
TORRES-RIVERA, ALEX
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
687 granted / 792 resolved
+18.7% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
27 currently pending
Career history
822
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
54.6%
+14.6% vs TC avg
§102
24.7%
-15.3% vs TC avg
§112
17.3%
-22.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 792 resolved cases

Office Action

§103
DETAILED ACTION This action is in response to the 09/21/2026 amendment. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Response to Arguments Applicant's arguments filed 09/21/2026 have been fully considered but they are not persuasive. Applicant(s) argue(s) in page 11 with respect to claims 1 and 21: “From the above, it is clear that the voltage converter shown in Fig. 6 of Enenkel is designed and functions to provide a stable/continuous output voltage in the range between zero and twice the supply voltage. Fig. 6 of Enenkel cannot reasonably be understood as modulating an output voltage "from among a set of three or more voltage levels" as set forth in claim 1. At best, Fig. 6 of Enenkel can be understood as a configurable voltage converter with the output voltage "lying in the range between zero and twice the supply voltage." Fig. 6 of Enenkel does not teach or suggest modulating between different voltage levels and certainly not between a set of three or more voltage levels.” In response, Enenkel, Fig. 6 explicitly discloses in paragraph 051 “to provide output voltages lying in the range between zero and twice the supply voltage, wherein the bridge circuit is activated for desired output voltages in the range from zero to the supply voltage VSAT, and the bridge circuit BP is deactivated for desired output voltages between the supply voltage VBAT and twice the supply voltage. For this purpose, the combined control section RDCDC, RCP emits a corresponding control signal to the bridge circuit BP. A corresponding value for the desired output voltage can be supplied to the voltage converter via one of the control terminals SDA, SCL”. That is, when the bridge circuit BP is activated the output voltage is modulated between a desired range from zero to the supply voltage VSAT, and when the bridge circuit BP is de-activated, the output voltage is modulated between a range of VBAT and 2 x VSAT. According to paragraph 051 of Enenzekel, Fig. 6 modulates the output voltage to at least voltages levels 0V, VSAT, VBAT and 2VSAT. That’s at least 4 different voltage levels without counting that it is suggested that Fig. 6 can modulates the complete range of levels between said maximum and minimum voltage levels. Therefore, the rejection in view of Enenzekel, Fig. 1 in view of Enenzekel, Fig. 6 is maintained. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1 – 4, 8 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Pub. No. 2012/0249096; (hereinafter Enenkel) in view of Enenkel, Fig. 6. Regarding claim 1, Enenkel [e.g. Fig. 1] discloses a system comprising: a hybrid supply generator/modulator having: a first stage [e.g. VBAT, DCDC] having an input [e.g. VDD / VBAT] configured to receive an input voltage [e.g. VDD / VBAT] and first and second outputs [e.g. two inputs of CP] configured to provide respective first [e.g. VDD / VBAT] and second intermediate voltages [e.g. step-down voltage of DCDC] having respective first [e.g. VDD / VBAT] and second intermediate voltage levels [e.g. step-down voltage level of DCDC output, paragraph 034 recites “By appropriate opening and closing of the first and second switches S1, S2 with intermediate storage on the inductive accumulator LSW in the step-down converter DCDC, energy is transferred to the first capacitive accumulator CDC in order to generate a first intermediate voltage at the output of the step-down converter circuit DCDC. A level of the first intermediate voltage depends in a known manner on the respective switching durations of the first and second switches S1, S2”], and a second stage [e.g. CP] having first [e.g. VDD / VBAT] and second [e.g. output of DCDC] inputs configured to respectively receive the first and second intermediate voltages, a switching network [e.g. charge pump (CP)], at least one energy storage device [e.g. CFLY], and an output configured to provide an output voltage [e.g. at OUT]; and a controller configured to operate the switching network to modulate the voltage level of the output voltage from among a set of voltage levels [e.g. paragraphs 035 - 036 recite “In the charge pump circuit, the second capacitive accumulator CFLY is charged by means of a supply voltage VBAT at the supply voltage terminal VDD to the value of the supply voltage VBAT, for example. In other words, the second capacitive accumulator CFLY is charged to a second intermediate voltage that corresponds in this case to the supply voltage VBAT. By appropriate connection of several capacitive accumulators in the charge pump circuit CP, second intermediate voltages that are smaller or larger than the supply voltage VBAT can also be generated. When the charge pump circuit CP has generated the second intermediate voltage, it is capable of connecting the second capacitive accumulator CFLY and the first capacitive accumulator CDC, on which the first intermediate voltage is present, in such a manner that an output voltage is present at the output terminal OUT that is composed of the first and second intermediate voltages, for example in an additive manner. The output accumulator COUT is thus charged to this output voltage”]. Enenkel, Fig. 1 fails to disclose to operate the switching network to modulate the voltage level of the output voltage from among a set of three or more voltage levels. Emphasis added to the lacking limitation. Enekel, Fig. 6 teaches to operate the switching network to modulate the voltage level of the output voltage from among a set of three or more voltage levels [e.g. paragraph 051 recites “The bridge circuit BP is used to bridge the charge pump circuit CP, so that the first intermediate voltage is output as output voltage directly via the first capacitive accumulator CDC to the output terminal OUT. Accordingly, there is no increase of the first intermediate voltage by the second intermediate voltage from the charge pump circuit CP if the switch of the bridge circuit BP is closed. With such a voltage converter, it is therefore possible to provide output voltages lying in the range between zero and twice the supply voltage, wherein the bridge circuit is activated for desired output voltages in the range from zero to the supply voltage VSAT, and the bridge circuit BP is deactivated for desired output voltages between the supply voltage VBAT and twice the supply voltage. For this purpose, the combined control section RDCDC, RCP emits a corresponding control signal to the bridge circuit BP. A corresponding value for the desired output voltage can be supplied to the voltage converter via one of the control terminals SDA, SCL”]. It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Enenkel, Fig. 1 by to operate the switching network to modulate the voltage level of the output voltage from among a set of three or more voltage levels as taught by Enenkel, Fig. 6 in order of being able to provide a wide range of desired output voltages. Regarding claim 2, Enenkel [e.g. Fig. 1] discloses wherein the first or second intermediate voltage corresponds to the input voltage [e.g. VBAT / VDD]. Regarding claim 3, Enenkel [e.g. Fig. 1] discloses wherein the set of three or more voltages levels includes at least: a first voltage level corresponding to the first intermediate voltage level [e.g. VDD / VBAT]; and a third voltage level corresponding to the second intermediate voltage level [e.g. paragraphs 035 - 036 recite “In the charge pump circuit, the second capacitive accumulator CFLY is charged by means of a supply voltage VBAT at the supply voltage terminal VDD to the value of the supply voltage VBAT, for example. In other words, the second capacitive accumulator CFLY is charged to a second intermediate voltage that corresponds in this case to the supply voltage VBAT. By appropriate connection of several capacitive accumulators in the charge pump circuit CP, second intermediate voltages that are smaller or larger than the supply voltage VBAT can also be generated. When the charge pump circuit CP has generated the second intermediate voltage, it is capable of connecting the second capacitive accumulator CFLY and the first capacitive accumulator CDC, on which the first intermediate voltage is present, in such a manner that an output voltage is present at the output terminal OUT that is composed of the first and second intermediate voltages, for example in an additive manner. The output accumulator COUT is thus charged to this output voltage”]. Enenkel [e.g. Fig. 1] fails disclose a second voltage level different from the first and second intermediate voltage levels. Enenkel, Fig. 6 teaches a second voltage level different from the first and second intermediate voltage levels [e.g. paragraphs 035 - 036 recite “In the charge pump circuit, the second capacitive accumulator CFLY is charged by means of a supply voltage VBAT at the supply voltage terminal VDD to the value of the supply voltage VBAT, for example. In other words, the second capacitive accumulator CFLY is charged to a second intermediate voltage that corresponds in this case to the supply voltage VBAT. By appropriate connection of several capacitive accumulators in the charge pump circuit CP, second intermediate voltages that are smaller or larger than the supply voltage VBAT can also be generated. When the charge pump circuit CP has generated the second intermediate voltage, it is capable of connecting the second capacitive accumulator CFLY and the first capacitive accumulator CDC, on which the first intermediate voltage is present, in such a manner that an output voltage is present at the output terminal OUT that is composed of the first and second intermediate voltages, for example in an additive manner. The output accumulator COUT is thus charged to this output voltage”]. It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Enenkel, Fig. 1 by a second voltage level different from the first and second intermediate voltage levels as taught by Enenkel, Fig. 6 in order of being able to provide a wide range of desired output voltages. Regarding claim 4, Enenkel [e.g. Fig. 1] fails to disclose wherein the switching network has at least the following states: a first state producing the third voltage level; a second state producing the second voltage level; a third state also producing the second voltage level; and a fourth state producing the first voltage level. Enenkel [e.g. Figs. 6 – 7B] teaches wherein the switching network has at least the following states: a first state producing the third voltage level; a second state producing the second voltage level; a third state also producing the second voltage level; and a fourth state producing the first voltage level [e.g. paragraph 057 – 058 recite “FIGS. 7A and 7B show a feedback line FB that feeds back the voltage on the first capacitive accumulator CDC to the control section RDCDC. Thus the first and second switching phases P1, P2 can be controlled by means of the switches S1, S2 as already described in order to be able to output a desired first intermediate voltage or a desired output voltage. It may be noted that the embodiments described in the various figures can easily be combined. Further variations are also possible, for example, the provision of a larger number of charge accumulators in the charge pump circuit. In the third switching phase, three charge accumulators can be connected in series, while they are connected in parallel in the fourth switching phase. Accordingly, roughly one third of the supply voltage results as the second intermediate voltage. On the other hand, charge pump circuits that generate a second intermediate voltage that is higher than the supply voltage can also be used”]. It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Enenkel, Fig. 1 by wherein the switching network has at least the following states: a first state producing the third voltage level; a second state producing the second voltage level; a third state also producing the second voltage level; and a fourth state producing the first voltage level as taught by Enenkel, Fig. 6 in order of being able to provide a wide range of desired output voltages. Regarding claim 8, Enenkel [e.g. Fig. 1] fails to disclose wherein the switching network includes: a first switch having a first terminal connected to the second input of the second stage; a second switch having a first terminal connected to a second terminal of the first switch; a third switch having a first terminal connected to a second terminal of the second switch; and a fourth switch having a first terminal connected to a second terminal of the third switch and a second terminal connected to the first input of the second stage. Enenkel [e.g. Fig. 6] teaches wherein the switching network includes: a first switch [e.g. S32] having a first terminal connected to the second input of the second stage [e.g. at lower terminal of S2]; a second switch [e.g. S41] having a first terminal connected to a second terminal of the first switch; a third switch [e.g. BP] having a first terminal connected to a second terminal of the second switch; and a fourth switch [e.g. S31, S42] having a first terminal connected to a second terminal of the third switch and a second terminal connected to the first input of the second stage [e.g.VDD]. It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Enenkel, Fig. 1 by wherein the switching network includes: a first switch having a first terminal connected to the second input of the second stage; a second switch having a first terminal connected to a second terminal of the first switch; a third switch having a first terminal connected to a second terminal of the second switch; and a fourth switch having a first terminal connected to a second terminal of the third switch and a second terminal connected to the first input of the second stage as taught by Enenkel, Fig. 6 in order of being able to provide a wide range of desired output voltages. Regarding claim 21, Enenkel [e.g. Fig. 1] discloses a method for controlling a hybrid supply generator/modulator, the method comprising: producing [e.g. RCP, RDCDC] control signals [e.g. control signals for S1, S2 and switches in the charge pump (CP)] to turn switches of a second stage [e.g. CP] of the hybrid supply generator/modulator on and off to modulate a voltage level of a supply voltage from among a set of voltage levels [e.g. paragraphs 035 - 036 recite “In the charge pump circuit, the second capacitive accumulator CFLY is charged by means of a supply voltage VBAT at the supply voltage terminal VDD to the value of the supply voltage VBAT, for example. In other words, the second capacitive accumulator CFLY is charged to a second intermediate voltage that corresponds in this case to the supply voltage VBAT. By appropriate connection of several capacitive accumulators in the charge pump circuit CP, second intermediate voltages that are smaller or larger than the supply voltage VBAT can also be generated. When the charge pump circuit CP has generated the second intermediate voltage, it is capable of connecting the second capacitive accumulator CFLY and the first capacitive accumulator CDC, on which the first intermediate voltage is present, in such a manner that an output voltage is present at the output terminal OUT that is composed of the first and second intermediate voltages, for example in an additive manner. The output accumulator COUT is thus charged to this output voltage”], wherein the hybrid supply generator/modulator comprises a first stage [e.g. VBAT, DCDC] to generate first [e.g. VDD / VBAT] and second [e.g. step-down voltage of DCDC] intermediate voltage levels from a first input [e.g. VDD / VBAT] and the second stage to synthesize the supply voltage from the first and second intermediate voltage levels [e.g. paragraph 035 – 036 above]. Enenkel, Fig. 1 fails to disclose to modulate a voltage level of a supply voltage from among a set of three or more voltage levels. Emphasis added to the lacking limitation. Enekel, Fig. 6 teaches to modulate a voltage level of a supply voltage from among a set of three or more voltage levels [e.g. paragraph 051 recites “The bridge circuit BP is used to bridge the charge pump circuit CP, so that the first intermediate voltage is output as output voltage directly via the first capacitive accumulator CDC to the output terminal OUT. Accordingly, there is no increase of the first intermediate voltage by the second intermediate voltage from the charge pump circuit CP if the switch of the bridge circuit BP is closed. With such a voltage converter, it is therefore possible to provide output voltages lying in the range between zero and twice the supply voltage, wherein the bridge circuit is activated for desired output voltages in the range from zero to the supply voltage VSAT, and the bridge circuit BP is deactivated for desired output voltages between the supply voltage VBAT and twice the supply voltage. For this purpose, the combined control section RDCDC, RCP emits a corresponding control signal to the bridge circuit BP. A corresponding value for the desired output voltage can be supplied to the voltage converter via one of the control terminals SDA, SCL”]. It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Enenkel, Fig. 1 by modulate a voltage level of a supply voltage from among a set of three or more voltage levels as taught by Enenkel, Fig. 6 in order of being able to provide a wide range of desired output voltages. Examiner's Note Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Allowable Subject Matter Claims 5 – 7, 9 – 20 and 22 – 25 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the indication of the allowability of claim 5 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “in response to a command to set the output voltage level to the second voltage level, the controller uses a state machine to operate the switching network alternately between the second and third states to maintain the second voltage level. The primary reason for the indication of the allowability of claim 9 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein: in the first state, the first and second switches are on; in the second state, the first and third switches are on; in the third state, the second and fourth switches are on; and in the fourth state, the third and fourth switches are on. The primary reason for the indication of the allowability of claim 10 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein a first terminal of the at least one energy storage device is connected between the first and second switches and a second terminal of the at least one energy storage device is connected between the third and fourth switches. The primary reason for the indication of the allowability of claim 11 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the output of the second stage is connected between the second and third switches. The primary reason for the indication of the allowability of claim 12 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the set of three or more voltages levels includes at least: a first voltage level corresponding to the first intermediate voltage level; a second voltage level different from the first and second intermediate voltage levels; a third voltage level also different from the first and second intermediate voltage levels; and a fourth voltage level corresponding to the second intermediate voltage level”. The primary reason for the indication of the allowability of claim 22 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein turning the switches of the second stage on and off includes using one or more state machines to alternately operate the switches between different ones of at least four distinct switching states to maintain at least one of the set of three or more voltage levels”. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Torres-Rivera whose telephone number is (571)272-5261. The examiner can normally be reached M-F 9:00-5:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838
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Prosecution Timeline

Jun 25, 2024
Application Filed
Apr 13, 2026
Response after Non-Final Action
Jul 02, 2026
Non-Final Rejection mailed — §103
Sep 21, 2026
Response Filed
Oct 06, 2026
Final Rejection mailed — §103 (current)

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