DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Email Communication
Applicant is encouraged to authorize the Examiner to communicate with applicant via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502.03, 502.05.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 4-7, & 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2006/0139848) in view of JP2002289456A hereafter referred to as Iwasaki and Inomata et al. (US 2019/0035554).
In regards to claim 1,
Kim ‘848 discloses a multilayer ceramic capacitor comprising:
an element body portion including a first principal surface and a second principal surface opposite to each other in a thickness direction, a first side surface and a second side surface opposite to each other in a width direction, and a first end surface and a second end surface opposite to each other in a length direction (seen in fig. 5), and a plurality of dielectric layers (42 & 43 – fig. 3 & 5; [0036]) and a plurality of internal electrode layers (52 & 53 – fig. 3 & 5; [0036]) laminated in the thickness direction; wherein
each of the plurality of internal electrode layers includes an opposing portion opposed to an adjacent internal electrode layer of the plurality of internal electrode layers in the thickness direction (seen in fig. 5 & 7), and a lead-out portion (52a & 53a – fig. 3; [0036]) connected to the opposing portion and extending to the first end surface or the second end surface;
a width of the opposing portion is larger than a width of the lead-out portion in the width direction (fig. 3; [0037]);
the element body portion includes a first region, a second region, and a third region in an order from an inside in the width direction to an outside in the width direction in each of a region from an end portion on one side of the lead-out portion located on the one side in the width direction to the first side surface and a region from an end portion on another side of the lead-out portion located on the another side in the width direction to the second side surface (fig. 5-6 & 12); and
when a grain size of a plurality of dielectrics included in the first region is defined as gr1, a grain size of a plurality of dielectrics included in the second region is defined as gr2, and a grain size of a plurality of dielectrics included in the third region is defined as gr3. Kim ‘848 fails to disclose the internal electrode layers including Ni and a relationship of gr1 < gr2 < gr3 is satisfied.
Iwasaki discloses forming a step compensating layer (11) on the areas of the dielectric layer (5) adjacent to the internal electrodes (7) that included Ni ([0022]) wherein the grain size of a plurality of dielectrics in said step compensating layer are 100 nm (fig. 1-3; [0059], [0069], & table 1 – sample 3).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form a step compensating layer as taught by Iwasaki with the capacitor of Kim ‘848 to obtain a capacitor wherein steps caused by the thickness of the internal electrode are eliminated thus reducing thickness variation and strain and to further use Ni as taught by Iwasaki as the internal electrode material of Kim ‘848 to obtain electrodes with good conductivity and based on the materials available. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Inomata ‘554 discloses forming the side margin portion to have two regions wherein the region formed adjacent to the stack has a first grain size (Da) of a plurality of dielectrics that is 149 nm and the region formed furthest from the stack has a second grain size (Db) of a plurality of dielectrics that is 301 nm (fig. 3-4; [0009] & table 1).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the side margin of Kim ‘848 as modified by Iwasaki to have regions with particle sizes as taught by Inomata ‘554 thus obtaining a relationship of gr1 (size of step compensating layer =100 nm) < gr2 (Da=149nm) < gr3 (Db=301 nm) is satisfied to obtain a capacitor wherein cracking of the side margin is suppressed.
In regards to claim 4,
Kim ‘848 as modified by Iwasaki and Inomata ‘554 further discloses wherein each of a region from an end portion on one side of the opposing portion located on the one side in the width direction to the first side surface and a region from an end portion on another side of the opposing portion located on the another side in the width direction to the second side surface is defined by the second region and the third region (fig. 3 & 5 of Kim ‘848 & fig. 4 of Inomata ‘554).
In regards to claim 5,
Kim ‘848 as modified by Iwasaki and Inomata ‘554 further discloses wherein the element body portion has a rectangular or substantially rectangular parallelepiped shape (fig. 5 & 12 of Kim ‘848).
In regards to claim 6,
Kim ‘848 as modified by Iwasaki and Inomata ‘554 further discloses wherein each of the plurality of dielectric layers includes a perovskite compound including Ba and Ti as a primary component ([0031-0032] of Inomata ‘554).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form dielectric of Kim ‘848 using a material as taught by Inomata ‘554 to obtain a capacitor with a desired capacitance. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
In regards to claim 7,
Kim ‘848 as modified by Iwasaki and Inomata ‘554 further discloses wherein each of the plurality of dielectric layers further includes at least one of Si, Mg, Mn, V, Cr, or rare earth elements as an additive ([0031-0032] of Inomata ‘554).
In regards to claim 9,
Kim ‘848 as modified by Iwasaki and Inomata ‘554 further discloses wherein the multilayer ceramic capacitor has a dimension in the length direction of greater than or equal to about 0.2 mm and less than or equal to about 4.5 mm, a dimension in the width direction of greater than or equal to about 0.125 mm and less than or equal to about 3.2 mm, and a dimension in the thickness direction of greater than or equal to about 0.125 mm and less than or equal to about 2.5 mm ([0019] of Inomata ‘554).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form capacitor of Kim ‘848 to have dimensions as taught by Inomata ‘554 to obtain a capacitor with a desired size for its intended use. Furthermore, a change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim ‘848 as modified by Iwasaki and Inomata ‘554 as applied to claim 1 above, and further in view of Yamaguchi et al. (US 2015/0155098).
In regards to claim 8,
Kim ‘848 as modified by Iwasaki and Inomata ‘554 fails to disclose wherein each of the plurality of internal electrode layers includes Sn at an interface with a dielectric layer of the plurality of dielectric layers.
Yamaguchi ‘098 discloses wherein each of the plurality of internal electrode layers includes Sn at an interface with a dielectric layer of the plurality of dielectric layers (abstract).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the internal electrode of Kim ‘848 as modified by Iwasaki and Inomata ‘554 to have Sn at an interface as taught by Yamaguchi ‘098 to obtain a capacitor that has excellent high-temperature load life.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim ‘848 as modified by Iwasaki and Inomata ‘554 as applied to claim 1 above, and further in view of Tanaka (US 2021/0166874).
In regards to claim 10,
Kim ‘848 as modified by Iwasaki and Inomata ‘554 fails to disclose wherein a portion of the plurality of internal electrode layers bulges toward one of the first and second principal surfaces.
Tanaka ‘874 discloses wherein a portion of the plurality of internal electrode layers bulges toward one of the first and second principal surfaces (fig. 2 & 4; [0035]).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the internal electrode of Kim ‘848 as modified by Iwasaki and Inomata ‘554 to have a bulged portion as taught by Tanaka ‘874to obtain a capacitor with improved adhesive strength between the internal electrode and dielectric reducing the potential of delamination.
Claim(s) 12-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim ‘848 as modified by Iwasaki and Inomata ‘554 as applied to claim 1 above, and further in view of Nishisaka et al. (US 2018/0096791).
In regards to claim 12,
Kim ‘848 as modified by Iwasaki and Inomata ‘554 fails to disclose wherein each of the pair of external electrode layers includes a Cu layer on the element body portion, a Ni plating layer on the Cu layer, and a Sn plating layer on the Ni plating layer.
Nishisaka ‘791 discloses wherein each of the pair of external electrode layers includes a Cu layer (141a/143a & 141b/143b – fig. 2; [0048] & [0056]) on the element body portion, a Ni plating layer on the Cu layer, and a Sn plating layer on the Ni plating layer (144a/144b – fig. 2; [0066]).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the external electrode of Kim ‘848 as modified by Iwasaki and Inomata ‘554 as taught by Nishisaka ‘791 to obtain a capacitor wherein the external electrode with a reduced thickness while maintaining good moisture resistance.
In regards to claim 13,
Kim ‘848 as modified by Iwasaki, Inomata ‘554, and Nishisaka ‘791 further discloses wherein the Cu layer includes a first layer portion (141a/141b of Nishisaka ‘791 ) and a second layer portion (143a/143b of Nishisaka ‘791 ) on the first layer portion.
In regards to claim 14,
Kim ‘848 as modified by Iwasaki, Inomata ‘554, and Nishisaka ‘791 further discloses wherein the first layer portion is a Cu-rich layer including a higher Cu content than the second layer portion ([0048-0049], [0096], & table 1 of Nishisaka ‘791).
In regards to claim 15,
Kim ‘848 as modified by Iwasaki, Inomata ‘554, and Nishisaka ‘791 further discloses wherein the second layer portion is a glass-rich portion including a higher glass content than the first layer portion ([0048-0049], [0096], & table 1 of Nishisaka ‘791).
In regards to claim 16,
Kim ‘848 as modified by Iwasaki, Inomata ‘554, and Nishisaka ‘791 further discloses wherein a thickness of the first layer portion is about 25% or less of a total thickness of the Cu layer ([0052-0053] & [0057]) of Nishisaka ‘791).
In regards to claim 17,
Kim ‘848 as modified by Iwasaki, Inomata ‘554, and Nishisaka ‘791 further discloses wherein a thickness of the first layer portion is about 5% or less of a total thickness of the Cu layer ([0052-0053] & [0057]) of Nishisaka ‘791).
Allowable Subject Matter
Claim(s) 2-3 & 11 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not teach or suggest (in combination with the other claim limitations) wherein the end portions on the one side of the lead-out portion adjacent to each other in the thickness direction are deviated from each other by a distance greater than or equal to about 3 µm in the width direction (claim 2), wherein voids among grains of the plurality of dielectrics included in the second region and voids among grains of the plurality of dielectrics included in the third region are less than voids among grains of the plurality of dielectrics included in the first region (claim 3), and wherein the portion of the plurality of internal electrode layers includes about 20% or less of a total number of the plurality of internal electrode layers (claim 11).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2014/0022692 – fig. 3 US 2022/0122769 – fig. 3
US 2022/0139625 – fig. 4 US 2024/0203661 – fig. 6
US 2024/0177935 – fig. 2A
Communication
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID M SINCLAIR whose telephone number is (571)270-5068. The examiner can normally be reached M-TH from 8AM-4PM.
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/David M Sinclair/Primary Examiner, Art Unit 2848