Prosecution Insights
Last updated: April 19, 2026
Application No. 18/754,390

Method and Apparatus for Bypass and Shutdown of a Power Device

Non-Final OA §103
Filed
Jun 26, 2024
Examiner
ROSARIO BENITEZ, GUSTAVO A
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Solaredge Technologies Ltd.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
597 granted / 733 resolved
+13.4% vs TC avg
Strong +25% interview lift
Without
With
+25.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
39 currently pending
Career history
772
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
49.3%
+9.3% vs TC avg
§102
28.1%
-11.9% vs TC avg
§112
21.0%
-19.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 733 resolved cases

Office Action

§103
DETAILED ACTION This office action is in response to the application filed on 06/26/2024. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 06/26/2024 has been considered by the examiner. Claim Interpretation In re to claims 12-19, method claims 12-19 are rejected based on the following case law, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device inherently performs the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed Cir. 1986). Therefore, the previous rejections based on the apparatus will not be repeated. Claim Objections Claim 12 is objected to because of the following informalities: Claim 12 before the last line “an input voltage” this should be “the input voltage”. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 6-8 and 12-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adest et al. US 2011/0273016 in view of Suzuki et al. US 2021/0016671. Regarding Claims 1 and 12, Adest teaches (Figures 7-8) An apparatus (Fig. 7) comprising: a power converter (705) configured to operate in a plurality of modes of operation (modes of operation), the plurality of modes of operation comprises: a power tracking mode of operation (buck and boost, par. 79), and a temperature derating mode of operation (temperature MPP Fig. 8 with adjust or derate the input power), wherein the power tracking mode of operation is one of a plurality of power tracking modes of operation comprising: a buck mode of operation, and a boost mode of operation (par. 79); wherein the temperature derating mode of operation is one of a plurality of temperature derating modes of operation comprising: a decrease input voltage mode (derating option) of operation, and an increase input voltage mode of operation (adjusting option); a sensor (one of 703-704, sensors at the output of temperature sensor 779) configured to obtain a parameter related to a temperature of the power converter (sensed signal from the sensor); a controller (790) configured to: obtain the parameter from the sensor (see fig. 7); determine that the temperature is greater than a temperature threshold based on the parameter (loop with 809, 811 and 805); determine a present power tracking mode of operation of the power converter from the plurality of power tracking modes of operation (controlling the converter in one of the modes of operation); control the power converter to change from the present power tracking mode of operation to the temperature derating mode of operation based on the determination that the temperature is greater than the temperature threshold (loop with 809, 811 and 805). (For example: Par. 75-77 , 79-89 and 98) Adest does not teach wherein: if the determined present power tracking mode of operation is the buck mode of operation, control the power converter to operate in the decrease input voltage mode of operation of the plurality of temperature derating modes of operation, if the determined present power tracking mode of operation is the boost mode of operation, control the power converter to operate in the increase input voltage mode of operation of the plurality of temperature derating modes of operation. Suzuki teaches (Figures 1-2 and 5) wherein: if the determined present power tracking mode of operation is the buck mode of operation (buck mode, with Figures 2 and par. 49-52), control the power converter to operate in the decrease input voltage mode of operation of the plurality of temperature derating modes of operation(fig. 2 moving from regular range to first limitation range), if the determined present power tracking mode of operation is the boost mode of operation(boost mode, with fig. 2 and par. 75-82), control the power converter to operate in the increase input voltage mode of operation of the plurality of temperature derating modes of operation(while in boost fig. 2 moving from regular range to second limitations range). (For example: Par. 49-52 and 75-82) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Adest to include wherein: if the determined present power tracking mode of operation is the buck mode of operation, control the power converter to operate in the decrease input voltage mode of operation of the plurality of temperature derating modes of operation, if the determined present power tracking mode of operation is the boost mode of operation, control the power converter to operate in the increase input voltage mode of operation of the plurality of temperature derating modes of operation, as taught by Suzuki to improve reliability by the availability of different voltage and power to be supplies to the load. Regarding Claims 2 and 13, Adest teaches (Figures 7-8) the input of the power converter is produced by a photovoltaic power source (701). (For example: Par. 75-77 , 79-89 and 98) Regarding Claims 5 and 14, Adest teaches (Figures 7-8) an apparatus. Adest does not teach wherein the power converter is further configured to reduce a frequency of the power converter to reduce a temperature of the power converter. Suzuki teaches (Figures 1-2 and 5) wherein the power converter is further configured to reduce a frequency of the power converter (6 and par. 70) to reduce a temperature of the power converter (see fig. 2 and 5). (For example: Par. 43-48 and 70-72) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Adest to include wherein the power converter is further configured to reduce a frequency of the power converter to reduce a temperature of the power converter, as taught by Suzuki to improve the protection function for the converter. Regarding Claims 6 and 15, Adest teaches (Figures 7-8) wherein the power tracking mode of operation is a maximum power point tracking mode of operation (719, fig. 7). Regarding Claims 7 and 16, Adest teaches (Figures 7-8) wherein if the power converter is to operate in the power tracking mode of operation (e.g. buck and boost modes), the controller controls the power converter to operate at a maximum power point (719). (For example: Par. 74, 80 and 91) Regarding Claims 8 and 17, Adest teaches (Figures 7-8)wherein if the power converter is to operate in the temperature derating mode of operation (temperature MPP, as shown in fig. 8), the controller controls the power converter to operate at an operating point that is not the maximum power point (due to the change in temperature). (For example: Par. 74, 80, 91 and 98) Claim(s) 3-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adest et al. US 2011/0273016 in view of Suzuki et al. US 2021/0016671 and further in view of Manabe et al. US 2014/0145697. Regarding Claims 3-4, Adest teaches (Figures 7-8) an apparatus. Adest does not teach wherein the at least one parameter is related to a temperature of at least one switch of the power converter and, wherein the at least one parameter is related to a temperature of an inductor of the power converter. Manabe (Fig. 1) teaches wherein the at least one parameter is related to a temperature of at least one switch of the power converter (at 33 or 34, see par. 43) and, wherein the at least one parameter is related to a temperature (35) of an inductor of the power converter (par. 38). It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Adest to include wherein the at least one parameter is related to a temperature of at least one switch of the power converter and, wherein the at least one parameter is related to a temperature of an inductor of the power converter, as taught by Manabe to improve the quality of the sensed signal. Claim(s) 9 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adest et al. US 2011/0273016 in view of Suzuki et al. US 2021/0016671 and further in view of Zhang et al. US 2009/0284078. Regarding Claims 9 and 18, Adest teaches (Figures 7-8) an apparatus. Adest does not teach wherein if the power converter is to operate in the temperature derating mode of operation, the controller controls the power converter to operate at an operating point that is less than the maximum power point. Zhang teaches (Figures 3-4) wherein if the power converter (at fig. 3) is to operate in the temperature derating mode of operation (high temperature operation), the controller (208) controls the power converter to operate at an operating point that is less than the maximum power point (Mstart operation, par. 94 and 97-98). It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Adest to include wherein if the power converter is to operate in the temperature derating mode of operation, the controller controls the power converter to operate at an operating point that is less than the maximum power point, as taught by Zhang to improve the protection operation of the system. Claim(s) 10 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adest et al. US 2011/0273016 in view of Suzuki et al. US 2021/0016671 and further in view of Galin et al. US 2018/0351354. Regarding Claims 10 and 19, Adest teaches (Figures 7-8) wherein the apparatus further comprises a second sensor (at 741-742) configured to obtain a second parameter indicating an output current of the power converter. (For example: Par. 75-77 , 79-89 and 98) Adest does not teach the power converter is further configured to operate in a power conversion mode of operation and a bypass mode of operation; and the controller is further configured to: obtain the second parameter from the second sensor; determine when a temperature related to the power converter is above a temperature threshold and the output current is above a current threshold; and when the temperature is above the temperature threshold and the output current is above the current threshold, operate the power converter in the bypass mode of operation. Galin teaches (Figures 4) the power converter is further configured to operate in a power conversion mode of operation and a bypass mode of operation (normal operation and bypass mode); and the controller (for the converter) is further configured to: obtain the second parameter from the second sensor; determine when a temperature related to the power converter is above a temperature threshold and the output current is above a current threshold (par. 126); and when the temperature is above the temperature threshold and the output current is above the current threshold (the sensor can evaluate the current and the temperature), operate the power converter in the bypass mode of operation (417). (For example: Par. 74, 104, 109 and 126-132) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Adest to include the power converter is further configured to operate in a power conversion mode of operation and a bypass mode of operation; and the controller is further configured to: obtain the second parameter from the second sensor; determine when a temperature related to the power converter is above a temperature threshold and the output current is above a current threshold; and when the temperature is above the temperature threshold and the output current is above the current threshold, operate the power converter in the bypass mode of operation, as taught by Galin to improve the protection function for the system. Allowable Subject Matter Claims 11 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Reasons for Indicating Allowable Subject Matter The following is an examiner’s statement of reasons for indicating Allowable Subject Matter: Claims 11 and 20; prior art of record fails to disclose either by itself or in combination: “…wherein: the power converter is further configured to operate in a plurality of shutdown modes of operation and a plurality of wakeup modes of operation; and the controller is further configured to: determine a last used shutdown mode of operation of the plurality of shutdown modes of operation, wherein the last used shutdown mode of operation was last used to set the power converter in a shutdown mode of operation; based on the last used shutdown mode of operation, determine a wakeup mode of operation of the plurality of wakeup modes of operation; and set the power converter in the wakeup mode of operation.” These features taken alone or in combination are neither disclosed nor suggested by the prior art of record. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUSTAVO A ROSARIO-BENITEZ whose telephone number is (571)270-7888. The examiner can normally be reached M-F 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at 5712721838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GUSTAVO A ROSARIO-BENITEZ/Primary Examiner, Art Unit 2838
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Prosecution Timeline

Jun 26, 2024
Application Filed
Feb 20, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+25.3%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 733 resolved cases by this examiner. Grant probability derived from career allow rate.

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