DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 4-6, and 8-9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nishimura et al. (JP H09205179A).
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Regarding claim 1, Nishimura et al. disclose in Fig. 1, a thin film capacitor comprising:
a first electrode layer (not illustrated in fig. 1 – see 29, 39, 59 – [0034] – MIM capacitor);
a second electrode layer (131, 141); and
a dielectric layer (18) provided between the first electrode layer (29, 39, 59, [0034]) and the second electrode (131, 141) layer,
wherein
the thin film capacitor comprises an intermediate layer (132-134, 141-144) between the dielectric layer (18) and the second electrode layer (131, 141),
the intermediate layer (132-134, 141-144) comprises at least one stacking unit including a first intermediate layer (144) and a second intermediate layer (134) stacked in contact with the first intermediate layer,
the first intermediate layer (144) of the at least one stacking unit closest to the dielectric layer (18) is stacked in direct contact with the dielectric layer (18),
the first intermediate layer (144) comprises a first metal (M1 – Pt) as a main component, and the second intermediate (134) layer comprises a second metal (M2 - Ti), different from the first metal, as a main component, and
the first intermediate layer (144) has a thickness of 8 to 80 nm (50 nm - [0016]).
Regarding claim 2, Nishimura et al. disclose the second intermediate layer (134) has a thickness of 8 to 80 nm (20 nm – [0016]).
Regarding claim 4, Nishimura et al. disclose the at least one stacking unit (132-134, 142-144) comprises stacking units repeatedly stacked in a range of 2 to 10 in the
intermediate layer (132, 142; 133,143; 134,144).
Regarding claim 5, Nishimura et al. disclose a ratio (t2/t1) of a thickness (t2 – 20 nm – [0016]) of the second intermediate layer to a thickness (t1 – 50 nm – [0016]) of the first intermediate layer is 0.2 to 1.0 (0.4).
Regarding claim 6, Nishimura et al. disclose a thin film capacitor comprising:
a first electrode layer (not illustrated in fig. 1 – see 29, 39, 59 – [0034] – MIM capacitor);
a second electrode layer (131, 141); and
a dielectric layer (18) provided between the first electrode layer (29, 39, 59 – [0034]) and the second electrode layer (131, 141), wherein
the thin film capacitor comprises an intermediate layer (132-134; 142-144) between the dielectric layer (8) and the second electrode layer (131, 141),
the intermediate layer comprises at least one stacking unit including a first
intermediate layer (141) and a second intermediate layer (131) stacked in contact with the first intermediate layer (141),
the first intermediate layer (141) of the at least one stacking unit closest to the dielectric layer (8) is stacked in direct contact with the dielectric layer (8),
the first intermediate layer (141) comprises a second metal (M2 - Pt) as a main component,
the second intermediate layer (142) comprises a first metal (M1 - Ti), different from the second metal, as a main component,
the first intermediate layer (141) has a thickness of 8 to 80 nm [0016], and
the second intermediate layer (142) has a thickness of 8 to 80 nm [0016].
Regarding claim 8, Nishimura et al. disclose a substrate (Fig. 1) comprising the thin film capacitor according to claim 1.
Regarding claim 9, Nishimura et al. disclose an electronic device [0001] comprising the thin film capacitor (Fig. 1) according to claim 1.
Claim(s) 1, and 3-4 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liles et al. (US 2008/0239629 A1).
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Regarding claim 1, Liles et al. disclose in fig. 2, a thin film capacitor comprising:
a first electrode layer (21, 22);
a second electrode layer (64); and
a dielectric layer (40) provided between the first electrode layer (21, 22) and the second electrode layer (64),
wherein the thin film capacitor comprises an intermediate layer (26, 30, 32, 36, 38) between the dielectric layer (40) and the second electrode layer (64),
the intermediate layer (26, 30, 32, 36, 38) comprises at least one stacking unit including a first intermediate layer (38) and a second intermediate layer (36) stacked in contact with the first intermediate layer (38),
the first intermediate layer (38) of the at least one stacking unit closest to the dielectric layer (40) is stacked in direct contact with the dielectric layer (40),
the first intermediate layer (38) comprises a first metal (M1 – Ti) as a main component, and
the second intermediate layer (36) comprises a second metal (M2 - Au), different from the first metal (Ti), as a main component, and
the first intermediate layer (38) has a thickness of 8 to 80 nm (50 nm).
Regarding claim 3, Liles et al. disclose the first metal (M1) comprises at least one selected from a group consisting of Cu, Cr, Au, Ru, Rh, Ir, Mo, Ti (Ti – Fig. 2), and W, and
the second metal (M2) comprises at least one selected from a group consisting of Ni, Pd, Pt, Au (Au – Fig. 2), Ru, Rh, and Ir.
Regarding claim 4, Liles et al. disclose the at least one stacking unit comprises stacking units repeatedly stacked in a range of 2 to 10 in the intermediate layer (see Fig. 2).
Claim(s) 7 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Nishimura et al. (JP H09205179A).
Regarding claim 7, Nishimura et al. disclose the at least one stacking unit comprises stacking units repeatedly stacked in a range of 4 to 10 in the intermediate layer (“at least two” - see claim 2).
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC THOMAS whose telephone number is (571)272-1985. The examiner can normally be reached Monday-Friday, 6:00 AM-2:30 PM.
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/ERIC W THOMAS/Primary Examiner, Art Unit 2847
ERIC THOMAS
Primary Examiner
Art Unit 2847
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