Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
2. This office action is in response to communication filed on 06/27/2024. Claims 1-20 are pending on this application.
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 1, 7-9, 11, 16-17 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Michel Pub. No. 2023/0012330.
Regarding claim 1 Fig. 13A and Fig. 13B of Michel discloses a switched-capacitor circuit (1310), comprising: a first sampling capacitor array (16U…Cu), configured to sample a first input voltage (Vin) in a sampling phase (sample 1); a charge-transfer circuit (switching VDD current Source and Ground Current Source), comprising a first current source (VDD current source) and a second current source (Ground Current source) with different current-voltage characteristics (current voltage characteristic VDD ang Ground), wherein the first current source and the second current source (VDD current source and Ground current source) are coupled to a first output terminal (Sample2 terminal in Fig. 13B); and a control circuit (134) , configured to adjust a sampling result (Vn) of the first sampling capacitor array (16U…Cu) in a preset phase (sampling phase sample in of Vin) according to the first input voltage (Vin) to generate a first adjusted voltage (Vresidue), and configured to enable (E1, E2) one of the first current source (VDD current source) and the second current source (Ground current source) in a charge-transfer phase ((switching VDD current Source and Ground Current Source)) according to the first input voltage (Vin) , so that the charge-transfer circuit ((switching VDD current Source and Ground Current Source) amplifies the first adjusted voltage (Vresidue) in the charge-transfer phase (switching VDD current Source and Ground Current Source) in order to generate a first output voltage (Voltage of sample2 in Fig. 13B) at the first output terminal (Vsample2 terminal in Fig. 13B).
Regarding claim 7. The switched-capacitor circuit of claim 1, Fig. 13A and 13B of Michel further discloses wherein the control circuit (1340) comprises: an ADC (paragraph 0071) , configured to (see Fig. 11) compare the first input voltage (Vin in Fig. 11) with a plurality of voltage thresholds (0…FS) , so as to determine a first voltage range (FS) including the first input voltage (Vin in Fig. 11) from a plurality of voltage ranges (0…FS/2…FS in Fig. 11) , and configured to output a first digital code (comp1 in 1340) corresponding to the first voltage range (FS in Fig. 11), wherein the plurality of voltage ranges (0…FS/2…FS in Fig. 11) are identified by the plurality of voltage thresholds arranged in ascending order (ascending order 0…FS/2…FS); and a decoder (SAR controller 1340) , configured to determine each of the first current source (VDD current source) and the second current source (Ground Current source) is enabled or disabled ( E1, E2) according to the first digital code (comp1 in 1340) .
Regarding claim 8. The switched-capacitor circuit of claim 1, Fig. 11, Fig. 13A and Fig. 13B of Michel further discloses wherein when the first input voltage (Vin) is in an M-th voltage range (FS…FS/2) of a plurality of voltage ranges (ranges of voltage 0…FS/2…FS in Fig. 11), the control circuit (1340) enables the first current source (VDD current source), wherein M is a positive integer (positive of SAR ranges in Fig. 11); and when the first input voltage (Vin in Fig. 11) is in an (M+1)-th voltage range (FS/2…0 in Fig. 1) of the plurality of voltage ranges (ranges of voltage 0…FS/2…FS in Fig. 11), the control circuit (1340) enables the second current source (Ground current source) .
Regarding claim 9. The switched-capacitor circuit of claim 8, Fig. 11, Fig. 13A and Fig. 13B of Michel further discloses wherein when the first input voltage (Vin) is in the M-th voltage range (FS…FS/2), the first output voltage (Vsample2 in Fig. 13B) is smaller than a common voltage (Ground voltage of comparator Fig. 13B) ; and when the first input voltage (Vin) is in the (M+1)-th voltage range (FS/2…0 in Fig. 1), the first output voltage (Vsample2 in Fig. 13B) is larger than or equal to the common voltage (Ground voltage of comparator Fig. 13B).
Regarding claim 11. Fig. 13A and Fig. 13B of Michel discloses a switched-capacitor circuit (1310), comprising: a first sampling capacitor array (16Cu….Cu), configured to sample a first input voltage (Vin) in a sampling phase (sample1) ; a charge-transfer circuit (switching current sources) , comprising a first current source and a second current source (VDD current source, Ground current source) with different current-voltage characteristics (VDD and Ground voltage of current sources) , wherein the first current source and the second current source (VDD current source, Ground current source) are coupled to a first output terminal (Sample2 terminal in Fig. 13B) ; and a control circuit (1340) , configured to couple a first reference voltage (Vref) to a sample result (Vn) of the first sampling capacitor array in a preset phase (sample1 phase) to generate a first adjusted voltage (Vresidue) , and configured to determine, according to a relationship between a plurality of voltage thresholds (0…..FS in Fig. 11) and the first input voltage (Vin in Fig. 11) , magnitude of the first reference voltage (magnitude of Vref) and select (E1, E2) one of the first current source and the second current source (VDD current source, Ground current source) to be enabled in a charge-transfer phase (switching current sources), so that the charge-transfer circuit(switching current sources) amplifies the first adjusted voltage (Vresidue) in the charge-transfer phase ((switching current sources) in order to generate a first output voltage (sample2 voltage in Fig. 13B) at the first output terminal (sample2 terminal of Fig. 13B).
Regarding claim 16. The switched-capacitor circuit of claim 11, , Fig. 13A and 13B of Michel further discloses: wherein the control circuit (1340) is configured to compare the first input voltage (Vin) with a plurality of voltage thresholds (0…FS in Fig. 11), in a case of the plurality of voltage thresholds 0…FS in Fig. 11) being in ascending order (ascending order of 0….FS in Fig. 11) , when the first input voltage (Vin in Fig. 11) is adjacent to a J-th voltage threshold (FS/2 in Fig. 11) of the plurality of voltage thresholds (0…FS in Fig. 11), and is smaller than the J-th voltage threshold (FS/2 in Fig. 11) , the control (1340) circuit enables the first current source (VDD current source) , wherein J is an odd number (odd number of 0…FS) , in the case of the plurality of voltage thresholds (0…FS) being in the ascending order (0….FS in Fig. 11), when the first input voltage (Vin in Fig. 11) is adjacent to the J-th voltage threshold (FS/2) , and is larger than or equal to the J-th voltage threshold (FS/2), the control circuit (1340) enables the second current source (Ground current source).
Regarding claim 17. The switched-capacitor circuit of claim 16, Fig. 11, Fig. 13A and Fig. 13B of Michel further discloses wherein when the first input voltage (Vin in Fig. 11) is adjacent to the J-th voltage threshold (FS/2 in Fig. 11) , and is smaller than the J-th voltage threshold (Smaller than FS/2) , the first output voltage (Vsample2 in Fig. 13B) is smaller than a common voltage (Ground voltage of comparator Fig. 13B); when the first input voltage (Vin in Fgi. 11) is adjacent to the J-th voltage threshold (FS/2 in Fig. 11), and is larger than or equal to the J-th voltage threshold (FS/2 in Fig. 11), the first output voltage (Vsample2 in Fig. 13B) is larger than or equal to the common voltage (Ground voltage of comparator Fig. 13B).
Regarding claim 19. Fig. 6 of Michel A pipelined ADC , comprising a plurality of converter circuit systems (610, 620, 630), wherein each converter circuit (610, 620, 630) system comprises ( see Fig. 13A and Fig. 13B): a switched-capacitor circuit (1310), comprising: a first sampling capacitor array (16U…Cu), configured to sample a first input voltage (Vin) in a sampling phase (sample 1); a charge-transfer circuit (switching VDD current Source and Ground Current Source), comprising a first current source (VDD current source) and a second current source (Ground Current source) with different current-voltage characteristics (current voltage characteristic VDD ang Ground), wherein the first current source and the second current source (VDD current source and Ground current source) are coupled to a first output terminal (Sample2 terminal in Fig. 13B); and a control circuit (134) , configured to adjust a sampling result (Vn) of the first sampling capacitor array (16U…Cu) in a preset phase (sampling phase sample in of Vin) according to the first input voltage (Vin) to generate a first adjusted voltage (Vresidue), and configured to enable (E1, E2) one of the first current source (VDD current source) and the second current source (Ground current source) in a charge-transfer phase ((switching VDD current Source and Ground Current Source)) according to the first input voltage (Vin) , so that the charge-transfer circuit ((switching VDD current Source and Ground Current Source) amplifies the first adjusted voltage (Vresidue) in the charge-transfer phase (switching VDD current Source and Ground Current Source) in order to generate a first output voltage (Vsample2 in Fig. 13B) at the first output terminal (Vsample2 terminal in Fig. 13B).
Allowable Subject Matter
5. Claims 2-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Prior art does not teach: a second sampling capacitor array, configured to sample a second input voltage in the sampling phase, wherein the charge-transfer circuit further comprises a third current source and a fourth current source with different current-voltage characteristics, wherein the third current source and the fourth current source are coupled to a second output terminal, wherein the control circuit is further configured to adjust a sampling result of the second sampling capacitor array in the preset phase according to the second input voltage to generate a second adjusted voltage, and configured to enable the one of the first current source and the second current source and one of the third current source and the fourth current source in the charge-transfer phase according to a input voltage difference between the first input voltage and the second input voltage, so that the charge-transfer circuit amplifies the second adjusted voltage in the charge-transfer phase in order to generate a second output voltage at the second output terminal.
6. Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Prior art does not teach: wherein in the preset phase, the first output terminal is reset to a low voltage and a second output terminal is reset to a high voltage, wherein when applying a first voltage difference variation to the first current source operated in a first saturation region and the second current source operated in a second saturation region, an output current variation of the first current source is smaller than an output current variation of the second current source.
7. Claims 12-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Prior art does not teach: a second sampling capacitor array, configured to sample a second input voltage in the sampling phase, wherein the charge-transfer circuit further comprises a third current source and a fourth current source with different current-voltage characteristics, wherein the third current source and the fourth current source are coupled to a second output terminal, wherein the control circuit is further configured to couple a second reference voltage to a sampling result of the second sampling capacitor array in the preset phase to generate a second adjusted voltage, and configured to determine the first reference voltage and a second reference voltage, according to a comparing result between the plurality of voltage thresholds and an input voltage difference between the first input voltage and the second input voltage, wherein the control circuit is further configured to select, according to the comparing result, the one of the first current source and the second current source and one of the third current source and the fourth current source to be enabled in the charge-transfer phase, so that the charge-transfer circuit amplifies the second adjusted voltage in the charge-transfer phase in order to generate a second output voltage at the second output terminal.
8. Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Prior art does not teach: wherein in the preset phase, the first output terminal is reset to a low voltage and a second output terminal is reset to a high voltage, wherein when applying a first voltage difference variation to the first current source operated in a first saturation region and the second current source operated in a second saturation region, an output current variation of the first current source is smaller than an output current variation of the second current source.
9. Claim 20 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Prior art does not teach: wherein the converter circuit system further comprises: a second sampling capacitor array, configured to sample a second input voltage in the sampling phase, wherein the charge-transfer circuit further comprises a third current source and a fourth current source with different current-voltage characteristics, wherein the third current source and the fourth current source coupled are coupled to a second output terminal, wherein the control circuit is further configured to adjust a sampling result of the second sampling capacitor array in the preset phase according to the second input voltage to generate a second adjusted voltage, and configured to enable the one of the first current source and the second current source and one of the third current source and the fourth current source in the charge-transfer phase according to a input voltage difference between the first input voltage and the second input voltage, so that the charge-transfer circuit amplifies the second adjusted voltage in the charge-transfer phase, in order to generate a second output voltage at the second output terminal.
Contact Information
10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Linh Van Nguyen whose telephone number is (571) 272-1810. The examiner can normally be reached from 8:30 – 5:00 Monday-Friday.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mr. Dameon E. Levi can be reached at (571) 272-2105. The fax phone numbers for the organization where this application or proceeding is assigned are (571-273-8300) for regular communications and (571-273-8300) for After Final communications.
01/01/2026
/LINH V NGUYEN/Primary Examiner, Art Unit 2845