DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Email Communication
Applicant is encouraged to authorize the Examiner to communicate with applicant via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502.03, 502.05.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-2, 4-5, & 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mizuno (US 2022/0285100) in view of Yun et al. (US 2022/0122769).
In regards to claim 1,
Mizuno ‘510 discloses a multilayer ceramic capacitor comprising:
an element body (11 – fig. 1-3; [0044]) portion including a first principal surface and a second principal surface opposite to each other in a thickness direction, a first side surface and a second side surface opposite to each other in a width direction, a first end surface and a second end surface opposite to each other in a length direction (fig. 1-3; [0044]), and a plurality of dielectric layers (20 – fig. 2-3; [0050]) and a plurality of internal electrode layers (12-13 – fig. 2-3; [0050]) laminated in the thickness direction; and
external electrodes (14-15 – fig. 1-2; [0044]) respectively on the first end surface and the second end surface, and electrically connected to the plurality of internal electrode layers (fig. 2; [0051]); wherein
each of the plurality of internal electrode layers includes an opposing portion opposed to the internal electrode layer which is adjacent in the thickness direction, and a lead-out portion connecting the opposing portion and the external electrodes (fig. 2-3);
the plurality of dielectric layers include outer dielectric layers (39a & 39b – fig. 8; [0127]) and inner dielectric layers (20 – fig. 8), the outer dielectric layers being located between the first principal surface and the internal electrode layer located closest to the first principal surface in the thickness direction and between the second principal surface and the internal electrode layer located closest to the second principal surface in the thickness direction, and the inner dielectric layers being located between the internal electrode layers adjacent to each other in the thickness direction (fig. 8); and
in the element body portion, side margin portions (17a & 17b – fig. 8; [0125]), which are located in the width direction between the first side surface and the plurality of internal electrode layers and between the second side surface and the plurality of internal electrode layers (fig. 8), have a higher Mn content than the inner dielectric layers ([0071]). Mizuno ‘510 fails to disclose a width of the opposing portion is larger than a width of the lead-out portion in the width direction.
Yun ‘769 discloses a width of the opposing portion is larger than a width of the lead-out portion in the width direction (fig. 3 & 10; [0056]).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the lead of Mizuno ‘510 to have a smaller width than the opposing portion as taught Yun ‘769 to obtain a capacitor with which is able to have good volume efficiency and reliability form external influences such as plating penetration.
In regards to claim 2,
Mizuno ‘510 as modified by Yun ‘769 further discloses wherein the outer dielectric layers have a higher Mn content than the inner dielectric layers (fig. 8; [0130] of Mizuno ‘510).
In regards to claim 4,
Mizuno ‘510 as modified by Yun ‘769 further discloses wherein the side margins are made of a dielectric material including a perovskite compound including Ba and Ti ([0054] & [0062] of Mizuno ‘510).
In regards to claim 5,
Mizuno ‘510 as modified by Yun ‘769 further discloses wherein the side margins are each defined by a plurality of layers (fig. 7; [0088] of Mizuno ‘510).
In regards to claim 7,
Mizuno ‘510 as modified by Yun ‘769 further discloses wherein a cross section of the element body portion parallel or substantially parallel to the thickness direction and the width direction has a parallelogram or substantially parallelogram shape (fig. 1-3 of Mizuno ‘510).
In regards to claim 8,
Mizuno ‘510 as modified by Yun ‘769 further discloses wherein corners of the parallelogram or substantially parallelogram shape are rounded ([0044] of Mizuno ‘510).
Claim(s) 1, 3-5, & 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kurosu et al. (US 2021/0202177) in view of Kim et al. (US 2006/0139848).
In regards to claim 1,
Kurosu ‘177 discloses a multilayer ceramic capacitor comprising:
an element body portion (10 – fig. 1; [0051]) including a first principal surface (11 – fig. 1; [0051]) and a second principal surface (12 – fig. 1; [0051]) opposite to each other in a thickness direction, a first side surface (14 – fig. 1; [0051]) and a second side surface opposite (13 – fig. 1; [0051]) to each other in a width direction, a first end surface (15 – fig. 1; [0051]) and a second end surface (16 – fig. 1; [0051]) opposite to each other in a length direction, and a plurality of dielectric layers (20 – fig. 3; [0049]) and a plurality of internal electrode layers (21-22 – fig. 3; [0049]) laminated in the thickness direction; and
external electrodes (51-52 – fig. 1-3; [0050]) respectively on the first end surface and the second end surface, and electrically connected to the plurality of internal electrode layers; wherein
each of the plurality of internal electrode layers includes an opposing portion opposed to the internal electrode layer which is adjacent in the thickness direction, and a lead-out portion connecting the opposing portion and the external electrodes (seen in fig. 3 & 5);
the plurality of dielectric layers include outer dielectric layers and inner dielectric layers, the outer dielectric layers being located between the first principal surface and the internal electrode layer located closest to the first principal surface in the thickness direction and between the second principal surface and the internal electrode layer located closest to the second principal surface in the thickness direction, and the inner dielectric layers being located between the internal electrode layers adjacent to each other in the thickness direction (seen in fig. 2-4); and
in the element body portion, side margin portions (41 & 42 – fig. 2 & 4; [0067]), which are located in the width direction between the first side surface and the plurality of internal electrode layers and between the second side surface and the plurality of internal electrode layers, have a higher Mn content than the inner dielectric layers ([0084]). Kurosu ‘177 fails to disclose a width of the opposing portion is larger than a width of the lead-out portion in the width direction.
Kim ‘848 discloses a width of the opposing portion is larger than a width of the lead-out portion in the width direction (fig. 3; [0056]).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the lead of Kurosu ‘177 to have a smaller width than the opposing portion as taught by Kim ‘848 to obtain a capacitor with improved short circuit protection and improved thickness uniformity.
In regards to claim 3,
Kurosu ‘177 as modified by Kim ‘848 further discloses wherein at least one of Si and Mg is segregated in both end portions of the lead-out portion in the width direction ([0231-0233] of Kurosu ‘177).
In regards to claim 4,
Kurosu ‘177 as modified by Kim ‘848 further discloses wherein the side margins are made of a dielectric material including a perovskite compound including Ba and Ti ([0071] of Kurosu ‘177).
In regards to claim 5,
Kurosu ‘177 as modified by Kim ‘848 further discloses wherein the side margins are each defined by a plurality of layers (41a/41b & 42a/42b – fig. 2 & 4; [0069] of Kurosu ‘177).
In regards to claim 7,
Kurosu ‘177 as modified by Kim ‘848 further discloses wherein a cross section of the element body portion parallel or substantially parallel to the thickness direction and the width direction has a parallelogram or substantially parallelogram shape (fig. 1-3; [0051] of Kurosu ‘177).
In regards to claim 8,
Kurosu ‘177 as modified by Kim ‘848 further discloses wherein corners of the parallelogram or substantially parallelogram shape are rounded ([0053] of Kurosu ‘177).
Claim(s) 6 & 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mizuno ‘510 as modified by Yun ‘769 as applied to claim 1 above, and further in view of JP2004111489A hereafter referred to as Fujii.
In regards to claim 6,
Mizuno ‘510 as modified by Yun ‘769 fails to disclose wherein a portion of the plurality of internal electrode layers is curved toward first principal surface.
Fujii discloses wherein a portion of the plurality of internal electrode layers is curved toward first principal surface (fig. 3).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the body of Mizuno ‘510 as modified by Yun ‘769 with a pressing process as taught by Fujii thus obtaining a curved internal electrode to obtain a capacitor with reduced electric field concentration and high dielectric strength.
In regards to claim 10,
Mizuno ‘510 as modified by Yun ‘769 fails to disclose wherein a thickness of the element body portion gradually increases outward from a center portion of the element body portion to an outer portion of the element body portion in the thickness direction.
Fujii discloses wherein a thickness of the element body portion gradually increases outward from a center portion of the element body portion to an outer portion of the element body portion in the thickness direction (fig. 3).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the body of Mizuno ‘510 as modified by Yun ‘769 with a pressing process as taught by Fujii thus obtaining a thickness of the element body portion gradually increases outward from a center portion of the element body portion to an outer portion of the element body portion in the thickness direction to obtain a capacitor with reduced electric field concentration and high dielectric strength.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mizuno ‘510 as modified by Yun ‘769 as applied to claim 1 above, and further in view of KR20170024870A hereafter referred to as Kim.
In regards to claim 9,
Mizuno ‘510 as modified by Yun ‘769 fails to disclose wherein, in a cross section of the element body portion parallel or substantially parallel to the thickness direction and the width direction, each of the first side surface and the second side surface has a shape that is recessed inward in the width direction toward a central portion in thickness direction.
Kim discloses wherein, in a cross section of the element body portion parallel or substantially parallel to the thickness direction and the width direction, each of the first side surface and the second side surface has a shape that is recessed inward in the width direction toward a central portion in thickness direction (fig. 3-4).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the side surfaces of Mizuno ‘510 as modified by Yun ‘769 to have a shape as taught by Kim to obtain a capacitor with improved moisture resistance.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2022/0093331A – fig. 2 US 2019/0180936 – [0086]
US 2020/0294720 – [0109] US 6,829,134 – fig. 4
US 10,622,155 – fig. 1-4 US 2020136589A – fig. 3
JP09260192A – fig. 1
Communication
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID M SINCLAIR whose telephone number is (571)270-5068. The examiner can normally be reached M-TH from 8AM-4PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/David M Sinclair/Primary Examiner, Art Unit 2848