Prosecution Insights
Last updated: October 04, 2026
Application No. 18/756,287

SYSTEMS AND METHODS FOR DETERMINING AND QUANTIFYING IMAGE DATA

Final Rejection §103
Filed
Jun 27, 2024
Priority
Jul 07, 2023 — provisional 63/512,532 +1 more
Examiner
LI, RUIPING
Art Unit
2676
Tech Center
2600 — Communications
Assignee
Gauss Labs Inc.
OA Round
2 (Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
5m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
740 granted / 963 resolved
+14.8% vs TC avg
Strong +18% interview lift
Without
With
+18.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
28 currently pending
Career history
982
Total Applications
across all art units

Statute-Specific Performance

§101
10.8%
-29.2% vs TC avg
§103
44.7%
+4.7% vs TC avg
§102
25.3%
-14.7% vs TC avg
§112
15.8%
-24.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 963 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . 2. This is in response to the applicant response filed on 08/20/2026. In the applicant’s response, claim 54 was amended; claims 68-70 were cancelled; and claim 74 was newly added. Accordingly, claims 54-67, and 71-74 are pending and being examined. Claim 54 is the sole independent form. Claim Rejections - 35 USC § 103 3. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 5. Claims 54-67, and 71-74 are rejected under 35 U.S.C. 103 as being unpatentable over Majumdar et al (US2020/0051235, hereinafter “Majumdar”) in view of Vered et al (US 20240046445, hereinafter “Vered”). Regarding claim 54, Majumdar discloses a metrology platform (the prediction system of predicting virtual metrology data for a wafer lot; see fig.1 and abstract) comprising: a customizable or user-configurable pipeline that is configured to enable a user to automatically and longitudinally obtain a plurality of metrology metrics associated with a set of metrology images from a process environment (see fig.1, which comprises user 111, user device 110, metrology equipment 104, and imager system 106 which may provide image data to the prediction system 102; see para.35: “a user 111 can interface with the user device 110, for example, to utilize the prediction system 102 [which may receive image data from imager system 106] to generate virtual metrology data and/or virtual cell metrics data”; see “longitudinally obtain a plurality of metrology metrics” shown by fig.3b); an analysis module configured to recommend a subset of metrics from the plurality of metrology metrics to the user by analyzing a distribution or a correlation with yield from the plurality of metrology metrics (as one comparison, shown by FIG. 3A-3B and described in para.61, wherein the variability chart for metrology data provides a distribution of predicated data points/values: “more data points leads to better processing, better predictions of die performance, better dead die detection, etc.”; as another comparison, shown by FIG. 4A-4B and described in para.62, wherein the contour plot for metrology data “provides a significantly more defined contour plot in comparison the measured metrology data.”.), wherein the distribution or the correlation is analyzed (i) within a single domain within the process environment (It should be noticed that each of the variability chart and contour plot is a metrology metric); and a graphical user interface (GUI) for implementing the pipeline, wherein the GUI comprises (1) a plurality of graphical functions configured to permit the user to interact with or to customize the pipeline (see para.35: “a user 111 can interface with the user device 110, for example, to utilize the prediction system 102 to generate virtual metrology data and/or virtual cell metrics data”;) displaying the variability chart of metrology data as shown by fig.3B; displaying the contour plot of metrology data as shown by fig.4B), wherein the GUI is further configured to enable the user to select at least one metric of the recommended subset of metrics to improve yield in the process environment (wherein each of the variability chart shown by fig.3B and contour plot shown by fig.4B is a comparison metric selectable by the user 111). As explained and interpreted above, the mere difference between the method in Majumdar and claim 54 is that: Majumdar does not explicitly disclose “wherein the GUI comprises [,] (2) one or more visual display areas configured to display at least the recommended subset of metrics, the set of metrology images, and the distribution or the correlation with yield” as recited by claim 54. However, in the same field of endeavor, that is, in the field of metrology operation relating to semiconductor specimen, Vered teaches a computer-based Graphical User Interface (GUI) by which the user can be presented with a visual representation of the specimen, by a display, including “image data of the specimen” and “operation results”. See para.67. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the teachings of Vered into the teachings of Majumdar and modify the GUI taught by Majumdar and include a GUI for displaying metrology images associated thereof. Suggestion or motivation for doing so would have been to “necessitate careful monitoring of the fabrication process, including automated examination of the devices while they are still in the form of semiconductor wafers” as taught by Vered, cf., Par.2. Therefore, claim 54 is unpatentable over Majumdar in view of Vered. Regarding claim 55, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the one or more visual display areas are configured to dynamically update the plurality of metrology metrics and the set of metrology images substantially in real time as the user is interacting with or customizing the pipeline using the plurality of graphical functions (Vered, see para.67; Majumdar, see para.34: “the prediction system 102 may receive measured metrology data and image data from the metrology equipment 104 and imager system 106, respectively, for one or more wafer lots.”). Regarding claim 56, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the process environment comprises a semiconductor manufacturing environment (Majumdar, see para.34: “the prediction system 102 may receive measured metrology data and image data from the metrology equipment 104 and imager system 106, respectively, for one or more wafer lots.”). Regarding claim 57, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the pipeline is configured to incorporate (1) one or more new processes and/or (2) one or more changes to existing processes that are introduced into the process environment (Majumdar, see para.34: “the prediction system 102 may receive measured metrology data and image data from the metrology equipment 104 and imager system 106, respectively, for one or more wafer lots.”). Regarding claim 58, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the GUI is configured to permit the user to define one or more objects of interest from the set of metrology images, and wherein (1) the one or more objects of interest comprise a deposited or fabricated structure that is formed in the process environment and/or (2) the plurality of metrology metrics comprises a plurality of critical dimensions (CDs) of the one or more objects of interest (Vered, see para.67: “The user may be provided, through the GUI, with options of defining certain operation parameters, such as, e.g., region of interest (ROI) on the images, layer visibility per channel, etc. The user can also annotate the reference image via the GUI, e.g., by drawing reference polygons manually on the reference image. The user may also view the operation results, such as, e.g., the localized polygons, the registered images, etc., on the GUI.”). Regarding claim 59, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the pipeline is configured to automatically analyze one or more objects of interest defined by the user through the GUI (ibid.) Regarding claim 60, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the pipeline is configured to dynamically modify a metrology result by tuning one or more measurement methods based at least in part on a set of requirements that the user provides via the GUI (Majumdar, see para.34: “based on the received measured metrology data and image data and utilizing the machine learning system 114, the prediction system 102 may generate one or more predictive models for predicting metrology parameters and/or cell metrics for wafer lots. As used herein the term “metrology parameters” may refer to thickness and critical dimensions data for a given wafer. For instance, metrology parameters may refer to thicknesses of features (e.g., layers and/or films) of the given wafer and/or dimensions of features of the given wafer (e.g., features patterned on the given wafer by use of photo-lithography, dry etch, wet etch, or other semiconductor processing techniques). As used herein, the term “cell metrics” may refer to metric representing cell health. For instance, cell metrics (e.g., electrical performance metrics) may refer to median threshold voltage of a given die, variation in threshold voltage within the given die, operating voltage window of the given die, endurance to read and/or write cycles, lifetime of the given die, persistence of memory within the die, binning of the given die to various product grades, etc. Furthermore, utilizing the generated predictive models and image data available for given wafer lots, the prediction system 102 may predict one or more metrology parameters and/or cell metrics for the given wafer lots when minimal to no metrology data is available and/or collected for the given wafer lots.”). Regarding claim 61, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the pipeline is configured to receive an input from the user through the GUI, and wherein the input is used to define one or more objects of interest when an automatic or default definition for the one or more objects is unavailable (Vered, see para.67: “The user may be provided, through the GUI, with options of defining certain operation parameters, such as, e.g., region of interest (ROI) on the images, layer visibility per channel, etc. The user can also annotate the reference image via the GUI, e.g., by drawing reference polygons manually on the reference image. The user may also view the operation results, such as, e.g., the localized polygons, the registered images, etc., on the GUI.”). Regarding claim 62, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the pipeline is configured to automatically (1) derive the plurality of metrics for one or more objects of interest to the user, based at least in part on definitions associated with the one or more objects and (2) modify relationships between the plurality of metrics and one or more objects of interest to the user, without requiring input from the user through the GUI (Majumdar, see para.34: “based on the received measured metrology data and image data and utilizing the machine learning system 114, the prediction system 102 may generate one or more predictive models for predicting metrology parameters and/or cell metrics for wafer lots. As used herein the term “metrology parameters” may refer to thickness and critical dimensions data for a given wafer. For instance, metrology parameters may refer to thicknesses of features (e.g., layers and/or films) of the given wafer and/or dimensions of features of the given wafer (e.g., features patterned on the given wafer by use of photo-lithography, dry etch, wet etch, or other semiconductor processing techniques). As used herein, the term “cell metrics” may refer to metric representing cell health. For instance, cell metrics (e.g., electrical performance metrics) may refer to median threshold voltage of a given die, variation in threshold voltage within the given die, operating voltage window of the given die, endurance to read and/or write cycles, lifetime of the given die, persistence of memory within the die, binning of the given die to various product grades, etc. Furthermore, utilizing the generated predictive models and image data available for given wafer lots, the prediction system 102 may predict one or more metrology parameters and/or cell metrics for the given wafer lots when minimal to no metrology data is available and/or collected for the given wafer lots.”). Regarding claim 63, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the GUI is configured to allow the user to (1) add or remove one or more stages to the pipeline and (2) remove or modify one or more hyperparameters in the pipeline (the combination teaches this feature because it would be an obvious for one of skilled in the art to add a new panel for a new adding wafer lot or remove an existing panel due to the reduction of the wafer lots. Majumdar, see para.34: “based on the received measured metrology data and image data and utilizing the machine learning system 114, the prediction system 102 may generate one or more predictive models for predicting metrology parameters and/or cell metrics for wafer lots. As used herein the term “metrology parameters” may refer to thickness and critical dimensions data for a given wafer.” Vered, see para.67: “the user can be presented with a visual representation of the specimen (for example, by a display forming part of GUI 124), including image data of the specimen. The user may be provided, through the GUI, with options of defining certain operation parameters, such as, e.g., region of interest (ROI) on the images, layer visibility per channel, etc. The user can also annotate the reference image via the GUI, e.g., by drawing reference polygons manually on the reference image. The user may also view the operation results, such as, e.g., the localized polygons, the registered images, etc., on the GUI.”). Regarding claim 64, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the pipeline comprises a dataflow module configured to manage system input/output (IO) through the GUI, and wherein the GUI comprises a plurality of options that enable the user to connect the user's system to the pipeline (Majumdar, see the prediction system shown by fig.9 and para.73-79). Regarding claim 65, the combination of Majumdar and Vered discloses the metrology platform of claim 64, wherein the plurality of options comprises: a synchronization option configured to define triggering of a workflow in the pipeline, a source option configured to define an input source for the user's system and the pipeline, a destination option configured to define an output source for the user's system and the pipeline, and a transformer option configured to specify a modification to data received from the input source before saving modified data to a destination (ibid.). Regarding claim 66, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the GUI comprises a dashboard comprising a plurality of panels that display information about the user's system and the pipeline, and wherein the information comprises a resource status and/or pipeline workflow run successes or failures (Majumdar, displaying the prediction performance shown by fig.3B and par.61). Regarding claim 67, the combination of Majumdar and Vered discloses the metrology platform of claim 66, wherein the GUI is configured to enable the user to: modify the dashboard by adding a new panel and/or removing an existing panel, and enable the user to adjust a size and/or position of one or more panels on the dashboard (the combination teaches this feature because it would be an obvious for one of skilled in the art to add a new panel for a new adding wafer lot or remove an existing panel due to the reduction of the wafer lots. Majumdar, see para.34: “based on the received measured metrology data and image data and utilizing the machine learning system 114, the prediction system 102 may generate one or more predictive models for predicting metrology parameters and/or cell metrics for wafer lots. As used herein the term “metrology parameters” may refer to thickness and critical dimensions data for a given wafer.” Vered, see para.67: “the user can be presented with a visual representation of the specimen (for example, by a display forming part of GUI 124), including image data of the specimen. The user may be provided, through the GUI, with options of defining certain operation parameters, such as, e.g., region of interest (ROI) on the images, layer visibility per channel, etc. The user can also annotate the reference image via the GUI, e.g., by drawing reference polygons manually on the reference image. The user may also view the operation results, such as, e.g., the localized polygons, the registered images, etc., on the GUI.”). Regarding claim 71, the combination of Majumdar and Vered discloses the metrology platform of claim 54, further comprising an anomaly analysis module configured to provide anomaly information predicted to impact metrology measurements (Vered, see the “normality/abnormality” detections in para.38). Regarding claim 72, the combination of Majumdar and Vered discloses the metrology platform of claim 71, wherein the anomaly information comprises (1) object anomalies that indicate a presence and/or transformed state of one or more objects in one or more metrology images and/or (2) one or more types of object anomalies (ibid.). Regarding claim 73, the combination of Majumdar and Vered discloses the metrology platform of claim 72, wherein the anomaly information is provided in a report displayed on the GUI, and wherein the report is useable for analyzing process stability or issues (Vered, the user may also view the operation results, such as, e.g., the detected registered defects on the GUI, see para.67: “the user can be presented with a visual representation of the specimen (for example, by a display forming part of GUI 124), including image data of the specimen. The user may be provided, through the GUI, with options of defining certain operation parameters, such as, e.g., region of interest (ROI) on the images, layer visibility per channel, etc. The user can also annotate the reference image via the GUI, e.g., by drawing reference polygons manually on the reference image. The user may also view the operation results, such as, e.g., the localized polygons, the registered images, etc., on the GUI.”). Regarding claim 74, the combination of Majumdar and Vered discloses the metrology platform of claim 54, wherein the pipeline is further configured to apply the selected at least one metric of the recommended subset of metrics to improve yield in the process environment (Majumdar, see para.61, wherein the variability chart for metrology data provides a distribution of predicated data points: “more data points leads to better processing, better predictions of die performance, better dead die detection, etc.”;). Response to Arguments 6. Applicant’s arguments, with respects to claim 54, filed on 08/20/2026, have been fully considered but they are not persuasive. On page 7 of applicant’s response, applicant argues: Moreover, the figures referenced by the Office Action on pp. 11-12 (Figs. 3A-3B, 4A-4B, and 5A-5B) are merely charts and plots comparing the accuracy of Majumdar's predicted metrology values against measured metrology values. Id. at 61-63. Applicant submits that the prediction system of Majumdar is not the same as, and is not configured to operate the same as, the augmented metrology platform of the present Application. For example, the present Application discloses an augmented metrology platform that, among other things, analyzes and displays a "distribution or correlation with yield among the plurality of metrics." See, e.g., Application at 95 and FIG. 23. Thus, the claimed invention provides technical improvements for at least "determin[ing] or generat[ing] metrics that improve yield." See, e.g., Id. at 3. The examiner respectfully disagrees with the argument. As explained in the rejections of the claims, as shown by Fig.3B of Majumdar, the horizontal axis indicates a plurality of wafer lots while the vertical axis indicates the distribution of the predicted metrology parameter value (e.g., the thickness and/or critical dimensions data; see para.34, lines 5-17: “the prediction system 102 may generate one or more predictive models for predicting metrology parameters and/or cell metrics for wafer lots. As used herein the term “metrology parameters” may refer to thickness and critical dimensions data for a given wafer lot. For instance, metrology parameters may refer to thicknesses of features (e.g., layers and/or films) of the given wafer and/or dimensions of features of the given wafer (e.g., features patterned on the given wafer by use of photo-lithography, dry etch, wet etch, or other semiconductor processing techniques).”) for each given wafer lot. In other words, Fig.3B displays a distribution (or variation) of a metrology metric (such as the thickness) for each given wafer lot. Majumdar thus discloses or suggests the argued feature. 7. Therefore, in view of the above reasons, examiner maintains rejections. Conclusion 8. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. 9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RUIPING LI whose telephone number is (571)270-3376. The examiner can normally be reached 8:30am--5:30pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, HENOK SHIFERAW can be reached on (571)272-4637. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit https://patentcenter.uspto.gov; https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center, and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RUIPING LI/Primary Examiner, Ph.D., Art Unit 2676
Read full office action

Prosecution Timeline

Jun 27, 2024
Application Filed
Apr 21, 2026
Non-Final Rejection mailed — §103
Aug 04, 2026
Interview Requested
Aug 17, 2026
Applicant Interview (Telephonic)
Aug 19, 2026
Examiner Interview Summary
Aug 20, 2026
Response Filed
Sep 16, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
95%
With Interview (+18.4%)
2y 9m (~5m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 963 resolved cases by this examiner. Grant probability derived from career allowance rate.

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