Prosecution Insights
Last updated: October 02, 2026
Application No. 18/757,226

WIDEBAND MILLIMETER-WAVE QUADRATURE COUPLER WITH CONSTANT BANDWIDTH SCALABILITY

Non-Final OA §102§103§112
Filed
Jun 27, 2024
Examiner
COLE, VICTOR
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Dell Products L.P.
OA Round
3 (Non-Final)
92%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
45 granted / 49 resolved
+23.8% vs TC avg
Moderate +10% lift
Without
With
+10.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
37 currently pending
Career history
78
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
39.9%
-0.1% vs TC avg
§102
29.4%
-10.6% vs TC avg
§112
24.7%
-15.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 49 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/10/2026 has been entered. Information Disclosure Statement The information disclosure statement(s) (IDS) submitted on 6/12/2026 is/are in compliance with the provisions of 37 CFR 1.97 and being considered by the examiner. Response to Amendment The amendment filed 7/10/2026 has been entered. Claims 1, 9, 13, and 21 have been amended. Claims 1-17 and 21-23 remain pending in the application. The amendment has overcome the 112(b) rejection of claims 1-8, 10-12, 21-23 set forth in the Final Office Action mailed 5/12/2026 (“FOA”), which is hereby withdrawn. Response to Argument Applicant's argument, pages 8-15 of the Remarks filed 7/10/2026 (“Remarks”), has been fully considered but found not persuasive because a similar argument has already been addressed (FOA at 4). Additional responses to the applicant’s argument are set forth below under the corresponding claim limitations. The rejection of claims 1-17 and 21-23 is maintained, as set forth in detail below. Claim Rejections - 35 USC § 112 The text of those sections of Title 35, U.S. Code not included in this action can be found in the prior Office actions. Claims 9, 17, 21-23 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor, or a joint inventor, regards as the invention. Claims 9 and 17 recite “a size of the quadrature coupler.” It is unclear what particular dimension(s) the term refers to, which renders the claims indefinite. The term is not defined by the claim, the specification does not provide a standard for ascertaining the dimension(s) and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For examination purposes, this term in claim 9 will be understood to refer to the “dimensional size value of the quadrature coupler” recited in claim 1. This term in claim 17 will be understood to mean “a dimensional size value of the quadrature coupler comprising a first slot width, a first slot length, a second slot width, and a second slot length” for consistency with claim 1. Claims 21-23 are rejected under 35 U.S.C. 112(b) because claim 21 recites “a first area associated with the first slot, and a second area associated with the second slot.” It is unclear what particular area and how much of it is “associated” with the respective slots. The term is not defined by the claim, the specification does not provide a standard for ascertaining the location(s) and dimension(s) of the respective areas and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For examination purposes, this term will be understood to mean “a first area defined by the first slot, and a second area defined by the second slot.” Appropriate correction is required. Claim Rejections - 35 USC § 102 Claims 1-9, 13-17, and 21-23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by S. Sun and L. Zhu, Miniaturised patch hybrid couplers using asymmetrically loaded cross slots, IET Microw. Antennas Propag., 2010, Vol. 4, Iss. 9, pp. 1427 –1433 (“Sun”), of record. PNG media_image1.png 474 734 media_image1.png Greyscale Sun discloses in Figs. 1-5, Tables 1-2, pp. 1427 –1433: Claims 1, 13, 21 A quadrature coupler (Figs. 1-5, pp. 1427 –1433), comprising: a top metallization layer (Fig. 5a, p. 1431, top copper cladding of RT/Duroid 6010LM metalized dielectric substrate; see also Rogers 6010LM Data Sheet, cited herein as a teaching reference), comprising: PNG media_image2.png 404 615 media_image2.png Greyscale a metallic upper plane (Fig. 5a, p. 1429, “the cross-slot patch”) comprising a first slot formed in the metallic upper plane and a second slot formed in the metallic upper plane (Figs. 1b, 5a; p. 1428, “Two cross slots are formed on the diagonal lines of a square patch”), wherein the first slot and the second slot expose a substrate over which the metallic upper plane is layered (Figs. 1b, 5a; pp. 1427, 1431, “coupler is obtained by etching out the cross slots with varied width or length on the squared patch,” which means that the slots inherently expose the underlying dielectric substrate over which the metallic plane is layered, as seen in Fig. 5a), a first port (#1 input) coupled to the metallic upper plane via a first microstrip line, a second port (#2 output) coupled to the metallic upper plane via a second microstrip line, a third port (#3 output) coupled to the metallic upper plane via a third microstrip line, and a fourth port (#4 isolated) coupled to the metallic upper plane via a fourth microstrip line, wherein the first port is opposite the third port, the first port is adjacent to the second port, and the first port is the adjacent to fourth port (Figs. 1b, 5a), and wherein the first port, the second port, the third port and the fourth port lie in a same plane as the metallic upper plane (as seen in Figs. 1b and 5a, all elements of the coupler, except its ground plane and the coaxial connectors, are formed in and being flush with the same plane as the planar metallic plane, i.e., the top copper cladding of RT/Duroid 6010LM metalized dielectric substrate); the first slot in the metallic upper plane having a first slot width (W1) and a first slot length (L1) (Figs. 1b, 5a), the second slot in the metallic upper plane having a second slot width (W2) and a second slot length (L2), wherein the first slot crosses the second slot at an intersection point (Figs. 1b, 5a), and wherein the first slot formed in the metallic upper plane and the second slot formed in the metallic upper plane comprise an opening in the metallic upper plane that exposes the substrate through the opening in the metallic upper plane, wherein an area of the opening comprising the first slot and the second slot in the metallic upper plane comprises no metal (Fig. 5a, pp. 1427-1431, the quadrature hybrid coupler is fabricated on Rogers RT/Duroid 6010LM metalized dielectric substrate “by etching out the cross slots with varied width or length on the squared patch,” which means that the slot openings inherently expose the underlying dielectric substrate over which the metallic plane is layered and therefore comprising no metal, as seen in Fig. 5a); a bottom metallization layer comprising a ground plane (Sun discloses a microstrip coupler, which by definition would necessarily include a bottom metallization layer comprising a ground plane. See, e.g., The Authoritative Dictionary of IEEE Standards Terms, 7th Ed., 2000, pp. 693-4; see also Rogers RT/Duroid 6010LM Datasheet); and the substrate (Fig. 1 legend “substrate: ε=10.8, thickness=0.635 mm”, p. 1431) between the top metallization layer and the bottom metallization layer (Rogers RT/Duroid 6010LM Datasheet, “supplied clad both sides with ¼ to 2 oz./ft.2 ( 8 to 70 μm) electrodeposited (ED) copper foil”), wherein a dimensional size value of the quadrature coupler comprising the first slot width, the first slot length, the second slot width, and the second slot length, determine radio frequency characteristics of the quadrature coupler, the radio frequency characteristics comprising a defined bandwidth around a center frequency (p. 1429, As shown in Fig. 2a, the operating frequency of this hybrid coupler is gradually lowered from 5.5, 5.0 to 4.5 GHz as the slot length (L1) is increased from 5.66, 6.66 to 7.66 mm; Figs. 3b-c, Tables 1-2, illustrating how L1, L2, W1, and W2 determine radio frequency characteristics of the quadrature coupler). Claims 2 and 22 wherein the first slot is angled at substantially about forty-five degrees relative to the first microstrip line and the third microstrip line, and wherein the second slot is substantially perpendicular to the first slot (Figs. 1b, 5a). Claims 3 and 23 wherein the first slot length is greater than the second slot length (Fig. 2, L1=7.6mm, L2=5.8mm). Claims 4 and 15 wherein the metallic upper plane is substantially square, and wherein the intersection point of the first slot and the second slot is substantially centered relative to the metallic upper plane (Figs. 1b, 5a). Claim 5 wherein at least one of: the first slot width, the first slot length, the second slot width, or the second slot length, is defined at least in part based on a material of the substrate (Fig. 1 legend specifying the material of substrate as Rogers RT/Duroid 6010 LM with ε=10.8 and thickness=0.635 mm, p. 1430, “Besides the physical size of the couplers, the electrical size in terms of guided-wavelength (lg) is also calculated and is given in order to compare the effect of the size miniaturisation irrespective of the frequency and the effective dielectric constant of the substrate.”). Claims 6 and 16 wherein at least one of: the first slot width, the first slot length, the second slot width, or the second slot length, is determined at least in part based on radio frequency matching of the quadrature coupler (Figs. 3b-c, Tables 1-2, pp. 1429-21, illustrating how L1, L2, W1, and W2 determine radio frequency characteristics of the quadrature coupler). Claim 7 wherein scattering parameters of the quadrature coupler are determined at least in part by at least one of: the first slot width, the first slot length, the second slot width, or the second slot length (Figs. 3b-c, Tables 1-2, pp. 1429-21, illustrating how L1, L2, W1, and W2 determine scattering parameters of the quadrature coupler). Claim 8 wherein the defined bandwidth of the quadrature coupler is determined at least in part by at least one of: the first slot width, the first slot length, the second slot width, or the second slot length (p. 1429, As shown in Fig. 2a, the operating frequency of this hybrid coupler is gradually lowered from 5.5, 5.0 to 4.5 GHz as the slot length (L1) is increased from 5.66, 6.66 to 7.66 mm; Figs. 2b-c, 3b-c illustrating how L1, L2, W1, and W2 determine the frequency bandwidth of the quadrature coupler). Claims 9 and 17 (as best understood) wherein the center frequency of the quadrature coupler is determined by the size of the quadrature coupler (p. 1429, teaching how to determine the overall size of the cross-slot patch based on the desired wavelength; “the operating frequency of this hybrid coupler is gradually lowered from 5.5, 5.0 to 4.5 GHz as the slot length (L1) is increased from 5.66, 6.66 to 7.66 mm”, Figs. 2b-c, 3b-c illustrating how L1, L2, W1, and W2 determine the frequency bandwidth of the quadrature coupler). Claim 11 wherein the top metallization layer and the bottom metallization layer form a waveguide without an interconnecting layer between the top metallization layer and the bottom metallization layer (p. 1431, the quadrature hybrid coupler is fabricated on Rogers RT/Duroid 6010 metalized dielectric substrate, which does not have any interconnecting layer between the top and bottom metallization layers). Claim 14 wherein the quadrature coupler is incorporated into a beamforming network (p. 1427, Sun teaches to use the disclosed quadrature hybrid couplers in various devices, including Butler matrix for an antenna array). Claims 1-2, 5-9, 11, 13-14, 16-17, 21-22 are additionally rejected under 35 U.S.C. 102(a)(1) as being anticipated by CN106025476, published 10/12/2016 (“Zheng”), cited by the applicant, a machine translation of which is provided herewith. PNG media_image3.png 732 663 media_image3.png Greyscale Zheng discloses in Figs. 1-4 and the corresponding description: Claims 1, 13, 21 A quadrature coupler (“the coupler is a quadrature coupler circular microstrip patch”), comprising: a top metallization layer (Fig. 1, layer 101; top copper cladding of the RT/Duroid 5870 metalized dielectric substrate; see also Rogers 5870 Data Sheet, cited herein as a teaching reference), comprising: a metallic upper plane (“fan-shaped patch”, Fig. 2, annotated) comprising a first slot formed in the metallic upper plane and a second slot formed in the metallic upper plane (Fig. 2; “the cross-shaped slot is composed of four rectangular slots of length Ls and width Ws, and the center line of each rectangle is attached to the fan-shaped [patch]”), wherein the first slot and the second slot expose a substrate over which the metallic upper plane is layered (Fig. 2 indicates that the slots are formed by removing the top metallization layer, which means that the slots expose the underlying dielectric substrate over which the metallic plane is layered); a first port (Fig. 2, port 1) coupled to the metallic upper plane via a first microstrip line (B1), a second port (port 2) coupled to the metallic upper plane via a second microstrip line (B2), a third port (port 3) coupled to the metallic upper plane via a third microstrip line (B3), and a fourth port (port 4) coupled to the metallic upper plane via a fourth microstrip line (B4), wherein the first port is opposite the third port, the first port is adjacent to the second port, and the first port is the adjacent to fourth port (Fig. 2), and wherein the first port, the second port, the third port and the fourth port lie in a same plane as the metallic upper plane (as seen in Figs. 1 and 2, all elements of the coupler, except its ground plane 103, are formed in and being flush with the same plane as the planar metallic plane 101, i.e., the top copper cladding of RT/Duroid 5870 metalized dielectric substrate), the first slot in the metallic upper plane having a first slot width and a first slot length (Fig. 2, “the cross-shaped slot is composed of four rectangular slots of length Ls and width Ws”), the second slot in the metallic upper plane having a second slot width and a second slot length (Fig. 2, “the cross-shaped slot is composed of four rectangular slots of length Ls and width Ws”) wherein the first slot crosses the second slot at an intersection point (Fig. 2), and wherein the first slot formed in the metallic upper plane and the second slot formed in the metallic upper plane comprise an opening in the metallic upper plane that exposes the substrate through the opening in the metallic upper plane, wherein an area of the opening comprising the first slot and the second slot in the metallic upper plane comprises no metal (the quadrature hybrid coupler is fabricated on Rogers RT/Duroid 5870 metalized dielectric substrate, Fig. 2 indicates that the slots are formed by removing the top metallization layer, which means that the slot openings inherently expose the underlying dielectric substrate over which the metallic plane is layered and therefore comprising no metal); a bottom metallization layer (Fig. 1, layer 103) comprising a ground plane (“the third layer is the metal ground layer 103”); and the substrate (Fig. 1, layer 102) between the top metallization layer and the bottom metallization layer (“the coupler employs an RT/Duroid 5870 material having a dielectric material thickness of 1.57 mm and a dielectric constant of 2.33”), wherein a dimensional size value of the quadrature coupler comprising the first slot width, the first slot length, the second slot width, and the second slot length, determine radio frequency characteristics of the quadrature coupler, the radio frequency characteristics comprising a defined bandwidth around a center frequency (“by adjusting the size of the fan-shaped patch, the coupler can be easily operated in other frequency segments”; “a fine S-parameter response can be obtained by fine-tuning the slot size”). Claims 2 and 22 wherein the first slot is angled at substantially about forty-five degrees relative to the first microstrip line and the third microstrip line, and wherein the second slot is substantially perpendicular to the first slot (Fig. 2). Claim 5 wherein at least one of: the first slot width, the first slot length, the second slot width, or the second slot length, is defined at least in part based on a material of the substrate (“A simulation design method that can simultaneously provide a reconfigurable coupler of frequency and power ratio: first, according to the required center frequency, the relative dielectric constant of the dielectric substrate”). Claims 6 and 16 wherein at least one of: the first slot width, the first slot length, the second slot width, or the second slot length, is determined at least in part based on radio frequency matching of the quadrature coupler (“by adjusting the size of the fan-shaped patch, the coupler can be easily operated in other frequency segments”; “a fine S-parameter response can be obtained by fine-tuning the slot size”). Claim 7 wherein scattering parameters of the quadrature coupler are determined at least in part by at least one of: the first slot width, the first slot length, the second slot width, or the second slot length ( “a fine S-parameter response can be obtained by fine-tuning the slot size”).). Claim 8 wherein the defined bandwidth of the quadrature coupler is determined at least in part by at least one of: the first slot width, the first slot length, the second slot width, or the second slot length (“by adjusting the size of the fan-shaped patch, the coupler can be easily operated in other frequency segments”; “a fine S-parameter response can be obtained by fine-tuning the slot size”). Claims 9 and 17 (as best understood) wherein the center frequency of the quadrature coupler is determined by the size of the quadrature coupler (“by adjusting the size of the fan-shaped patch, the coupler can be easily operated in other frequency segments”; “a fine S-parameter response can be obtained by fine-tuning the slot size”; “relationship between the radius of the circular patch and the operating frequency”). Claim 11 wherein the top metallization layer and the bottom metallization layer form a waveguide without an interconnecting layer between the top metallization layer and the bottom metallization layer (the quadrature hybrid coupler is fabricated on Rogers RT/Duroid 5870 metalized dielectric substrate, which does not have any interconnecting layer between the top and bottom metallization layers). Claim 14 wherein the quadrature coupler is incorporated into a beamforming network (the disclosed coupler can be used in antenna array). Claim Rejections - 35 USC § 103 Claims 10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Sun, taken alone. Claim 10 As set forth above, Sun discloses all the limitations of claim 10 except wherein respective length and width dimensions of the first port, the second port, the third port, and the fourth port determine a characteristic impedance of the quadrature coupler. It was well known in the art before the effective filing date of the claimed invention that the respective length and width dimensions of the microstrip lines functioning as the ports determine a characteristic impedance of the quadrature coupler. See, e.g., C. Free and C. Aitchison, RF and Microwave Circuit Design: Theory and Applications, Wiley 2022, pp. 53, 61-62, of record. It would therefore have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have respective length and width dimensions of the first port, the second port, the third port, and the fourth port determine a characteristic impedance of the quadrature coupler. Claim 12 As set forth above, Sun discloses all the limitations of claim 12 except wherein the defined bandwidth is greater than around three gigahertz at a center frequency greater than around fifteen gigahertz. However, Sun teaches that the center frequency and the bandwidth of its coupler depends on various variables, including the overall cross-slot patch size (metallic upper plane) and the lengths and widths of the slots (Fig. 3; pp. 1427-9). Specifically, Sun teaches that the overall cross-slot patch size defines the operating wavelength (p. 1429). Sun further teaches that the center frequency is increasing as the length of the slots is decreasing (p. 1429). Thus, the overall cross-slot patch size and the length of the slots are result-effective variables, i.e., the variables that achieves a recognized result. MPEP 2144.05(II)(A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the overall cross-slot patch size and/or the length and width of the slots to define bandwidth greater than around three gigahertz at a center frequency greater than around fifteen gigahertz, as taught by Sun (Fig. 3; Table 1; pp. 1427-9) In addition, the modification would have been obvious because the overall cross-slot patch size and the lengths and widths of the slots are design parameters that can be set as desired for controlling the bandwidth and the center frequency of the coupler, as taught by Sun (Fig. 3; Table 1; pp. 1427-9). The overall cross-slot patch size and the lengths and widths of the slots may be set (greater or different) as a result of optimization to achieve the desired characteristics as known in the art (MPEP 2144.05(II)(A)) and/or simply obvious to try as there are only limited choices of the relationships (greater, smaller, same, or different; MPEP 2143(I)(E)). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. CN113224494A discloses a directional coupler based on microstrip-slot line coupling line (Fig. 1). Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR COLE, telephone number (571) 272-4686. The examiner can be reached Monday-Friday, 9AM-5PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ANDREA LINDGREN BALTZELL, can be reached at (571) 272-5918. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit www.uspto.gov/patents/apply/patent-center for more information about Patent Center and www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at (866) 217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call (800) 786-9199 (IN USA OR CANADA) or (571) 272-1000. /VICTOR COLE/ Examiner, Art Unit 2843 /ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
Read full office action

Prosecution Timeline

Show 1 earlier event
Jan 15, 2026
Non-Final Rejection mailed — §102, §103, §112
Apr 13, 2026
Applicant Interview (Telephonic)
Apr 15, 2026
Response Filed
May 12, 2026
Final Rejection mailed — §102, §103, §112
Jul 10, 2026
Response after Non-Final Action
Aug 05, 2026
Request for Continued Examination
Aug 06, 2026
Response after Non-Final Action
Aug 28, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
92%
Grant Probability
99%
With Interview (+10.3%)
2y 6m (~3m remaining)
Median Time to Grant
High
PTA Risk
Based on 49 resolved cases by this examiner. Grant probability derived from career allowance rate.

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