Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
1. This non-final Office action is responsive to Applicant’s response filed on 04/13/2026. Applicant elected species 1 (claims 1-10, 15 and 18-20) and withdrew species 2-4 (claims 11-14 and 16-17). Claims 1-10, 15 and 18-20 are presented for examination and are rejected for the reasons indicated herein below.
Election/Restrictions
2. Claims 11-14 and 16-17 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 04/13/2026.
Claim Objections
3. Claims 7-8 and 15 are objected to because of the following informalities:
Claim 7, line 1, recites “in high duty buck mode” it should be changed to “in the high duty buck mode”. Appropriate correction is required.
Claim 8, line 2, recites “the second input terminal is a positive terminal” it should be changed to “the second input terminal of the comparator is a positive terminal”. Appropriate correction is required.
Claim 15, line 4, recites “the transistors” it should be changed to “the plurality of transistors”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
4. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
5. Claims 1-10, 15 and 18-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. For instance;
In claims 1-2, the limitation “to be coupled” is not positively recited which renders the claims indefinite. It’s unclear if the connection/coupling is indeed being established. Therefore, this limitation should be positively recited and rewritten and clarified as specifically defined in the specification and shown in the drawings. For the purpose of examination, this limitation will be read broadly until specifically defined. Examiner’s note: the connection is not a must because the limitation is not positively recited.
In claim 15, line 9, the limitation “based on the input signal” is not clear. It’s unclear which “input signal” Applicant refers to in the claim. Is it the input signal “at a first voltage” or the input signal “indicative of a request”?. Therefore, this limitation should be rewritten and clarified as specifically defined in the specification. For the purpose of examination, this limitation will be read broadly until specifically defined. Examiner’s note: the input signal is any signal.
6. Dependent claims 2-10 and 18-20 inherit the deficiency of independent claims 1 and 15, respectively, thus they are also rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph for the same reasons.
Claim Rejections - 35 USC § 102
7. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4-10, 15 and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dietrich et al. (U.S. Pat. No. 10,845,833 B1).
Regarding claim 1, as best understood by the examiner, Dietrich et al. (e.g. see Figs. 1-6) discloses “An apparatus comprising: a comparator (364) including a first input terminal, a second input terminal, and an output terminal (e.g. Fig. 3, see 364 and its terminals), the first input terminal to be coupled to a source of a comparison of an output terminal of a buck converter and an input terminal of the buck converter (e.g. Fig. 3, see 364, 394, Vin and Vout. Implicit), the second input terminal to be coupled to a source of a signal indicative of a threshold (e.g. Fig. 3, see 364 and its terminals and connections. Implicit); and circuitry (344) including a first input terminal, a second input terminal, and an output terminal (see 344 and its terminals), the first input terminal of the circuitry coupled to the output terminal of the comparator (364), the second input terminal of the circuitry coupled to a signal indicative of whether a first operation mode of the buck converter is requested (e.g. Fig. 3, see 344, 364 and 370 and their terminals and connections, also see col. 6, lines 19-45. Implicit), the output terminal of the circuitry to indicate the first operation mode of the buck converter or a second operation mode of the buck converter (e.g. Figs. 3-6, see 344 and its terminals and connections, also see col. 4, lines 10-39, col. 6, lines 19-45 and col. 8, lines 41-67. Implicit)”.
Regarding claim 2, as best understood by the examiner, Dietrich et al. (e.g. see Figs. 1-6) discloses “wherein the source of the comparison is a divider circuit including a first input terminal, a second input terminal, and an output terminal (e.g. Fig. 3, see 394 and its terminals. Implicit), the first input terminal of the divider circuit to be coupled to the output terminal (Vout) of the buck converter, the second input terminal of the divider circuit to be coupled to the input terminal (Vin) of the buck converter, and the output terminal of the divider circuit coupled to the first input terminal of the comparator (e.g. Fig. 3, see 364, 394, Vin and Vout. Implicit)”.
Regarding claim 4, Dietrich et al. (e.g. see Figs. 1-6) discloses “wherein the circuitry is an AND gate (e.g. Fig. 3, see 344)”.
Regarding claim 5, Dietrich et al. (e.g. see Figs. 1-6) discloses “wherein the first operation mode of the buck converter is a high duty buck mode (e.g. see Figs. 3-6, also see col. 4, lines 10-39, col. 6, lines 19-45 and col. 8, lines 41-67. Implicit)”.
Regarding claim 6, Dietrich et al. (e.g. see Figs. 1-6) discloses “wherein the second operation mode of the buck converter is a buck-boost mode (e.g. see Figs. 3-6, also see col. 4, lines 10-39, col. 6, lines 19-45 and col. 8, lines 41-67. Implicit)”.
Regarding claim 7, Dietrich et al. (e.g. see Figs. 1-6) discloses “wherein the buck converter in high duty buck mode enables a high side switch (M1) for a first duration and a low side switch (M2) for a second duration that is less than the first duration (e.g. see Figs. 3-6, also see col. 4, lines 10-39, col. 6, lines 19-45 and col. 8, line 33 to col. 9, line 16. Implicit)”.
Regarding claim 8, Dietrich et al. (e.g. see Figs. 1-6) discloses “wherein the first input terminal of the comparator is a negative terminal and the second input terminal is a positive terminal (e.g. Fig. 3, see 364 and its terminals)”.
Regarding claim 9, Dietrich et al. (e.g. see Figs. 1-6) discloses “wherein the circuitry is to indicate the first operation mode in response to the output terminal of the comparator indicating the first operation mode and the signal at the second input terminal of the circuitry indicating the first operation mode (e.g. Figs. 3-6, see 344, 364 and 370 and their terminals and connections, also see col. 4, lines 10-39, col. 6, lines 19-45 and col. 8, lines 41-67. Implicit)”.
Regarding claim 10, Dietrich et al. (e.g. see Figs. 1-6) discloses “wherein the circuitry is to indicate the second operation mode in response to at least one of the output terminal of the comparator indicating the second operation mode or the second input terminal of the circuitry indicating the second operation mode (e.g. Figs. 3-6, see 344, 364 and 370 and their terminals and connections, also see col. 4, lines 10-39, col. 6, lines 19-45 and col. 8, lines 41-67. Implicit)”.
Regarding claims 15 and 18-20, as best understood by the examiner; they all comprise substantially same subject matter as in the recited apparatus claims 1-10, therefore claims 15 and 18-20 are also rejected under the same ground of rejection as clearly discussed in the rejection to the apparatus claims 1-10. Therefore, the previous rejections based on the apparatus will not be repeated.
Claim Rejections - 35 USC § 103
8. The following is a quotation of 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102 of this title, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the manner in which the invention was made.
Claim 3 is rejected under 35 U.S.C. 103(a) as being unpatentable over Dietrich et al. (U.S. Pat. No. 10,845,833 B1) in view of Li et al. (U.S. Pub. No. 2012/0014148 A1).
Regarding claim 3, Dietrich et al. (e.g. see Figs. 1-6) discloses “further including: a first voltage divider circuit including a first resistor (322) and a second resistor (324), the first resistor including a first terminal coupled to the output terminal of the buck converter, the second resistor including a first terminal coupled to a second terminal of the first resistor and the first input terminal of the divider circuit and a second terminal coupled to ground (e.g. Fig. 3, see 394, Vout, 322, 324 and ground. Examiner’s note: the term “coupled” doesn’t mean a direct connection. Implicit); Dietrich et al. does not appear to explicitly disclose “a second voltage divider including a third resistor and a fourth resistor, the third resistor including a first terminal coupled to the input terminal of the buck converter, the fourth resistor including a first terminal coupled to the second terminal of the third resistor and the second input terminal of the divider circuit and a second terminal coupled to a ground terminal”. However, Li et al. shows “a second voltage divider including a third resistor and a fourth resistor, the third resistor including a first terminal coupled to the input terminal of the buck converter, the fourth resistor including a first terminal coupled to the second terminal of the third resistor and the second input terminal of the divider circuit and a second terminal coupled to a ground terminal (Li et al., e.g. Fig. 10, see the voltage divider with two resistors connected between the input of the converter and ground, also see its terminals and connections. Implicit)”. Having a voltage divider connected between the input of the converter and ground as taught by Li et al. in the power converter of Dietrich et al. would have constituted a mere arrangement of old elements with each performing their known function, the combination yielding no more than one would expect from such an arrangement. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a voltage divider connected between the input of the converter and ground as taught by Li et al. in the power converter of Dietrich et al. for the purpose of enhancing the power efficiency of the power converter via having a better control using a voltage divider at the input of the converter to sense and divide the input voltage. Also for the purpose of making the device more widely usable.
Conclusion
9. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. A list of pertinent prior art is attached in form PTO-892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YUSEF A AHMED whose telephone number is (571)272-6057. The examiner can normally be reached on Monday-Friday 11AM-7PM.
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/YUSEF A AHMED/Primary Examiner, Art Unit 2838
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