Prosecution Insights
Last updated: July 17, 2026
Application No. 18/757,463

POWER CONVERSION DEVICE

Non-Final OA §102
Filed
Jun 27, 2024
Priority
Jun 30, 2023 — CN 202310791457.8
Examiner
TORRES-RIVERA, ALEX
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Metapwr Electronics Co. Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
669 granted / 773 resolved
+18.5% vs TC avg
Moderate +11% lift
Without
With
+11.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
28 currently pending
Career history
798
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
81.2%
+41.2% vs TC avg
§102
9.7%
-30.3% vs TC avg
§112
8.1%
-31.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 773 resolved cases

Office Action

§102
DETAILED ACTION This action is in response to the Election to Restriction 05/22/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Priority Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). Election/Restrictions Applicant's election with traverse of Invention I in the reply filed on 05/22/2026 is acknowledged. Under U.S. Patent and Trademark Office (USPTO) practice, an election of invention with traverse must include a clear and specific statement of reasons why the restriction requirement is improper. This is required by 37 CFR 1.111 and MPEP § 818.01. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by US Pub. No. 2015/0180351; (hereinafter Li). Regarding claim 1, Li [e.g. Figs. 8 - 9] discloses a power conversion device, comprising: a circuit substrate [e.g. Fig. 9; PCB], a transformer assembly [e.g. Fig. 9; X], a switch [e.g. Fig. 9; Q1 / Q2], an output capacitor [e.g. Fig. 9; Co], an input positive end [e.g. Fig. 9; IN], an output positive end [e.g. Fig. 9; OUT] and an output negative end [e.g. GND2], wherein the circuit substrate comprises a first surface and a second surface [e.g. top surface and low surface, respectively] which are opposite to each other, and the first surface comprises a transformer area [e.g. Fig. 9; X], a switch area [e.g. Fig. 9; 800], an output capacitor area [e.g. Fig. 9; Co] and a first port area [e.g. Fig. 9; in PCB], wherein the transformer assembly is arranged in the transformer area [e.g. Fig. 9; X], the switch is arranged in the switch area [e.g. Fig. 9; Q1 / Q2 in 800], at least one part of the output capacitor is arranged in the output capacitor area [e.g. Fig. 9; Co], and the input positive end, the output positive end and the output negative end are arranged in the first port area [e.g. IN, OUT and GND2 in PCB], wherein the transformer area, the switch area, the output capacitor area and the first port area are arranged in the same direction [e.g. X-direction in the view shown in Fig. 9]. Examiner's Note Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Allowable Subject Matter Claims 2 – 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the indication of the allowability of claim 2 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the output positive end comprises at least two output positive-end gold fingers, the output negative end comprises at least two output negative-end gold fingers, and the at least two output positive-end gold fingers and the at least two output negative-end gold fingers are arranged in the first port area in a staggered mode”. The primary reason for the indication of the allowability of claim 3 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “further comprising: a signal end, wherein the signal end comprises at least two signal end gold fingers, and the at least two signal end gold fingers are arranged on one side of the first port area”. The primary reason for the indication of the allowability of claim 4 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the switch comprises two middle switches and two lower switches, the two lower switches are arranged between the two middle switches, and the middle switches and the lower switches are arranged adjacent to the transformer area”. The primary reason for the indication of the allowability of claim 10 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the second surface comprises an output capacitor area, at least a part of the output capacitor is arranged in the output capacitor area of the second surface, and a projection of the output capacitor arranged on the second surface is partially or completely in the output capacitor area of the first surface”. Claims 5 – 9 and 11 are objected to because inherent dependency on claim 7. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Torres-Rivera whose telephone number is (571)272-5261. The examiner can normally be reached M-F 9:00-5:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838
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Prosecution Timeline

Jun 27, 2024
Application Filed
Jun 16, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
98%
With Interview (+11.4%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 773 resolved cases by this examiner. Grant probability derived from career allowance rate.

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