Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on December 18th, 2025 has been entered.
Response to Amendment
The amendment filed December 18th, 2025 does not place the application in condition for allowance.
The previous grounds for rejection in the Office Action dated October 1st, 2025 have been withdrawn due to Applicant’s amendment.
New rejections follow.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3-6, and 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 2024/0194800 A1) in view of Lin (CN-113838941-B). Lin is mapped to the English machine translation provided by the EPO.
In view of Claim 1, Wang et al. teaches a solar cell (Figure 7), comprising:
a substrate (Fig. 7, #100);
a passivated contact structure comprising:
a first tunnel oxide (Paragraph 0079 – SiO2) layer (Fig. 7, #111 & Paragraph 0043), a polysilicon doped conductive layer (Fig. 7, #112 & Paragraph 0069), and a second tunnel oxide (Paragraph 0077, 0079 – SiO2) layer sequentially disposed on a first side of the substrate (Fig. 7. #121 & Paragraph 0043);
a doped conductive layer disposed on a second side of the substrate opposite the first side and away from the first tunnel oxide layer, the doped conductive layer being configured to form a PN junction with the substrate (Fig. 7, #150 & Paragraph 0107-0108);
a first electrode (Figure 7, #130) connected to the polysilicon doped conductive layer by being inserted into the polysilicon doped conductive layer (Fig. 7, #112 & Paragraph 0052);
a second electrode (Fig. 7, #170) connected to the doped conductive layer (Fig. 7, #150 & Paragraph 0110);
wherein a plurality of holes arranged spaced apart from each other are formed in at least a part of regions of the polysilicon doped conductive layer and extends into the first tunnel oxide layer; and the second tunnel oxide layer at least fills a portion of each of the holes that is located within the first tunnel oxide layer (See Annotated Wang et al. Fig. 7, below).
Annotated Wang et al. Figure 7
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Wang et al. does not disclose a passivated contact structure comprising a first tunnel oxide layer, a polysilicon doped conductive layer, and a second tunnel oxide layer sequentially disposed on a first side of the structure such that a plurality of holes are arranged spaced apart from each other formed in at least a part of regions of the polysilicon doped conductive layer and the first tunnel oxide layer; and each of the holes extends through the polysilicon doped conductive layer and extends into the first tunnel oxide layer, wherein only the second tunnel oxide layer fills each of the holes.
Lin discloses a passivated contact structure comprising a first tunnel oxide layer (Fig. 5, #122 – Page 10, 4th Paragraph & Page 5, 3rd Paragraph – 122 has same thickness as 112 which can be 0.5 nm or 1 nm), a doped conductive layer (Fig. 5, #123 – Page 4, 6th Paragraph), and a second tunnel oxide layer (Fig. 5, #124 – Page 8, 4th Paragraph, Page 10, 4th Paragraph, Page 8, 1st-2nd Paragraph – thicknesses can be 0.01 nm, 0.8 nm, 1 nm) sequentially disposed on a first side of a structure such that a plurality of holes are arranged spaced apart from each other formed in at least a part of regions of the doped conductive layer and the first tunnel oxide layer; and each of the holes extends through the doped conductive layer and extends into the first tunnel oxide layer, wherein only the second tunnel oxide layer fills each of the holes (See Annotated Lin Figure 5, below). Lin discloses that this configuration improves production efficiency (Page 9, 6th Paragraph). Lin disclose that this configuration is aimed to reduce parasitic absorption of the solar cell (Page 1, Summary of the Invention, 1st Paragraph). Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to incorporate the passivated contact structure configuration of Lin as Wang et al. passivated contact structure such that a first tunnel oxide layer, a polysilicon doped conductive layer, and a second tunnel oxide layer sequentially disposed on a first side of the structure such that a plurality of holes are arranged spaced apart from each other formed in at least a part of regions of the polysilicon doped conductive layer and the first tunnel oxide layer; and each of the holes extends through the polysilicon doped conductive layer and extends into the first tunnel oxide layer, wherein only the second tunnel oxide layer fills each of the holes for the advantages of having a configuration that improves production efficiency and reduces parasitic absorption.
Annotated Lin Figure 5
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In view of Claim 3, Wang et al. and Lin are relied upon for the reasons given above in addressing Claim 1. Lin teaches that at least a part of the holes extends through the first tunnel oxide layer (See Annotated Lin Figure 5, above).
In view of Claim 4, Wang et al. and Lin are relied upon for the reasons given above in addressing Claim 1. Lin teaches that the holes have a cross-sectional profile in a shape of a rectangle (See Annotated Lin Figure 5, above, the holes are made between the edges of materials 122 and 123) and a length of at least one edge of the polygon is greater than 100 nm (the thickness of layer 123 that makes up the “short side” of the rectangle can be well over 100 nm in thickness (Page 8, 4th Paragraph).
In view of Claim 5, Wang et al. and Lin are relied upon for the reasons given above in addressing Claim 1. Lin teaches that the first tunnel oxide layer can have a thickness (Fig. 5, #122 – Page 10, 4th Paragraph & Page 5, 3rd Paragraph – 122 has same thickness as 112 which can be 0.5 nm or 1 nm) equal to a thickness of the second tunnel oxide layer (Fig. 5, #124 – Page 8, 4th Paragraph, Page 10, 4th Paragraph, Page 8, 1st-2nd Paragraph – thicknesses can be 0.01 nm, 0.8 nm, 1 nm).
In view of Claim 6, Wang et al. and Lin are relied upon for the reasons given above in addressing Claim 5. Lin discloses that the second tunnel oxide layer has a thickness of 1 nm (Fig. 5, #124 – Page 8, 4th Paragraph, Page 10, 4th Paragraph, Page 8, 1st-2nd Paragraph – thicknesses can be 0.01 nm, 0.8 nm, 1 nm).
In view of Claim 20, Wang et al. and Lin are relied upon for the reasons given above in addressing Claim 1. Wang et al. discloses a photovoltaic module comprising at least two solar cells of claim 1 (Paragraph 0024).
In view of Claim 21, Wang et al. teaches a solar cell (Figure 7), comprising:
a substrate (Fig. 7, #100);
a passivated contact structure comprising:
a first tunnel oxide (Paragraph 0079 – SiO2) layer (Fig. 7, #111 & Paragraph 0043), a polysilicon doped conductive layer that is directly on a surface of the first tunnel oxide layer and spaced from the substrate (Fig. 7, #112 & Paragraph 0069), and a second tunnel oxide (Paragraph 0077, 0079 – SiO2) layer that is directly disposed on a surface of the polysilicon doped conductive layer and spaced from the first tunnel oxide layer (Fig. 7. #121 & Paragraph 0043);
a doped conductive layer disposed on a second side of the substrate opposite the first side and away from the first tunnel oxide layer, the doped conductive layer being configured to form a PN junction with the substrate (Fig. 7, #150 & Paragraph 0107-0108);
a first electrode (Figure 7, #130) connected to the polysilicon doped conductive layer by being inserted into the polysilicon doped conductive layer (Fig. 7, #112 & Paragraph 0052);
a second electrode (Fig. 7, #170) connected to the doped conductive layer (Fig. 7, #150 & Paragraph 0110);
wherein a plurality of holes arranged spaced apart from each other are formed in at least a part of regions of the polysilicon doped conductive layer and extends into the first tunnel oxide layer; and the second tunnel oxide layer at least fills a portion of each of the holes that is located within the first tunnel oxide layer (See Annotated Wang et al. Fig. 7, below).
Annotated Wang et al. Figure 7
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Wang et al. does not disclose a passivated contact structure comprising a first tunnel oxide layer, a polysilicon doped conductive layer, and a second tunnel oxide layer sequentially disposed on a first side of the structure such that a plurality of holes are arranged spaced apart from each other formed in at least a part of regions of the polysilicon doped conductive layer and the first tunnel oxide layer; and each of the holes extends through the polysilicon doped conductive layer and extends into the first tunnel oxide layer, wherein only the second tunnel oxide layer fills each of the holes.
Lin discloses a passivated contact structure comprising a first tunnel oxide layer (Fig. 5, #122 – Page 10, 4th Paragraph & Page 5, 3rd Paragraph – 122 has same thickness as 112 which can be 0.5 nm or 1 nm), a doped conductive layer (Fig. 5, #123 – Page 4, 6th Paragraph), and a second tunnel oxide layer (Fig. 5, #124 – Page 8, 4th Paragraph, Page 10, 4th Paragraph, Page 8, 1st-2nd Paragraph – thicknesses can be 0.01 nm, 0.8 nm, 1 nm) sequentially disposed on a first side of a structure such that a plurality of holes are arranged spaced apart from each other formed in at least a part of regions of the doped conductive layer and the first tunnel oxide layer; and each of the holes extends through the doped conductive layer and extends into the first tunnel oxide layer, wherein only the second tunnel oxide layer fills each of the holes (See Annotated Lin Figure 5, below). Lin discloses that this configuration improves production efficiency (Page 9, 6th Paragraph). Lin disclose that this configuration is aimed to reduce parasitic absorption of the solar cell (Page 1, Summary of the Invention, 1st Paragraph). Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to incorporate the passivated contact structure configuration of Lin as Wang et al. passivated contact structure such that a first tunnel oxide layer, a polysilicon doped conductive layer, and a second tunnel oxide layer sequentially disposed on a first side of the structure such that a plurality of holes are arranged spaced apart from each other formed in at least a part of regions of the polysilicon doped conductive layer and the first tunnel oxide layer; and each of the holes extends through the polysilicon doped conductive layer and extends into the first tunnel oxide layer, wherein only the second tunnel oxide layer fills each of the holes for the advantages of having a configuration that improves production efficiency and reduces parasitic absorption.
Annotated Lin Figure 5
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Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 2024/0194800 A1) in view of Lin (CN-113838941-B) in view of Choi et al. (US 2014/0311567 A1). Lin is mapped to the English machine translation provided by the EPO.
In view of Claim 4, Wang et al. and Lin are relied upon for the reasons given above in addressing Claim 1. Modified Wang et al. does not disclose that each of the holes has a circular shape with a diameter greater than or equal to 100 nm.
Choi et al. discloses a diameter of each hole is larger than 100 nm (Fig. 2, #36 & Paragraph 0053) for the advantages of efficiently preventing surface recombination and maximizing the second conductive type area (Paragraph 0048). Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have the shape of each hole to have a circular shape with a diameter greater than or equal to 100 nm as disclosed by Choi et al. in modified Wang et al. solar cell for the advantages of efficiently preventing surface recombination and maximizing the second conductive type area.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 2024/0194800 A1) in view of Lin (CN-113838941-B) in view of Yang et al. (US 2016/0056322 A1). Lin is mapped to the English machine translation provided by the EPO.
In view of Claim 7, Wang et al. and Lin are relied upon for the reasons given above in addressing Claim 1. Modified Wang et al. does not disclose that the polysilicon doped conductive layer comprises a first polysilicon doped conductive layer and a second polysilicon doped conductive layer that are laminated; the first polysilicon doped conductive layer is adjacent to the first tunnel oxide layer, the second polysilicon doped conductive layer is adjacent to the second tunnel oxide layer; and a doping concentration of the first polysilicon doped conductive layer is lower than a doping concentration of the second polysilicon doped conductive layer.
Yang et al. discloses a similar configuration as Chung et al. except a polysilicon doped conductive layer (Figure 1, #34) comprises a first polysilicon doped layer and a second polysilicon doped conductive layer that are laminated (Figure 1, #22b & 30b); wherein the first polysilicon doped conductive layer is formed adjacent a first tunnel oxide layer (Figure 1, #20) and the second polysilicon doped conductive layer is adjacent to a second oxide layer (Figure 1, #40); and a doping concentration of the first polysilicon doped conductive layer is lower than a doping concentration of the second polysilicon doped conductive layer (Paragraph 0035). Yang et al. discloses that a solar cell is manufactured by forming various layers and electrodes according to a design. Efficiency of solar cells may be determined according to the design of various layers and electrodes. Low efficiency should be overcome so that solar cells can be put to practical use. Accordingly, various layers and electrodes should be designed such that solar cell efficiency is maximized (Paragraph 0006). Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to incorporate Yang et al. graded doping scheme in Wang et al. solar cell for the advantage of obtaining a solar cell whose efficiency is maximized.
Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 2024/0194800 A1) in view of Lin (CN-113838941-B) in view of Lai et al. (US 2014/0083489 A1). Lin is mapped to the English machine translation provided by the EPO.
In view of Claim 8, Wang et al. and Lin are relied upon for the reasons given above in addressing Claim 1. Wang et al. does not disclose that a first surface of a substrate on which the first tunnel oxide layer is disposed is roughened and the dimensions being less than 1 micron.
Lai et al. teaches a bottom first surface of a substrate with a roughness that can be selected below 1 micron (Fig. 3 & Paragraph 0031 – 0.3-10 microns). Lai et al. teaches that having this type of roughness on the back surface of the substrate increases the light travelling path in a semiconductor substrate and therefore increasing light absorption into the semiconductor substrate (Paragraph 0026). Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have the first surface of a substrate on which the first tunnel oxide layer is disposed is roughened and the dimensions being less than 1 micron as disclosed by Lai et al. in modified Wang et al. solar cell for the advantage of increasing light absorption into the semiconductor substrate.
In regards to the limitation, “the first surface of the substrate has a roughness being less than 1 µm”, the Examiner directs Applicant to MPEP 2144.05 I. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. Accordingly, it would have been obvious to one of ordinary skill in the art to have selected the overlapping ranged disclosed by Lai et al. because selection of the overlapping portion or ranges has been held to be a prima facie case of obviousness.
In view of Claim 9, Wang et al., Lin, and Lai et al. are relied upon for the reasons given above in addressing Claim 8. Lin discloses a first passivation film layer laminated on a surface of the second tunnel oxide layer that is away from the substrate (Page 8, 4th Paragraph – can include additional passivation films).
In view of Claim 10, Wang et al., Lin, and Lai et al. are relied upon for the reasons given above in addressing Claim 9. Wang et al. teaches that the first passivation layer can be a single or multi layered (Paragraph 0098) structure made of silicon oxide (Paragraph 0079).
Response to Arguments
Applicant’s arguments with respect to the claims have been considered but are moot because the arguments do not apply to the new grounds for rejection being used in the current rejection.
Conclusion
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/DANIEL P MALLEY JR./Primary Examiner, Art Unit 1726