Prosecution Insights
Last updated: April 19, 2026
Application No. 18/758,124

Sensor element and inductive sensor

Non-Final OA §103
Filed
Jun 28, 2024
Examiner
NGUYEN, TUNG X
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Balluff GmbH
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
91%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
627 granted / 715 resolved
+19.7% vs TC avg
Minimal +3% lift
Without
With
+3.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
47 currently pending
Career history
762
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
40.9%
+0.9% vs TC avg
§112
3.7%
-36.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 715 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lepage (US 8,704,513 B2 hereinafter Lepage), in view of Hoffman et al. (US 11,927,607 B2 hereinafter Hoffman). As to claim 1, Lepage discloses in Figs. 1A-1B, 3A-3B, 4A-4B, and 5B, a sensor element (eddy current sensor coil with shielded assembly for inductive sensing), comprising: a circuit board which has at least one plane having a printed coil (printed spiral coil on PCB substrate; Fig. 1A showing spiral test coil 1, Fig. 4A showing test coil 11), a shielding ring is arranged between the first via and the outermost coil winding (concentric active or passive shielding coil/ring surrounding the outermost winding to reduce interference; Fig. 3A showing active shielding coil 34 concentric to test coil 31, Fig. 1B showing passive eddy current shield 3 as a ring around coil 1, Fig. 4A showing active shield 12 surrounding test coil 11 with contacts 13 and 14 outside the shield). Lepage further discloses contacts or terminals at the outer perimeter of the coil assembly for multi-layer connections and coil endpoints (Fig. 4A showing contacts 13 and 14 at outer perimeter of coil assembly 15), but does not explicitly disclose wherein the printed coil has at least one first via, which is arranged outside an outermost coil winding (i.e., the contacts are not explicitly described as plated through-hole vias for interlayer connection). However, Hoffman discloses wherein the printed coil has at least one first via, which is arranged outside an outermost coil winding (Fig. 12 showing outer circumference vias 1210 at periphery beyond radial extent of windings), and shielding elements (external shield layers and plated vias) positioned to minimize electrostatic interference (Fig. 24 showing electrostatic shield layers 2402 and 2404 external to coil layers, Fig. 24 showing shielding vias 2412 between elements). Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify the system of Lepage and provide wherein the printed coil has at least one first via, which is arranged outside an outermost coil winding, as taught by Hoffman for enabling robust multi-layer connectivity and enhanced EMI reduction in compact inductive sensors (see Hoffman, Figs. 11-14 showing multi-layer structure with vias 1210, Fig. 24 showing shield layers 2402 and 2404). As to claim 2, Lepage in view of Hoffman discloses the sensor element according to claim 1, wherein the first via is implemented as a half via (Hoffman teaches edge-plated or half-vias for perimeter connections in PCB; Fig. 12 showing outer vias 1210 at board periphery; obvious for space efficiency). As to claim 3, Lepage in view of Hoffman discloses the sensor element according to claim 1, wherein an electrical connection between a first via and the outermost coil winding has an electrical connection point to the shielding ring (Lepage's active shielding ring is connectable for field control; Fig. 4A showing contacts 13 and 14; Hoffman adds via connections for grounding; Fig. 24 showing shield layers 2402 and 2404). As to claim 4, Lepage in view of Hoffman discloses the sensor element according to claim 1, has several planes, wherein the printed coils of the several planes are each electrically connected to one another via vias (Lepage shows multi-layer overlapping coils; Fig. 5B showing driver coil 23 on first layer connected to receiver 24 on second; Hoffman explicitly shows multi-plane coils connected via outer vias; Figs. 11-14 showing four-layer structure with vias 1210). As to claim 5, Lepage in view of Hoffman discloses the sensor element according to claim 4, wherein the shielding rings of the planes are not directly electrically connected to one another (Hoffman's layered shields are isolated to prevent interference coupling; Fig. 24 showing separate shield layers 2402 and 2404 external to coil planes). As to claim 6, Lepage in view of Hoffman discloses the sensor element according to claim 1, wherein the printed coil has at least one second via, which is arranged inside the innermost coil winding (Hoffman's inner circumference vias for coil symmetry and connections; Fig. 12 showing inner vias 1214 and 1216 radially inward of windings). As to claim 7, Lepage in view of Hoffman discloses the sensor element according to claim 6, has more first vias than the at least one second vias (Hoffman's design has more outer vias for circumferential paths than inner; Fig. 12 showing outer vias 1210 vs. inner circles 1214/1216; obvious for balanced multi-layer progression). As to claim 8, Lepage discloses in Figs. 1A-1B, 3A-3B, 4A-4B, and 5B, an inductive sensor, having several sensor elements (eddy current inductive sensors with coil arrays for multi-element sensing; Fig. 5B showing multiple overlapping coils as part of a single sensor assembly), comprising: a circuit board which has at least one plane having a printed coil (printed spiral coil on PCB substrate; Fig. 1A showing spiral test coil 1, Fig. 4A showing test coil 11), a shielding ring arranged between the first via and the outermost coil winding (concentric active or passive shielding coil/ring surrounding the outermost winding to reduce interference; Fig. 3A showing active shielding coil 34 concentric to test coil 31, Fig. 1B showing passive eddy current shield 3 as a ring around coil 1, Fig. 4A showing active shield 12 surrounding test coil 11 with contacts 13 and 14 outside the shield). Lepage further discloses contacts or terminals at the outer perimeter of the coil assembly for multi-layer connections and coil endpoints (Fig. 4A showing contacts 13 and 14 at outer perimeter of coil assembly 15), but does not explicitly disclose wherein the printed coil has at least one first via arranged outside an outermost coil winding (i.e., the contacts are not explicitly described as plated through-hole vias for interlayer connection). However, Hoffman discloses wherein the printed coil has at least one first via arranged outside an outermost coil winding (Fig. 12 showing outer circumference vias 1210 at periphery beyond radial extent of windings), and shielding elements (external shield layers and plated vias) positioned to minimize electrostatic interference (Fig. 24 showing electrostatic shield layers 2402 and 2404 external to coil layers, Fig. 24 showing shielding vias 2412 between elements). Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify the system of Lepage and provide wherein the printed coil has at least one first via arranged outside an outermost coil winding, as taught by Hoffman for enabling robust multi-layer connectivity and enhanced EMI reduction in compact inductive sensors (see Hoffman, Figs. 11-14 showing multi-layer structure with vias 1210, Fig. 24 showing shield layers 2402 and 2404). Allowable Subject Matter Claim 9 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. As to claim 9, the prior art in the record alone and/or in combination does not disclose a third sensor element, which is arranged between the first sensor element and the second sensor element, is set up as a transmission element and is electrically insulated from the first sensor element and from the second sensor element. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUNG X NGUYEN whose telephone number is (571)272-1967. The examiner can normally be reached 10:30am-6:30pm M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached at 571-272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUNG X NGUYEN/Primary Examiner, Art Unit 2858 2/19/2026
Read full office action

Prosecution Timeline

Jun 28, 2024
Application Filed
Feb 20, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
91%
With Interview (+3.2%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 715 resolved cases by this examiner. Grant probability derived from career allow rate.

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