DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 – 6, 8, 9, 11 – 15, are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Weidner et al. US 2021/0132156 (hereinafter Weidner).
Regarding claim 1, Weidner teaches: a system comprising:
a component configured to generate a signal associated with a power electronics circuit (Fig. 2, [0040] - - a first voltage measurement circuit is a component); and
a hardware processor circuit coupled to the component, wherein the hardware processor circuit is configured to:
measure, based on a configuration programmed by one or more programmable processor circuits ([0079] - - DAC may set the high threshold, the high threshold is a configuration; [0083] - - the high voltage threshold and low voltage threshold are set based on the first voltage), the signal over an amount of time to generate a first value ([0064] - - measures the voltage for the same duration of time), the configuration based on a model of the power electronics circuit ([0079] - - DAC may set the high threshold to the same level as the maximum recommended operating voltage of the battery cell; the recommended operating voltage is according to the model/type of the battery); and
based on a comparison between the first value and a second value satisfying at least one threshold, generate an interrupt associated with the power electronics circuit (Fig. 2, [0042] - - compare the first voltage and second voltage, if the difference is higher than the voltage threshold, a fault is detected).
Claim 11 is substantially similar to claim 1 and is rejected for the same reasons and rationale as above.
Regarding claim 2, Weidner teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the component is a primary component, the signal is a primary signal, the system further comprises a redundant component configured to generate a redundant signal, the hardware processor circuit is coupled to the redundant component (Fig. 2, [0040], [0041] - - a first voltage measurement circuit and a second voltage measurement circuit), and the hardware processor circuit is configured to:
measure, based on the configuration, the redundant signal over the amount of time to generate the second value (Fig. 2, [0040], [0041], [0042] - - measure the voltage using the second voltage measurement); and
determine a difference between the first value and the second value to determine the comparison (Fig. 2, [0040], [0041], [0042] - - compare the voltage by the first voltage measurement circuit and the second voltage measurement circuit).
Claim 12 is substantially similar to claim 2 and is rejected for the same reasons and rationale as above.
Regarding claim 3, Weidner teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the second value is based on the configuration programmed by the one or more programmable processor circuits ([0079] - - DAC may set the high threshold to the same level as the maximum recommended operating voltage for the battery cell, thus the high threshold is programmed; the second measurement is compared to the high threshold; thus it is based on the high threshold).
Claim 13 is substantially similar to claim 3 and is rejected for the same reasons and rationale as above.
Regarding claim 4, Weidner teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the at least one threshold includes an inner threshold corresponding to a condition in the power electronics circuit that may develop into a fault without intervention, and the interrupt indicates that the inner threshold has been satisfied (Fig. 11, [0085], [0083] - - if Volt3 is outside the window, a fault is detected; the low voltage threshold is an inner threshold).
Regarding claim 5, Weidner teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the at least one threshold includes an outer threshold corresponding to a fault in the power electronics circuit, and the interrupt indicates that the outer threshold has been satisfied (Fig. 11, [0085], [0083] - - if Volt3 is outside the window, a fault is detected; the high voltage threshold is an outer threshold).
Regarding claim 6, Weidner teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the hardware processor circuit is configured to measure the signal based on a trigger event generated by at least one of the one or more programmable processor circuits (Fig. 9, [0072] - - the waveform shows how each channel is triggered to measure).
Regarding claim 8, Weidner teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the first value includes at least one of an average value of the signal over the amount of time (Fig. 8 - - sampling and averaging), a peak value of the signal over the amount of time, a phase of the signal over the amount of time, a frequency of the signal over the amount of time, a duty cycle of the signal over the amount of time, or a period of the signal over the amount of time.
Claim 15 is substantially similar to claim 8 and is rejected for the same reasons and rationale as above.
Regarding claim 9, Weidner teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the hardware processor circuit is configured to, based on the configuration, select the signal from two or more signals, the two or more signals associated with the power electronics circuit (Fig. 5, [0054] - - MUX select channels in sequence).
Regarding claim 14, Weidner teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the at least one threshold includes at least one of (1) an inner threshold corresponding to a condition in the power electronics circuit that may develop into a first fault without intervention or (2) an outer threshold corresponding to a second fault in the power electronics circuit; and
the interrupt indicates that at least one of the inner threshold or the outer threshold has been satisfied (Fig. 11, [0085], [0083] - - if Volt3 is outside the window, a fault is detected; the low voltage threshold is an inner threshold; the high voltage threshold is an outer threshold).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 7, 10, 16 – 20 are rejected under 35 U.S.C. 103 as being unpatentable over Weidner et al. US 2021/0132156 (hereinafter Weidner) in view of Hom US 2021/0286017 (hereinafter Hom).
Regarding claim 7, Weidner teaches all the limitations of the base claims as outlined above.
But Weidner does not explicitly teach:
the hardware processor circuit is to send the interrupt to at least one of the one or more programmable processor circuits or another device.
However, Hom teaches:
the hardware processor circuit is to send the interrupt to at least one of the one or more programmable processor circuits or another device ([0061] - - sending a message to a maintenance service when a fault is detected).
Weidner and Hom are analogous art because they are from the same field of endeavor. They all relate to fault detection system.
Therefore before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify the above system, as taught by Weidner, and incorporating sending a message to another device, as taught by Hom.
One of ordinary skill in the art would have been motivated to do this modification in order to improve monitoring battery status, as suggested by Hom ([0004]).
Regarding claim 10, Weidner teaches all the limitations of the base claims as outlined above.
But Weidner does not explicitly teach:
one or more programmable processor circuits, the one or more programmable processor circuits coupled to the hardware processor circuit, wherein at least one of the one or more programmable processor circuits is configured to program the configuration for the hardware processor circuit based on the model of the power electronics circuit.
However, Hom teaches:
one or more programmable processor circuits, the one or more programmable processor circuits coupled to the hardware processor circuit, wherein at least one of the one or more programmable processor circuits is configured to program the configuration for the hardware processor circuit based on the model of the power electronics circuit. ([0005] - - determine an envelope of a battery cell based on a battery cell circuit model; the envelope is a configuration).
Weidner and Hom are analogous art because they are from the same field of endeavor. They all relate to fault detection system.
Therefore before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify the above system, as taught by Weidner, and incorporating determining a configuration based on a circuit model, as taught by Hom.
One of ordinary skill in the art would have been motivated to do this modification in order to improve monitoring battery status, as suggested by Hom ([0004]).
Regarding claim 16, Weidner teaches: a system comprising:
a component configured to generate a signal associated with a power electronics circuit (Fig. 2, [0040] - - a first voltage measurement circuit is a component);
a hardware processor circuit coupled to the component, wherein the hardware processor circuit is configured to:
measure, based on a configuration, the signal over an amount of time to generate a first value (Fig. 2, [0040] - - a first voltage measurement circuit measure voltage; [0064] - - measures the voltage for the same duration of time); and
based on a comparison between the first value and a second value satisfying at least one threshold, generate an interrupt associated with the power electronics circuit (Fig. 2, [0042] - - compare the first voltage and second voltage, if the difference is higher than the voltage threshold, a fault is detected);
But Weidner does not explicitly teach:
one or more programmable processor circuits coupled to the hardware processor circuit, wherein at least one of the one or more programmable processor circuits is configured to program the configuration for the hardware processor circuit based on a model of the power electronics circuit.
However, Hom teaches:
one or more programmable processor circuits coupled to the hardware processor circuit, wherein at least one of the one or more programmable processor circuits is configured to program the configuration for the hardware processor circuit based on a model of the power electronics circuit ([0005] - - determine an envelope of a battery cell based on a battery cell circuit model; the envelope is a configuration).
Weidner and Hom are analogous art because they are from the same field of endeavor. They all relate to fault detection system.
Therefore before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify the above system, as taught by Weidner, and incorporating determining a configuration based on a circuit model, as taught by Hom.
One of ordinary skill in the art would have been motivated to do this modification in order to improve monitoring battery status, as suggested by Hom ([0004]).
Regarding claim 17, the combination of Weidner and Hom teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the component is a primary component, the signal is a primary signal, the system further comprises a redundant component configured to generate a redundant signal, the hardware processor circuit is coupled to the redundant component (Fig. 2, [0040], [0041] - - a first voltage measurement circuit and a second voltage measurement circuit), and the hardware processor circuit is configured to:
measure, based on the configuration, the redundant signal over the amount of time to generate the second value (Fig. 2, [0040], [0041], [0042] - - measure the voltage using the second voltage measurement); and
determine a difference between the first value and the second value to determine the comparison (Fig. 2, [0040], [0041], [0042] - - compare the voltage by the first voltage measurement circuit and the second voltage measurement circuit).
Regarding claim 18, the combination of Weidner and Hom teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the second value is based on the configuration programmed by the one or more programmable processor circuits ([0079] - - DAC may set the high threshold to the same level as the maximum recommended operating voltage for the battery cell, thus the high threshold is programmed; the second measurement is compared to the high threshold; thus it is based on the high threshold).
Regarding claim 19, the combination of Weidner and Hom teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the at least one threshold includes at least one of (1) an inner threshold corresponding to a condition in the power electronics circuit that may develop into a first fault without intervention or (2) an outer threshold corresponding to a second fault in the power electronics circuit; and
the interrupt indicates that at least one of the inner threshold or the outer threshold has been satisfied (Fig. 11, [0085], [0083] - - if Volt3 is outside the window, a fault is detected; the low voltage threshold is an inner threshold; the high voltage threshold is an outer threshold).
Regarding claim 20, the combination of Weidner and Hom teaches all the limitations of the base claims as outlined above.
Weidner further teaches: the first value includes at least one of an average value of the signal over the amount of time (Fig. 8 - - sampling and averaging), a peak value of the signal over the amount of time, a phase of the signal over the amount of time, a frequency of the signal over the amount of time, a duty cycle of the signal over the amount of time, or a period of the signal over the amount of time.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YUHUI R PAN whose telephone number is (571)272-9872. The examiner can normally be reached Monday-Friday 8AM-5PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kenneth Lo can be reached at (571) 272-9774. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/YUHUI R PAN/Primary Examiner, Art Unit 2116