DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Foreign priority is not claimed for this application.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 09/06/2024 and 02/03/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, it says that the joint power supply changes based on a change of an envelope signal and while this is stated in the specification in par. 79, figs. 2-4 seem to be the invention that’s being claimed and there’s no envelope signal that’s shown there. This makes the claim unclear and indefinite. Claim 20 also has this same issue. Appropriate correction is required. Claims 2-19 inherit this rejection.
Regarding claim 4, it says “input a sampling voltage corresponding to the output power supply voltage and a reference signal corresponding to the sampling voltage.” The sampling voltage is Vfb, however in fig. 3 and 4, it’s not clear how Vfb corresponds to the output power supply voltage Vout nor how the reference signal Vref corresponds to sampling voltage Vfb. The claim is unclear and indefinite. Appropriate correction is required. Claims 5-19 inherit this rejection.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3 and 20 is/are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by US 20200336111 by Khlat.
Regarding claim 1, Khlat teaches a power amplifier power supply circuit (Fig. 4), comprising:
a power amplifier (34) comprising a power supply end;
a first power supply circuit (48); and
a second power supply circuit (56, 68, 40) coupled in parallel with the first power supply circuit and configured to adjust, at a symbol level, an output power supply voltage of the power amplifier (Par. 30, 32; Fig. 3a, 3b),
wherein the first power supply circuit and the second power supply circuit are configured to:
jointly supply power to the power supply end (node 38 combines outputs of both power supply circuits and outputs it to #34); and
change, based on a change of an envelope signal of the power amplifier, the output power supply voltage (Abstract; Par. 2; Khlat teaches an envelope tracking amplifier circuit which means the power supply provided to the amplifier changes based on the envelope signal).
Regarding claim 2, Khlat teaches the power amplifier power supply circuit of claim 1, wherein the second power supply circuit (56, 68, 40) is further configured to:
provide a first power supply voltage at a first symbol;
provide a second power supply voltage at a second symbol, wherein the second symbol is adjacent to the first symbol, and wherein the second power supply voltage is different from the first power supply voltage (Fig. 3a, 3b, Par. 44-48, 50-51); and
change the first power supply voltage to equal the second power supply voltage at a first symbol interval to adjust the output power supply voltage, wherein the first symbol interval is between the first symbol and the second symbol (Fig. 3a, 3b).
Regarding claim 3, Khlat teaches the power amplifier power supply circuit of claim 1, wherein the first power supply circuit comprises a direct current-direct current (DC-DC) converter (50), and wherein the second power supply circuit comprises a fast current charger (68 and 40).
Regarding claim 20, Khlat teaches a communication apparatus, comprising:
a power amplifier (Fig. 4 #34) comprising a power supply end and configured to output an envelope signal;
a digital baseband processor (while not shown, it’s well known in the art that power amplifier circuits have digital baseband processors, par. 4);
a power amplifier power supply circuit (fig. 4 #66) configured to supply power to the power amplifier and comprising:
a first power supply circuit (48); and
a second power supply circuit (56, 68, 40) coupled in parallel with the first power supply circuit and configured to adjust, at a symbol level, an output power supply voltage of the power amplifier (Par. 30, 32; Fig. 3a, 3b),
wherein the first power supply circuit and the second power supply circuit are configured to:
jointly supply power to the power supply end (node 38 combines outputs of both power supply circuits and outputs it to #34); and
change, based on a change of the envelope signal, the output power supply voltage (Abstract; Par. 2; Khlat teaches an envelope tracking amplifier circuit which means the power supply provided to the amplifier changes based on the envelope signal); and
a transmitter (par. 28) coupled to the digital baseband processor and configured to:
output a radio frequency signal (36) to the power amplifier; and
output a reference signal to the power amplifier power supply circuit (43).
Allowable Subject Matter
Claims 4-19 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The prior art fails to teach a power supply circuit wherein the second power supply circuit comprises a main power supply branch, and wherein the main power supply branch comprises:
a main charging transistor;
a main discharging transistor coupled to the main charging transistor in series at a first connection point, wherein the first connection point is also coupled to the power supply end; and
a first gate driving circuit, configured to:
input a sampling voltage corresponding to the output power supply voltage and a reference signal corresponding to the sampling voltage; and
output a first gate driving signal to the main charging transistor and the main discharging transistor.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NAREH SHAMIRYAN whose telephone number is (703)756-4616. The examiner can normally be reached M-F: 7:00AM-4:00PM PT.
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/NAREH SHAMIRYAN/Examiner, Art Unit 2843
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