Prosecution Insights
Last updated: August 17, 2026
Application No. 18/758,911

DETECTING POWER LINE DISCONTINUITIES TO PROTECT AGAINST ARC FAULTS

Non-Final OA §103
Filed
Jun 28, 2024
Examiner
PRETLOW, DEMETRIUS R
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
HAMILTON SUNDSTRAND Corporation
OA Round
2 (Non-Final)
87%
Grant Probability
Favorable
2-3
OA Rounds
3m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
604 granted / 696 resolved
+18.8% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
29 currently pending
Career history
735
Total Applications
across all art units

Statute-Specific Performance

§101
5.3%
-34.7% vs TC avg
§103
46.6%
+6.6% vs TC avg
§102
16.6%
-23.4% vs TC avg
§112
27.7%
-12.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 696 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) 1,5,6,11,15 and 16 have been considered but are moot due to new grounds of rejection cited below. Claim Objections Claim 19 is objected to because of the following informalities: Regarding claim 19, line 3, it appears that “each of “ should be removed. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3, 5, 6, 11, 13, 15,16 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Medina Garcia et al. (US 20200103445, hereafter Medina) in view of in view of Liu (CN 202564920 U). Regarding claims 1 and 11, Medina teach An apparatus (Note Fig. 2) comprising: a solid-state power controller (SSPC) (Note 72, Fig. 2 and para. 0029) configured to output power from a power source to an aircraft electrical load; (Note 52, Fig. 2) a pulse generator configured to generate a pulse through the SSPC; ([0032] The reflectometry module 92 can include a pattern generator, such as a pseudo-noise code (PN code) generator 94. The PN code generator 94 can be configured or adapted to generate a predetermined identifying pattern to be sent along the power output (e.g. via line 102) to the set of SSPCs 72, 74, 76, and ultimately to at least one electrical load 52, 56 via a respective conductor 86. ) a pulse feedback detector configured to detect a response pulse from the generated pulse reflected from the aircraft electrical load, wherein the pulse feedback detector is operably coupled to a power output of the SSPC; (The reflectometry module 92 can also include a reflection line 100 configured or adapted to receive, sense, measure, or the like, a reflected incident signal. ) and Medina teach a microcontroller (Note arc fault detection hardware, Fig. 3, par. 0019). Medina does not teach a microcontroller configured to compare the response pulse to a calibrated response pulse corresponding to circuitry downstream from the SSPC and trip the SSPC when the response pulse detected by the pulse feedback detector operably coupled to the SSPC is determined to be abnormal. Liu teach a microcontroller configured to compare the response pulse to a calibrated response pulse corresponding to circuitry downstream from the SSPC and trip the SSPC when the response pulse detected by the pulse feedback detector operably coupled to the SSPC is determined to be abnormal. (Note [0022] MCU circuit, the sampling circuit control, and calculating the effective value of the load current according to the sampling value of the sampling circuit, MCU circuit monitoring point is calculated according to the thermocouple voltage signal processing circuit transmits the voltage signal of the temperature value according to the calculated effective value of the load current and the load threshold value and comparing the comparison result of the voltage signal according to the temperature value and the temperature calibration value of the calculated monitoring point corresponding to determine whether sending the tripping instruction;) Note that tripping instruction suggests the response signal being abnormal. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Medina to include the teaching of a a microcontroller configured to compare the response pulse to a calibrated response pulse corresponding to circuitry downstream from the SSPC and trip the SSPC when the response pulse detected by the pulse feedback detector operably coupled to the SSPC is determined to be abnormal to provide overheat protection. (Note Liu abstract) Regarding claims 3 and 13, Medina does not teach the microcontroller is configured to compare one or more key signal characteristics of the response pulse to one or more key signal characteristics of the calibrated response pulse. Liu teach not teach the microcontroller is configured to compare one or more key signal characteristics of the response pulse to one or more key signal characteristics of the calibrated response pulse. (Note abstract, MCU circuit according to the compared result of the voltage signal temperature value and the temperature calibration value of the monitoring point based on current transformer, current signal of the current signal processing circuit calculating effective value of the load current and the load threshold value comparison and according to the thermocouple voltage signal processing circuit transmits the voltage signal calculated corresponding to determine whether sending the tripping instruction.) Note the value of the signal is interpreted as a key signal characteristic. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Medina to include the teaching of the Liu teach not teach the microcontroller is configured to compare one or more key signal characteristics of the response pulse to one or more key signal characteristics of the calibrated response pulse to provide overheat protection. (Note Liu abstract) Regarding claims 5 and 15, Medina teach the pulse generator is configured to continuously generate the pulse at a predetermined interval. (Note par. 0037) Regarding claims 6 and 16, Medina teach the pulse generator is configured to generate the pulse based on a trigger. (Note par. 0037) Examiner’s position is that the moment the reflectometer module generates the pulse it does so in response to some type of initiation or trigger. Regarding claim 21, Medina does not teach wherein the microcontroller is configured to determine that the response pulse is abnormal in response to determining that the response pulse is outside a threshold range for at least one key signal characteristic of the calibrated response pulse. Liu teach wherein the microcontroller is configured to determine that the response pulse is abnormal in response to determining that the response pulse is outside a threshold range for at least one key signal characteristic of the calibrated response pulse.( MCU circuit according to the compared result of the voltage signal temperature value and the temperature calibration value of the monitoring point based on current transformer, current signal of the current signal processing circuit calculating effective value of the load current and the load threshold value comparison and according to the thermocouple voltage signal processing circuit transmits the voltage signal calculated corresponding to determine whether sending the tripping instruction. ) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Medina to include the teaching of teach wherein the microcontroller is configured to determine that the response pulse is abnormal in response to determining that the response pulse is outside a threshold range for at least one key signal characteristic of the calibrated response pulse to detect overheating of a component. Claims 4 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Medina Garcia et al. (US 20200103445, hereafter Medina) in view of in view of Liu (CN 202564920 U) further in view of Park (KR 20110082806 A). Medina teach the instant invention except the following claim limitations. Regarding claims 4 and 14, Medina does not teach wherein the key signal characteristics of the calibrated response pulse include at least one of a shape, an amplitude, a curve, a time, frequency domain harmonics, and a quantity of the pulse. Park et al. teach wherein the key signal characteristics of the calibrated response pulse include at least one of a shape, an amplitude, a curve, a time, frequency domain harmonics, and a quantity of the pulse. (The time difference and amplitude information of the reference signal (interpreted as calibrated response signal) and the response signal are compared with a predetermined reference value to diagnose the wiring state, calculate an abnormal position of the wiring (S750), and output the result (S760).)[Note par. 0097] Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Medina to include the teaching of teach wherein the key signal characteristics of the calibrated response pulse include at least one of a shape, an amplitude, a curve, a time, frequency domain harmonics, and a quantity of the pulse to detect a wiring state for fault. (Note Park et al. abstract) Claims 8, 10, 18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Medina Garcia et al. (US 20200103445, hereafter Medina) in view in view of Liu (CN 202564920 U) further in view of Cai et al. (CN 111355472 A). Medina teach the instant invention except the following claim limitations. Regarding claims 8 and 18, Medina does not teach receive an input for entering a calibration mode to identify calibrated response signals; and activate the pulse generator. Cai et al. teach receive an input for entering a calibration mode to identify calibrated response signals; and activate the pulse generator.(Note par. 0077 The above calibration process only requires the pulse generation module 202 and counter 203 in the calibration circuit 200 to run once or multiple times at startup, and then save the count value N for the calibration module 204 to call.) Examiner’s position is that the startup is interpreted as the input for entering calibration. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Medina to include the teaching of receive an input for entering a calibration mode to identify calibrated response signals; and activate the pulse generator to initiate calibration at startup, preparing the device for operation. Regarding claims 10 and 20, Medina does not teach the microcontroller is further configured to store one or more key signal characteristics of the calibrated response signals. Liu teach the microcontroller is further configured to store one or more key signal characteristics of the calibrated response signals. ([0022] MCU circuit, the sampling circuit control, and calculating the effective value of the load current according to the sampling value of the sampling circuit, MCU circuit monitoring point is calculated according to the thermocouple voltage signal processing circuit transmits the voltage signal of the temperature value according to the calculated effective value of the load current and the load threshold value and comparing the comparison result of the voltage signal according to the temperature value and the temperature calibration value of the calculated monitoring point corresponding to determine whether sending the tripping instruction) Note that the MCU inherently has memory and therefore the key signal characteristics are stored. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Medina to include the teaching of the microcontroller is further configured to store one or more key signal characteristics of the calibrated response signals to provide overheat protection. (Note Liu abstract) Claims 7 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Medina Garcia et al. (US 20200103445, hereafter Medina) in view of in view of Liu (CN 202564920 U) further in view of Mapham et al. (US 3590323) Regarding claims 7 and 17, Medina does not teach wherein the pulse feedback detector is further configured to generate the trigger based on identifying an abnormal voltage or abnormal current. Mapham et al. teach wherein the pulse feedback detector is further configured to generate the trigger based on identifying an abnormal voltage or abnormal current. (Note claim 13) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Medina to include the teaching of the pulse feedback detector is further configured to generate the trigger based on identifying an abnormal voltage or abnormal current to cause the circuit breaker to interrupt the circuit and protect the circuit when a fault occurs. Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Medina Garcia et al. (US 20200103445, hereafter Medina) in view of in view of Liu (CN 202564920 U) further in Baker et al. (US 12362646). Medina teach the instant invention except the following claim limitations. Regarding claim 22, Medina does not teach wherein the calibrated response pulse is calibrated to correspond to downstream differences in one or more of impedance, routing, production breaks, or loads. Baker et al. teach herein the calibrated response pulse is calibrated to correspond to downstream differences in one or more of impedance, routing, production breaks, or loads. (Note It is to be noted that the calibration process 500 is specific to the given inductive load 20 which is powered by the device 100. In this regard, the calibration data that is obtained for a given inductive load can be different for another inductive load. (Note column 17,lines 58-62) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Medina to include the teaching of wherein the calibrated response pulse is calibrated to correspond to downstream differences in one or more of impedance, routing, production breaks, or loads so that different loads can be used in the system . Allowable Subject Matter Claims 9 and 19 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 9, wherein the microcontroller is further configured to: deactivate the pulse generator after a specified number of pulses have been identified by the pulse feedback detector; and determine a calibrated response signal based on response pulses received by the feedback detector for the specified number of pulses. Regarding claim 19, deactivating the pulse generator after a specified number of pulses have been identified by each of the pulse feedback detector; and determining a calibrated response signal based on response pulses received by the pulse feedback detector for the specified number of pulses. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEMETRIUS R PRETLOW whose telephone number is (571)272-3441. The examiner can normally be reached M-F, 5:30-1:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DEMETRIUS R PRETLOW/Examiner, Art Unit 2858 /LEE E RODAK/Supervisory Patent Examiner, Art Unit 2858
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Prosecution Timeline

Jun 28, 2024
Application Filed
Feb 02, 2026
Non-Final Rejection mailed — §103
May 01, 2026
Response Filed
Jul 29, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
87%
Grant Probability
95%
With Interview (+7.8%)
2y 5m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 696 resolved cases by this examiner. Grant probability derived from career allowance rate.

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