DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. This is in response to communication filed on 6/02/26 in which claims 1-20 are pending.
Response to Arguments
2. Applicant’s arguments with respect to claims 1-20have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
3. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
4. Claims 1, 9 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over by WO 2022/089715 to Roberts et al in view of U.S. Patent No. 8400915 to Brown et al.
a. As per claim 1, Roberts et al teaches a networking device with credit request thresholds based on egress credit delay time, comprising: an ingress port that receives packets for processing (See page 10, lines 10-12, The processor 102 receives the data packet pertaining to one of the one or more data flows, from the data flow input port 106 );a plurality of virtual output queues each associated with a respective egress port, each virtual output queue configured to send packets to the egress port based on received egress credits (See page 11, lines 17-23, updating each arrival of a data packet 302 in a virtual queue from a list of virtual queues and forwarding the received data packet 302 through a FIFO queue 306 to the output port); and a packet processor configured to: assign packets to one of the plurality of virtual output queues based on respective destinations of the packets (See page 11, lines 17-23) ; determine an egress credit rate for a first virtual output queue of the plurality of virtual output queues from an egress rate table of egress credit rates based on the size of the first virtual output queue (See page 11, lines 17-31 and page 12, lines 1-5, The received data packet 302 is forwarded through the FIFO queue 306 for transmission if the identified virtual queue size does not exceed the threshold minimum size. The received data packet 302 is then added to the virtual queue to which the received data packet 302 pertains.A service capacity is determined based on the update time interval and the credit allowance is increased based on the determined service capacity. First, the amount of service capacity accumulated since receiving the previous data packet is added to the credit allowance. Separately, at appropriate time instants that may or may not coincide with the data packet arrivals, the credit allowance is used to reduce the occupancy of the target queue of the one or more data flows that are active. The appropriate time instants may occur at least as frequently as the data packet arrivals but are otherwise freely defined and may or may not coincide with the data packet arrivals); the egress rate table having thresholds for selecting the egress credit rate based on an egress credit delay time including at least a round-trip time to the respective egress port associated with the first virtual output queue (See page 10, lines 1-12, page 11, lines 1-4, lines 10-15, page 13, lines 13-15, The processor 102 determines a service capacity based on an update time interval, and increases a credit allowance based on the determined service capacity. At a time instant that may or may not coincide with the data packet arrival, the processor 102 reduces the target queue, by an amount based on the credit allowance size, and reduces the credit allowance by the same amount.); and request egress credits for the first virtual output queue at the egress credit rate (See page 6, lines 3-6). Roberts teaches wherein one stage in the egress pipeline may maintain a state needed for the first algorithm and the second algorithm for the list of virtual queues. The state for each virtual queue is distinct which allows parallel contemporary execution for each output port (See page 17, lines 15-21). However, Roberts fails to teach wherein the packet processor sends a request for the egress credits to an egress scheduler associated with the respective egress port.
Brown et al teaches wherein the packet processor sends a request for the egress credits to an egress scheduler associated with the respective egress port (See col. 6, lines 58-67 and col. 7, lines 1-14).
It would have been obvious to one with ordinary skill in the art to include the teaching of Brown et al in the claimed invention of Roberts et al in order to increase packet throughput of the packet switch.
b. As per claim 9, Roberts et al teaches a method for managing egress credits across networking devices, comprising: receiving packets at an ingress port of a networking device (See page 10, lines 10-12, The processor 102 receives the data packet pertaining to one of the one or more data flows, from the data flow input port 106); assigning received packets associated with a first egress port to a first virtual output queue based on respective egress ports of the packets (See page 11, lines 17-23, updating each arrival of a data packet 302 in a virtual queue from a list of virtual queues and forwarding the received data packet 302 through a FIFO queue 306 to the output port 108); sending, to an egress scheduler a request for egress credits at a first rate based on a queue size of the first virtual output queue (See page 10, lines 5-6, The processor 102 determines a service capacity based on an update time interval, and increases a credit allowance based on the determined service capacity); sending, to the egress scheduler, a request for egress credits at a second rate, smaller than the first rate, when the queue size is below a first threshold that is based on an egress credit delay time including at least a round-trip time to the egress scheduler (See page 13, lines 13-15 and page 15, lines 21-23, the target queue is reduced by an amount based on the credit allowance size, and the credit allowance is reduced by the same amount by the processor); and sending packets to the egress port from the virtual output queue based on received egress credits (See page 10, lines 1-12 and page 11, lines 17-23, updating each arrival of a data packet 302 in a virtual queue from a list of virtual queues and forwarding the received data packet 302 through a FIFO queue 306 to the output port); Roberts teaches wherein one stage in the egress pipeline may maintain a state needed for the first algorithm and the second algorithm for the list of virtual queues. The state for each virtual queue is distinct which allows parallel contemporary execution for each output port (See page 17, lines 15-21). However, Roberts fails to teach explicitly teach an egress scheduler associated with the egress port, a request for egress credits at a first rate
Brown et al teaches teach an egress scheduler associated with the egress port, a request for egress credits at a first rate (See col. 6, lines 58-67 and col. 7, lines 1-14).
It would have been obvious to one with ordinary skill in the art to include the teaching of Brown et al in the claimed invention of Roberts et al in order to increase packet throughput of the packet switch.
c. As per claim 12, Roberts teaches the claimed invention as described above. Furthermore, Roberts teaches selecting an egress rate table that specifies the first rate, the second rate, and the first threshold based on the round-trip time to the egress scheduler (See page 18, lines 23-29).
5. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over WO 2022/089715 to Roberts et al in view of U.S. Patent No. 8400915 to Brown et al as applied to claim 1 above, further in view of U.S. Publication No. 2007/0153683 to McAlpine.
a. As per claim 3, Roberts teaches the claimed invention as described above. However, Roberts fails to teach wherein the egress rate table is based on a number of hops to a networking device associated with the first virtual output queue.
McAlpine teaches wherein the egress rate table is based on a number of hops to a networking device associated with the first virtual output queue (See paragraph [0045]).
It would have been obvious to one with ordinary skill in the art to incorporate the teaching of Mc Alpine in the claimed invention of Roberts in order to produce traffic rate control in the network.
6. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over WO 2022/089715 to Roberts et al in view of U.S. Patent No. 8400915 to Brown et al as applied to claim 1 above, and further in view of U.S. Publication No. 2014/0098818 to Matthews et al.
a. As per claim 4, Roberts teaches the claimed invention as described above. However, Roberts fails to teach HHwherein the packet processor is further configured to determine the egress credit delay time and set at least one threshold in the egress rate table based on the egress credit delay time.
Matthews et al teaches wherein the packet processor is further configured to determine the egress credit delay time and set at least one threshold in the egress rate table based on the egress credit delay time (See paragraph [0038]).
It would have been obvious to one with ordinary skill in the art to incorporate the teaching of Matthew et al in the claimed invention of Roberts in order to determine eligibility for cut-through and continue uninterrupted communication of data (See paragraph [0038]).
7. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over WO 2022/089715 to Roberts et al in view of U.S. Patent No. 8400915 to Brown et al as applied to claim 1 above, and further in view of U.S. Patent No. 7420919 to Toude-Fallah et al.
a. As per claim 6, Roberts et al teaches the claimed invention as described above. However, Roberts et al fails to teach wherein the credit rates of the table are a geometric progression.
Toude-Fallah et al teaches wherein a fair rate can be adjusted by multiplying the previous fair rate by a flow ratio, and a self-convergence factor. (See col. 5, lines 19-30).
It would have been obvious to one with ordinary skill in the art to incorporate the teaching of Toude-Fallah et al in the claimed invention of Roberts in order to generate a geometric progression of the credit rates by multiplying previous credit rate by a constant.
Allowable Subject Matter
8. Claims 13-20 are allowed.
9. Claims 2, 5, 7, 8, 10, 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
10. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DJENANE BAYARD whose telephone number is (571)272-3878. The examiner can normally be reached 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, John Follansbee can be reached at (571)272-3964. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DJENANE M BAYARD/Primary Examiner, Art Unit 2444
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