Prosecution Insights
Last updated: August 16, 2026
Application No. 18/760,042

SWITCHES WITH VOLTAGE LEVEL SHIFTERS IN RADIO FREQUENCY APPLICATIONS

Non-Final OA §102§112
Filed
Jul 01, 2024
Priority
Oct 08, 2018 — provisional 62/742,483 +3 more
Examiner
VO, NGUYEN THANH
Art Unit
2646
Tech Center
2600 — Communications
Assignee
Skyworks Solutions Inc.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
926 granted / 1088 resolved
+23.1% vs TC avg
Moderate +6% lift
Without
With
+6.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
27 currently pending
Career history
1106
Total Applications
across all art units

Statute-Specific Performance

§101
3.9%
-36.1% vs TC avg
§103
42.1%
+2.1% vs TC avg
§102
17.5%
-22.5% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1088 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . CLAIM INTERPRETATION The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. See claims 12-21, claim limitations that uses the word “module”. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 2-21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Balteanu (US 2018/0234095 A1). As to claim 2, Balteanu discloses a switching circuit 1190 (see at least figure 11) for switching radio frequency signals, the switching circuit 1190 comprising: a switch 1190 having an input port IN configured to receive an input radio frequency (RF) signal, an output port configured to provide an output signal responsive to the switch being in an ON state (see paragraph [0076]), a series arm 1192 between the input port IN and the output port OUT, and a shunt arm 1194a between the input port IN and a reference potential node (see ground potential), each of the series arm 1192 and the shunt arm 1194a including a plurality of transistors coupled in series (see paragraphs [0082], [0092]); control circuitry 1310 (see at least figure 13A) configured to provide a first control voltage to the series arm and a second control voltage to the shunt arm (see paragraph [0079]), the control circuitry comprising a first voltage generator (see paragraph [0044] which discloses “As described herein, multiple voltage generators or multiple parallel stacks of charge pump units can be cascaded to generate higher or lower voltage values”; paragraph [0079] which discloses “Accordingly, charge pumps and/or voltage generators as described herein can be part of the control circuitry that provides the voltages to the series arm 992 and the shunt arms 994a, 994b”) coupled to a first level shifter (see paragraph [0078] which discloses “Each of the control voltages Vin1, Vin2, and Vin3 can be provided by a dedicated voltage level shifter, such as the voltage level shifter 880 described herein with respect to FIG. 8”; therefore, there are at least three voltage level shifters provide three control voltages) to provide the first control voltage (see paragraph [0043]), and a second voltage generator (see paragraph [0044] which discloses “As described herein, multiple voltage generators or multiple parallel stacks of charge pump units can be cascaded to generate higher or lower voltage values”; paragraph [0079] which discloses “Accordingly, charge pumps and/or voltage generators as described herein can be part of the control circuitry that provides the voltages to the series arm 992 and the shunt arms 994a, 994b”) coupled to a second level shifter (see paragraph [0078] which discloses “Each of the control voltages Vin1, Vin2, and Vin3 can be provided by a dedicated voltage level shifter, such as the voltage level shifter 880 described herein with respect to FIG. 8”; therefore, there are at least three voltage level shifters provide three control voltages) to provide the second control voltage (see paragraph [0043]), each of the first voltage generator and the second voltage generator comprising one or more charge pump units that are individually activatable to produce a targeted generator voltage for a respective level shifter (see paragraphs [0015], [0044]); a power detector 1196 (see figure 11) coupled to the shunt arm 1194a, the power detector 1196 configured to detect a power of the input RF signal through the shunt arm 1194a and to generate a power signal indicative of a power of the input RF signal (see paragraph [0082]); and a feedback mechanism 1198 coupled to the power detector 1196, the feedback mechanism 1198 configured to receive the power signal Vpow from the power detector 1196 and, responsive to the power signal indicating an increase in power of the input RF signal, providing an increase in the first control voltage to the series arm 1192 (see paragraph [0082]). As to claim 3, Balteanu discloses that the control circuitry is configured to cause the first control voltage to be a positive voltage and the second control voltage to be a negative voltage to operate the switch in the ON state, and the control circuitry configured to cause the first control voltage to be a negative voltage and the second control voltage to be a positive voltage to operate the switch in an OFF state. See paragraphs [0009], [0043], [0078]. As to claim 4, Balteanu discloses that the first level shifter is configured to output different voltage values between the targeted generator voltage and a secondary voltage to provide the first control voltage. See paragraphs [0043], [0074]. As to claims 5, 17, 21, Balteanu discloses that the first voltage generator comprises a plurality of charge pump units 414a-414c that are coupled in parallel. See figure 4, paragraph [0058]. As to claim 6, Balteanu discloses that the plurality of charge pump units 414a-414c each receive a clock signal (“Clock A” to “Clock C”) with edges that are not aligned in time (see figure 4; paragraph [0061]). As to claim 7, Balteanu discloses that the first voltage generator comprises a negative voltage generator. See paragraphs [0070], [0071]. As to claim 8, Balteanu discloses that the second voltage generator comprises a negative voltage generator. See paragraphs [0070], [0071]. As to claim 9, Balteanu discloses that the first voltage generator comprises a positive voltage generator. See paragraphs [0070], [0072]. As to claim 10, Balteanu discloses that the second voltage generator comprises a positive voltage generator. See paragraphs [0070], [0072]. As to claim 11, Balteanu discloses that the feedback mechanism 1198 is further configured to provide a decrease in the first control voltage to the series arm 1192 responsive to the power signal indicating a decrease in power of the input RF signal. See paragraph [0082] which discloses “When a high signal is detected and the switch is to be in the ON state, the power detector 1196 can provide a signal indicating the increased power. A feedback mechanism 1198 can receive this signal from the power detector 1196 and provide increased voltage to the series arm 1192.” Therefore, Balteanu inherently teaches that the feedback mechanism 1198 is further configured to provide a decrease in the first control voltage to the series arm 1192 responsive to the power signal indicating a decrease in power of the input RF signal. As to claim 12, it is rejected for similar reasons with respect to independent claim 1 as set forth above. Balteanu further discloses that the switch 1405 is implemented on a packaging substrate 1412 (see paragraph [0103]). As to claim 13, Balteanu discloses that the RF module is a front-end module 340. See paragraph [0049]. As to claim 14, Balteanu discloses that the switch and the control circuitry are implemented on a single semiconductor die. See paragraphs [0009], [0102], [0103]. As to claim 15, Balteanu discloses that the switch and the control circuitry are implemented on different semiconductor die. See paragraph [0101] which discloses “FIG. 13C illustrates that a switch circuit 1305 having one or more features as described herein can be implemented on a second die 1300b, and a control circuit 1310 having one or more features as described herein can be implemented on a first die 1300a”. As to claims 16, 19, Balteanu discloses that the switch is a dual pole, dual throw switch. See paragraphs [0011], [0022]. As to claim 18, it is rejected for similar reasons with respect to independent claim 1 as set forth above. Balteanu further discloses a wireless device (see figure 17) comprising a transceiver 1730; a front-end module 1740 (see paragraph [0110]); an antenna 1720. As to claim 20, Balteanu discloses that the switch is an antenna swap switch 310a (see paragraph [0049]. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wilz (US 2017/0237424 A1); Liang (US 2017/0300076A1) disclose RF switches. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN THANH VO whose telephone number is (571)272-7901. The examiner can normally be reached Mon-Fri 8-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeanette J Parker can be reached at (571) 270-3647. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NGUYEN T VO/Primary Examiner, Art Unit 2646
Read full office action

Prosecution Timeline

Jul 01, 2024
Application Filed
Jul 17, 2026
Non-Final Rejection mailed — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
92%
With Interview (+6.5%)
2y 2m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1088 resolved cases by this examiner. Grant probability derived from career allowance rate.

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