Prosecution Insights
Last updated: July 17, 2026
Application No. 18/760,203

DEFECT CLASSIFICATION SUPPORT APPARATUS, METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM

Non-Final OA §102§103§112
Filed
Jul 01, 2024
Priority
Aug 30, 2023 — JP 2023-140427
Examiner
CONNER, SEAN M
Art Unit
2663
Tech Center
2600 — Communications
Assignee
Kabushiki Kaisha Toshiba
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
365 granted / 465 resolved
+16.5% vs TC avg
Strong +27% interview lift
Without
With
+27.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
15 currently pending
Career history
482
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
87.9%
+47.9% vs TC avg
§102
2.5%
-37.5% vs TC avg
§112
7.2%
-32.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 465 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-11, all the claims pending in the application, are rejected. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In independent claim 1, the limitation “a processor configured to” is written in a way thatrenders the scope of the claim unclear. The apparatus of claim 1 contains a processor, but the steps that follow where the processor is configured to execute specific tasks appear to be programming instructions. The specification does not appear to describe a fully hardware-only implemented system that performs the steps — that is, the apparatus as claimed does not exist together at any single moment in time, as the processor is reconfigured to perform each of the different instructions. To the extent that any of this is software, it is unclear how the two portions coexist in a typical apparatus comprising a processor. The Examiner recommends amending independent claim 1 to include, as part of the apparatus, “memory configured to store instructions that, when executed by the processor, cause the processor to perform” the claimed steps. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2, 4, 6, 8 and 10-11 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by U.S. Patent Application Publication No. 2013/0336573 to Dalla-Torre et al. (hereinafter “Dalla-Torre”). As to independent claim 1, Dalla-Torre discloses a defect classification support apparatus comprising a processor configured to (Abstract and [0048, 0190] discloses that Dalla-Torre is directed to a “processor” configured to “detect defects by comparing patches within an image”, wherein detection is a binary classification): acquire a defect image of an outer appearance of a target object having a defect ([0059, 0070, 0092] discloses acquiring “an inspected frame 503” including a “candidate defect location 501” which is a “suspected defect location in the frame”; see 501 of Fig. 5); extract a defect patch image from the defect image, the defect patch image being a partial image that includes the defect ([0060, 0070] discloses, “for each candidate defect location, processing logic can open a candidate patch around the corresponding candidate defect location”; see 505 of Fig. 5); extract a normal patch image from the defect image, the normal patch image being a partial image free of the defect; and compute a feature amount of the defect based on the defect patch image and the normal patch image ([0061, 0070] discloses identifying “at least one similar patch” to the candidate patch “in the inspected frame”; see 513 in Fig. 5; [0062-0063, 0070] discloses determining “a difference between the candidate patch and the similar patch” and “compar[ing] the difference to a threshold” to identify that “the candidate defect location has a defect if the difference satisfies a threshold”; notably, the similar patch must be free of the defect in the candidate patch in order for the difference between the patches to satisfy the threshold; this is emphasized in [0096]: “a working assumption is that two similar patches in reference are similar in the image except if there is a defect” and “If a patch contains a defect, no similar patch will typically be found”). As to claim 2, Dalla-Torre further discloses that the processor extracts, among partial images of the defect image, a partial image having a higher similarity to the defect patch image as the normal patch image ([0106-0108] discloses the process of identifying the “similar patches” as those “that represent the most similar patches to the template patch”, as measured by Mean Absolute Difference MAD). As to claim 4, Dalla-Torre further discloses that the processor extracts a predetermined number of the normal patch images from the defect image according to a number of the defect patch images ([0107] discloses that the number of similar patches that the system will find for each candidate defect patch is “a user-defined value”). As to claim 6, Dalla-Torre further discloses that the processor further acquires a normal image of an outer appearance of another target object free of the defect, further extracts another normal patch image free of the defect from the normal image, the another normal patch image being a partial image, and computes the feature amount of the defect based further on the another normal patch image ([0039-0040, 0054, 0061, 0065-0070] discloses also identifying at least one similar patch in a reference frame of “another die that has a similar die location as the inspected frame”, for example 509 in Fig. 5, wherein the reference frame is “defect-free”, and second reference patch 511 is extracted from the reference frame 509 and used in the difference calculation between the candidate defect patch 505 and the similar patch(es)). As to claim 8, Dalla-Torre further discloses that the processor extracts a predetermined number of the normal patch images and a predetermined number of the another normal patch images from the defect image and the normal image according to a number of the defect patch images ([0039-0040, 0054, 0061, 0065-0070] discloses also identifying at least one similar patch in a reference frame of “another die that has a similar die location as the inspected frame”, for example 509 in Fig. 5, wherein the reference frame is “defect-free”, and second reference patch 511 is extracted from the reference frame 509 for each similar patch 513 in the inspection image; [0107] discloses that the number of similar patches that the system will find for each candidate defect patch is “a user-defined value”; since one second reference patch 511 is extracted from the reference frame 509 for each similar patch 513 extracted from the inspected frame 503, the fixed user-defined value for the number of similar patches identified for each candidate defect patch is fixed for both the claimed normal patch images (similar patch 513) and the claimed another normal patch images (second reference patch 511)). Independent claim 10 recites a method comprising steps performed by the apparatus recited in independent claim 1. Accordingly, claim 10 is rejected for reasons analogous to those discussed above in conjunction with claim 1. Independent claim 11 recites a non-transitory computer readable medium including computer executable instructions, wherein the instructions, when executed by a processor, cause the processor to perform a method ([0192-0193] discloses a “computer-readable storage medium” that stores “instructions” for performing the algorithm disclosed by Dalla-Torre) comprising steps performed by the apparatus recited in independent claim 1. Accordingly, claim 11 is rejected for reasons analogous to those discussed above in conjunction with claim 1. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Dalla-Torre in view of U.S. Patent Application Publication No. 2021/0150677 to Sytnik et al. (hereinafter “Sytnik”). As to claim 3, Dalla-Torre does not expressly disclose that the processor extracts, among partial images of the defect image, a partial image having a shorter distance to the defect patch image as the normal patch image. Sytnik, like Dalla-Torre, is directed to image-based defect detection in which defect areas 306 and defect-free source patches 180 are extracted (Abstract, [0073-0074]). Sytnik discloses that “the source patch 180 having the shortest distance from defect area 306 can be selected as the source patch 180” ([0074]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Dalla-Torre to select the normal patch as the one having the shortest distance from the defect patch, as taught by Sytnik, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have saved computational resources by virtue of reducing a search range, while also leveraging the likelihood that nearby patches may be more similar. Claims 5 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Dalla-Torre in view of JP Patent Application Publication No. 2015041164 to Tomoki et al. (cited in IDS filed 5/18/26; citations herein rely on translation provided with IDS; hereinafter “Tomoki”). As to claim 5, Dalla-Torre does not expressly disclose that the processor randomly extracts the normal patch image from the defect image. Tomoki, like Dalla-Torre, is directed to “determining the existence/absence of a defect of the inspection object” by extracting “a defect candidate area” 502 and “non-defect candidate areas [503] in an area other than the defect candidate area” in the same image of the inspection object, and calculating “feature amounts from the defect candidate area and the non-defect candidate areas” (Abstract and Fig. 5). Tomoki discloses that the system “randomly selects and set areas other than the defect candidate areas…as non-defect candidate areas” ([0011]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Dalla-Torre to select the non-defect areas randomly, as taught by Tomoki, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have reduced the computational resources required to identify the most similar non-defect patch. As to claim 9, Dalla-Torre further discloses that the processor extracts the another normal patch image from the normal image ([0039-0040, 0054, 0061, 0065-0070] discloses also identifying at least one similar patch in a reference frame of “another die that has a similar die location as the inspected frame”, for example 509 in Fig. 5, wherein the reference frame is “defect-free”, and second reference patch 511 is extracted from the reference frame 509 and used in the difference calculation between the candidate defect patch 505 and the similar patch(es)). Dalla-Torre does not expressly disclose that the extraction is performed randomly. Tomoki, like Dalla-Torre, is directed to “determining the existence/absence of a defect of the inspection object” by extracting “a defect candidate area” 502 and “non-defect candidate areas [503] in an area other than the defect candidate area” in the same image of the inspection object, and calculating “feature amounts from the defect candidate area and the non-defect candidate areas” (Abstract and Fig. 5). Tomoki discloses that the system “randomly selects and set areas other than the defect candidate areas…as non-defect candidate areas” ([0011]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Dalla-Torre to select the non-defect areas randomly, as taught by Tomoki, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have reduced the computational resources required to identify the most similar non-defect patch. Allowable Subject Matter Claim 7 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims and if the rejections under 35 USC 112 are overcome. Pertinent Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Amzaleg (cited in the IDS filed 3/12/26; U.S. Patent Application Publication No. 2014/0212021) discloses a defect inspection system in which a source patch around an inspection pixel in a defect-free reference image is identified, and several candidate reference patches in the reference image are also selected and compared with the source patch, wherein the candidate reference patch with the highest similarity to the source patch is selected. Then, the pixel in the selected reference patch is used to identify a corresponding pixel in the inspection image to which the inspection pixel is compared for defect inspection. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEAN M CONNER whose telephone number is (571)272-1486. The examiner can normally be reached 10 AM - 6 PM Monday through Friday, and some Saturday afternoons. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Greg Morse can be reached at (571) 272-3838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SEAN M CONNER/Primary Examiner, Art Unit 2663
Read full office action

Prosecution Timeline

Jul 01, 2024
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+27.1%)
2y 8m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 465 resolved cases by this examiner. Grant probability derived from career allowance rate.

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