DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
The requirement is still deemed proper and is therefore made FINAL.
Applicant’s election of Species I and further election of Subspecies I in the reply filed on 5/11/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, a first conductive track and a second conductive track printed on the printed circuit, and not connected to one another must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1,2,4-18 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the metes and bounds of a first conductive track and a second conductive track printed on the printed circuit, and not connected to one another is unclear. At least Fig. 2, shows that the first conductive track 6a and second conductive track 6b are mounted to the electronic board 2 and therefore the first and second conductive tracks are connected to each other via the electronic board 2 soi it is unclear how the first conductive track and a second conductive track printed on the printed circuit are not connected to one another. Examiner interprets the claim limitation as first and conductive tracks are not being directly connected to each other.
Claims 2,4-18 and 20 are rejected for containing 112 rejections above and for depending on rejected base claim.
Examiner’s Note:
Claims 1,2,4-18 and 20 stand rejected under 35 USC 112(b) as outlined above. No prior art rejection has been applied to these claims because the prior art of record taken alone or in combination fails to teach the following features recited in these claims:
Regarding claim 1, the first track portion extending over a first segment of the first conductive track, and the second track portion extending over a second segment of the second conductive track, the first track portion being defined over the entire length and on an internal part of the width of the first segment, the second track portion being defined over the entire length and on an internal part of the width of the second segment, the first track portion and the second track portion being therefore disposed facing one another, the first segment and the second segment going along over the printed circuit, being substantially parallel and being substantially of the same length as claimed in combination with all other limitations of claim 1.
Prior Art:
Wu (US 20240077445) teach an aspect of the disclosure provides an integrated circuit (IC) structure, comprising: a moisture barrier about active circuitry; a capacitor entirely inside the moisture barrier, the capacitor having a breakdown voltage; and a moisture detector configured to apply an increasing voltage ramp to the capacitor up to a maximum voltage less than the breakdown voltage of the capacitor and in response to determining that a current hump exists in a test current-voltage response curve of the capacitor to the increasing voltage ramp, transmitting a signal to the active circuitry to indicate a presence of moisture in the IC structure.
Wu does not teach the limitations above.
Chen et al. (US 20090107220) teach an on-chip real-time moisture detection circuitry for monitoring ingress of moisture into an integrated circuit chip during the operational lifetime of the chip. The moisture detection circuitry includes one or more moisture-sensing units and a common moisture monitor for monitoring the state of each moisture-sensing units. The moisture monitor can be configured to provide a real-time moisture-detected signal for signaling that moisture ingress into the integrated circuit chip has occurred.
Chen et al. does not teach the limitations above.
Kuczynski et al. (US 20120217987) teach an apparatus, method, design process, and design structure for determining the moisture content in an electronic circuit board (e.g., a printed circuit board (PCB), a panel that includes one or more PCBs, or a special PCB test panel) employ one or more coupon sets, each set having two test coupons. The first coupon has a laminate stack-up with voltage planes separated from each other by dielectric material.
Kuczynski et al. does not teach the limitations above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEMETRIUS R PRETLOW whose telephone number is (571)272-3441. The examiner can normally be reached M-F, 5:30-1:30.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DEMETRIUS R PRETLOW/Examiner, Art Unit 2858
/JERMELE M HOLLINGTON/Primary Examiner, Art Unit 2858