DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-10 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by PAN et al. (US 2025/0093924).
Regarding claim 1 PAN discloses:
A power supply, comprising:
a first cover (e.g. 2 FIG.1), having four first assembly holes (e.g. edge holes for covering 121b FIG.2) ;
a circuit board (e.g. 4 FIG.2), locked to the first assembly holes of the first cover (via 121b FIG.2); and
a second cover (e.g. 1 FIG.1), closed with the first cover, wherein the circuit board is located in a space formed by the first cover and the second cover.
Regarding claim 2 PAN discloses:
the first cover has a top wall (e.g. 21 FIG.1) and a pair of first side walls (e.g. 22 FIG.1), the pair of first side walls are located on opposite sides of the top wall, a normal line direction of the top wall is perpendicular to a normal line direction of the pair of first side walls (e.g. indicated FIG.1), and each of the first side walls is provided with a pair of the first assembly holes (e.g. shown at edges of 22 FIG.2).
Regarding claim 3 PAN discloses:
a bottom edge of the each of the first side walls further has a first folded edge that is folded toward the inside of the first cover (folding shown FIG.2), wherein a normal line direction of the first folded edge is parallel to the normal line direction of the top wall (e.g. inward over lip of 11 FIG.2), and the circuit board rests against the first folded edge and is locked to the first assembly holes (e.g. via 121b FIG.2).
Regarding claim 4 PAN discloses:
a side of the each of the first side walls further has a second folded edge that is folded toward the inside of the first cover (e.g. unlabeled perpendicular wall to 22 shown below 21 FIG.2) , wherein a normal line direction of the second folded edge is perpendicular to the normal line direction of the first folded edge and perpendicular to the normal line direction of the first side walls (e.g. shown FIG.2).
Regarding claim 5 PAN discloses:
each of the second folded edges has a pair of second assembly holes (e.g. at last two shown FIG.2), and the second cover has a plurality of third assembly holes corresponding to the second assembly holes (e.g. shown, un-numbered FIG.2).
Regarding claim 6 PAN discloses:
a fan assembled in the first cover (e.g. 3 FIG.2), the top wall having a plurality of air holes (e.g. 211 FIG.2), and the fan being disposed corresponding to the air holes (e.g. shown FIG.2).
Regarding claim 7 PAN discloses:
the top wall further has a plurality of fourth assembly holes (e.g. edge-most 211 FIG.2), and the fan is locked to the fourth assembly holes correspondingly (e.g. via 121a FIG.2).
Regarding claim 8 PAN discloses:
a connection between the top wall and the pair of first side walls is arc-shaped (e.g. arc to bend from 21 to 22 as shown FIG.2, consistent with bend from 114 to 116 of present application FIG.1).
Regarding claim 9 PAN discloses:
the second cover has a bottom wall (e.g. 11 FIG.2) and a pair of second side walls (e.g. 12 FIG.2), and the pair of second side walls are located on opposite sides of the bottom wall, wherein when the second cover is closed with the first cover (e.g. FIG.1), the bottom wall faces the top wall, and the second side wall overlaps the second folded edge correspondingly (e.g. FIG.1).
Regarding claim 10 PAN discloses:
a connection between the bottom wall and the pair of second side walls is arc-shaped (e.g. arc to bend from 11 to 12 as shown FIG.2, consistent with bend from 114 to 116 of present application FIG.1).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additional references cited on the PTO-892 disclose/teach similar circuit board housings as those disclosed in the present application.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THERON S MILLISER whose telephone number is (571)270-1800. The examiner can normally be reached 9-6.
Limited examiner interviews are available.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Imani N. Hayman can be reached at (571) 270-5528. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/THERON S MILLISER/Examiner, Art Unit 2841
/ANTHONY M HAUGHTON/Primary Examiner, Art Unit 2841