DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 2022/0382478) and further in view of Schuette et al. (US 2013/0205076).
Consider claim 1, Park et al. in view of Schuette et al. discloses a method of memory tiering comprising: determining a number of free pages in a first memory tier satisfies a threshold; based on the number of free pages in the first memory tier satisfying the threshold, obtaining information stored in an access log, the information including an access counter and a first physical address associated with a page of a second memory tier; translating the first physical address to a second physical address associated with a host; and modifying, based on the access counter, a counter field of a first data structure (Park et al.: abstract, Fig. 1-2 [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], discloses a tiered storage system with a reserved area that stores access counts of pages. A translation table is also disclosed. The write count is adjusted to reflect the behavior of the data. Data is migrated based on temperature. The term “access log” is claimed as being storage having an access counter and a physical address stored within, therefore the examiner considers the locations in Park et al. storing the write counts and L2P table to be part of the access log. Park et al. does not explicitly disclose the first determining step or it being performed before the rest of the claim limitations, but Schuette et al. does teach this feature. Schuette et al.: abstract, Fig. 1, [0029], [0046], [0047], discloses a tiered storage system where migration of data, based on temperature, is performed when the amount of committed space of the lower latency memory is full or above a threshold. The threshold is in the form of a percentage/fraction which is a number and thus a number of free pages.).
It would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify the tiered storage system of Park et al. to include the features of Schuette et al. because reducing/minimizing the program/erase frequency increases the endurance of the memory component as a whole (Schuette et al.: [0012]).
Consider claim 2, Park et al. in view of Schuette et al. discloses the method of claim 1, based on the number of free pages in the first memory tier satisfying the threshold and based on modifying the counter field of the first data structure, further comprising selecting a page from the second memory tier to move to the first memory tier (Park et al.: abstract, [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], discloses promoting hot data. Schuette et al.: abstract, [0029], [0046], [0047], discloses demoting cold data and using a committed memory space threshold for determining when to migrate data.).
Consider claim 3, Park et al. in view of Schuette et al. discloses the method of claim 1, based on the number of free pages in the first memory tier satisfying the threshold and based on a counter field of a second data structure, further comprising selecting a page from the first memory tier to demote to the second memory tier, wherein the first data structure is associated with the second memory tier and the second data structure is associated with the first memory tier (Park et al.: abstract, [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], discloses promoting hot data. Schuette et al.: abstract, [0029], [0046], [0047], discloses demoting cold data and using a committed memory space threshold for determining when to migrate data.).
Consider claim 4, Park et al. in view of Schuette et al. discloses the method of claim 1, further comprising reserving an allocation of the first memory tier for storage of the page of the second memory tier, wherein the first memory tier has a lower latency than the second memory tier (Park et al.: abstract, [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], Schuette et al.: abstract, [0029], [0046], [0047], both references disclose having a memory with better latency.).
Consider claim 5, Park et al. in view of Schuette et al. discloses the method of claim 4, further comprising: migrating the page of the second memory tier to the allocation of the first memory tier; modifying a page mapping of the first memory tier based on migrating the page of the second memory tier to the allocation of the first memory tier; and making the page from the second memory tier available based on migrating the page of the second memory tier to the allocation of the first memory tier (Park et al.: abstract, [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], discloses promoting hot data and updated page table mappings. Schuette et al.: abstract, [0029], [0046], [0047], discloses demoting cold data and using a committed memory space threshold for determining when to migrate data.).
Consider claim 6, Park et al. in view of Schuette et al. discloses the method of claim 1, wherein the access log is associated with a cache-based protocol device (Park et al.: abstract, [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], Schuette et al.: abstract, [0029], [0046], [0047], both references disclose the better latency devices acting like a cache.).
Consider claim 7, Park et al. in view of Schuette et al. discloses the method of claim 6, wherein the access counter and the first physical address are obtained via an interface to firmware of the cache-based protocol device (Park et al.: abstract, [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], discloses an access counter obtained from a reserved area.).
Consider claim 8, Park et al. in view of Schuette et al. discloses the method of claim 1, further comprising using the second physical address to identify a page table entry of the page of the second memory tier, wherein the counter field corresponds to a page table entry (Park et al.: abstract, [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], discloses an access counter obtained from a reserved area and promoting hot data and updated page table mappings. Schuette et al.: abstract, [0029], [0046], [0047], discloses a change counter for memory pages.).
Consider claim 9, Park et al. in view of Schuette et al. discloses the method of claim 1, wherein the first data structure is associated with a cache-based protocol device driver (Park et al.: abstract, [0018]-[0021], [0027], [0031], [0044]-[0045], [0047], [0051], Schuette et al.: abstract, [0029], [0046], [0047], both references disclose the better latency devices acting like a cache.).
Claims 10-17 are the device claims to method claims 1-9 above and are rejected in the same manner.
Claims 18-20 are the medium claims to method claims 1-3 above and are rejected in the same manner.
Response to Arguments
Applicant's arguments filed 4/6/2026 have been fully considered but they are not persuasive.
The applicant argues that Park et al. does not translate a physical address to another physical address. However, Park et al. discloses promoting hot data and updating page table mappings this updating is translating (changing) one physical address to another physical address.
The applicant further argues that the translation isn’t from the two physical addresses as claimed. However, the claims state a first physical address associated with a page of a second memory tier and a second physical address associated with a host. Each address, respectively, merely needs to have some association with a page of a second memory tier or with a host. Each address of each tier is associated with a host for example.
Next applicant argues that Park does not disclose an access log structure containing physical addresses and access counters that are conditionally retrieved after a threshold check on available pages in a higher tier memory. However, the combination of reference was used to teach the conditional retrieval, not Park alone.
The applicant argues that Office Action's position effectively re-labels distinct device data structures (a stored counter in a reserved portion, plus a mapping table elsewhere) as a single "access log," but Park does not describe these structures as a unitary log of accesses storing both the counter and the first physical address together as claim 1 requires. As stated in the rejection of the access log above: “The term “access log” is claimed as being storage having an access counter and a physical address stored within, therefore the examiner considers the locations in Park et al. storing the write counts and L2P table to be part of the access log.”. The claim language does not appear to require a unitary structure.
The applicant next argues that Park does not disclose modifying a counter field of a data structure based on an access counter retrieved from a log following a threshold determination. However, the modifying step does not depend upon the based on step.
The applicant argues that the ordered sequence of operations in claim 1 is not taught or suggested by Park or Schuette, alone or in combination. This argument fails to comply with 37 CFR 1.111(b) because it amounts to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references.
Finally, the applicant argues that Park and Schuette are not compatible. However, as stated in the rejection: Schuette discloses a tiered storage system (similar to Park et al.’s) where migration of data, based on temperature, is performed when the amount of committed space of the lower latency memory is full or above a threshold. With a motivation provided from within the Schuette reference for reducing/minimizing the program/erase frequency of memory. In other words, the concept of checking the amount of committed space of a lower latency memory to see if its above a threshold before migrating data is known in a similar system to that of Park et al.’s. Therefore, the combination is proper.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ALSIP whose telephone number is (571)270-1182. The examiner can normally be reached M-F 9-5.
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/MICHAEL ALSIP/Primary Examiner, Art Unit 2136
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