Prosecution Insights
Last updated: October 02, 2026
Application No. 18/762,474

PHOTOELECTRIC CONVERSION APPARATUS, PHOTOELECTRIC CONVERSION SYSTEM, AND MOVING OBJECT

Final Rejection §103§DOUBLEPATENT
Filed
Jul 02, 2024
Priority
Jan 05, 2022 — continuation of PCTJP2022000069
Examiner
BENNETT, JENNIFER D
Art Unit
2878
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Canon Inc.
OA Round
2 (Final)
74%
Grant Probability
Favorable
3-4
OA Rounds
6m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
652 granted / 884 resolved
+5.8% vs TC avg
Strong +18% interview lift
Without
With
+18.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
28 currently pending
Career history
907
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
52.7%
+12.7% vs TC avg
§102
18.8%
-21.2% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 884 resolved cases

Office Action

§103 §DOUBLEPATENT
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to amendments and remarks filed June 25, 2026. Claim 1-4 and 8-21 are currently pending. Response to Arguments Applicant’s arguments with respect to claim(s) 1-4 and 8-21 have been considered but are moot because the new ground of rejection as set forth below. Claim Objections Claim 1 is objected to because of the following informalities: In line 18, the limitation “layer overlaps with the optical black pixel region overlaps” should be “layer overlaps with the optical black pixel region”. The extra overlaps appears to be a typo and should have been crossed out. Appropriate correction is required. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-4 and 8-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-17 of U.S. Patent No. 121763368 in view of Tanaka et al. (US 20220068991). In regards to claim 1, 12176368 teaches a photoelectric conversion apparatus (claim 1) comprising: a first substrate having a first semiconductor element layer including a plurality of photoelectric conversion units and a well with the plurality of photoelectric conversion units disposed (claim 1, lines 2-5); and a second substrate having a second semiconductor element layer including a circuit for processing signals acquired by the plurality of photoelectric conversion units, wherein the first and second substrates are laminated (claim 1, lines 6-11), wherein the first semiconductor element layer has an effective pixel region having a part of the plurality of photoelectric conversion units, an optical black pixel region disposed between the effective pixel region and an edge of the first semiconductor element layer and having the plurality of photoelectric conversion units, and an outer periphery region disposed between the optical black pixel region and the edge of the first semiconductor element layer (claim 1, lines 12-20), wherein in a planar view, a light shielding region composed of a light shielding layer overlaps with the optical black pixel region (claim 1, lines 21-25), wherein, in the planar view, a pad portion configured to provide electrical connection between the photoelectric conversion apparatus and outside is disposed in the outer periphery region with a gap between the pad portion and the light shielding region, wherein, in the outer periphery region, a charge draining region is disposed between the pad portion and the well, wherein the electric charge discharge region includes a semiconductor region in which a majority of carriers are carriers of the same polarity as signal charges, and wherein the charge discharge region is supplied with a fixed potential (claim 1, lines 26-41), but does not specifically teach wherein the effective pixel region includes a photoelectric conversion unit having a larger light-shielded area than other photoelectric conversion units out of the plurality of photoelectric conversion units. Tanaka teaches wherein an effective pixel region (100) includes a photoelectric conversion unit (301 and 302) having a larger light shielded area (343a and 343b) than other photoelectric conversion units (112) out of a plurality of photoelectric conversion units (112/301/302) (fig. 3 and 4). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a photoelectric conversion unit with larger light shielded area within the effective pixel region of 12176368 similar to Tanaka in order to include phase difference pixels providing for autofocus based on the phase difference output from the pixels for improved image capture. In regards to claim 2-4, 8-14 and 17-21 are either read upon by other details in claim 1 or the dependent claims 2-17 of 12176368 or are obvious consequences or materials to use. In regards to claims 15 and 16, Tanaka teaches the covered photoelectric elements in the effective area are phase pixels used in auto-focusing (paragraphs 80 and 209). Claims 1-4 and 8-21 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-17 of copending Application No. 18947777 in view of Tanaka et al. (US 20220068991). In regards to claim 1, 18947777 teaches a photoelectric conversion apparatus (claim 1) comprising: a first substrate having a first semiconductor element layer, including a plurality of photoelectric conversion units and a well with the plurality of photoelectric conversion units disposed; and a second substrate having a second semiconductor element layer including a circuit for processing signals acquired by the plurality of photoelectric conversion units, wherein the first and second substrates are laminated (claim 1, lines 1-7), wherein the first semiconductor element layer has an effective pixel region having a part of the plurality of photoelectric conversion units, an optical black pixel region disposed between the effective pixel region and an edge of the first semiconductor element layer and having the plurality of photoelectric conversion units, and an outer periphery region disposed between the optical black pixel region and the edge of the first semiconductor element layer (claim 1, lines 8-13), wherein, in the planar view, a pad portion configured to provide electrical connection between the photoelectric conversion apparatus and outside is disposed in the outer periphery region with a gap between the pad portion and the light shielding region, wherein, in the outer periphery region, a charge draining region is disposed between the pad portion and the well, wherein the electric charge discharge region includes a semiconductor region in which a majority of carriers are carriers of the same polarity as signal charges, and wherein the charge discharge region is supplied with a fixed potential (claim 1, lines 14-23), but does not specifically teach wherein the effective pixel region includes a photoelectric conversion unit having a larger light-shielded area than other photoelectric conversion units out of the plurality of photoelectric conversion units and but the outer periphery region does not overlap with the light-shielding region in a planar view. Tanaka teaches an effective pixel region (100) includes a photoelectric conversion unit (301 and 302) having a larger light-shielded area (343a and 343b) than other photoelectric conversion units (112) out of a plurality of photoelectric conversion units (112/301/302) (fig. 3 and 4) and an outer periphery region (edge of 10 outside 243) does not overlap with a light-shielding region (243) in a planar view (see fig. 3 and 4). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a photoelectric conversion unit with larger light shielded area within the effective pixel region and the outer periphery not overlapping the light shield region of 18947777 similar to Tanaka in order to include phase difference pixels and reduce undesired light shield coverage providing for autofocus based on the phase difference output from the pixels for improved image capture and more efficient manufacture. In regards to claim 2-4, 8-14 and 17-21 are either read upon by other details in claim 1 or the dependent claims 2-17 of 18947777 or are obvious consequences or materials to use. In regards to claims 15 and 16, Tanaka teaches the partially covered photoelectric elements in the effective area are phase pixels used in auto-focusing (paragraphs 80 and 209). This is a provisional nonstatutory double patenting rejection. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 3, 4, 10 and 12-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otake et al. (US 20220020789) in view of Park (US 20120001241) and Tanaka et al. (US 20220068991). Re claim 1: Otake teaches a photoelectric conversion apparatus (fig. 2, 3, 35, 36 and 51) comprising: a first substrate (41/310) having a first semiconductor element layer (21/103/101/102) including a plurality of photoelectric conversion units (21/101/102) and a well (103) with the plurality of photoelectric conversion units (21/101/102) disposed (see fig. 2, 3 and 36); and a second substrate (42/610) having a second semiconductor element layer including a circuit for processing signals acquired by the plurality of photoelectric conversion units (21/101/102), wherein the first and second substrates are laminated (fig. 2 and 36, paragraph 93, 94 and 306), wherein the first semiconductor element layer (41/310) has an effective pixel region (A1) having a part of the plurality of photoelectric conversion units (21/101/102) (see fig. 35), an outer periphery region (A2/A3) disposed between the effective pixel region (A1) and an edge of the first semiconductor element layer (41/310) (see fig. 35, 36 and 51), wherein in a planar view, a light-shielding region (402) composed of a light-shielding layer overlaps with a region outside the effective pixel region (A1) (see fig. 36 and 51), wherein, in the planar view, a pad portion (312) configured to provide electrical connection between the photoelectric conversion apparatus and outside is disposed in the outer periphery region (A2/A3) with a gap between the pad portion (312) and the light-shielding region (402) (see fig. 36 and 51), wherein, in the outer periphery region (A2/A3), a charge draining region (322/325/324) is disposed between the pad portion (312) and the well (103 of 21/103) (see fig. 2, 3, 35, 36 and 51), wherein the charge draining region (322/325/324) includes a semiconductor region (322), and wherein the electric charge discharge charge draining region (322/325/324) is supplied with a fixed potential (325/324) (paragraph 311, fig. 36), but does not specifically teach an optical black pixel region disposed between the effective pixel region and an edge of the first semiconductor element layer and having the plurality of photoelectric conversion units, and an outer periphery region disposed between the optical black pixel region and the edge of the first semiconductor element layer, wherein the effective pixel region includes a photoelectric conversion unit having a larger light-shielded area than other photoelectric conversion units out of the plurality of photoelectric conversion units, wherein in the planar view, the light-shielding layer overlaps with the optical black pixel region, and the semiconductor region in which a majority of carriers are carriers of the same polarity as signal charges. Park teaches wherein, in an outer periphery region (B) (fig. 4), a charge draining region (110) is disposed (fig. 4), wherein the charge draining region (110) includes a semiconductor region (110) in which a majority of carriers are carriers of the same polarity as signal charges wherein the charge draining region (110) is supplied with a fixed potential (GND, see fig. 4). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have the semiconductor region in which a majority of carriers are carriers of the same polarity as signal charges similar to Park with Otake to remove unwanted charges improving output signal providing for reduction of noise in the image output. Otake as modified by Park does not specifically teach an optical black pixel region disposed between the effective pixel region and an edge of the first semiconductor element layer and having the plurality of photoelectric conversion units, and an outer periphery region disposed between the optical black pixel region and the edge of the first semiconductor element layer, wherein the effective pixel region includes a photoelectric conversion unit having a larger light-shielded area than other photoelectric conversion units out of the plurality of photoelectric conversion units, wherein in the planar view, the light-shielding layer overlaps with the optical black pixel region. Tanaka teaches an optical black pixel region (200) disposed between the effective pixel region (100) and an edge of a first semiconductor element layer (111/101) and having a plurality of photoelectric conversion units (112), and an outer periphery region disposed between the optical black pixel region (200) and the edge of the first semiconductor element layer (see fig. 21), wherein the effective pixel region includes a photoelectric conversion unit (343) having a larger light-shielded area than other photoelectric conversion units out of the plurality of photoelectric conversion units (see fig. 4), wherein in the planar view, a light-shielding layer (243) overlaps with the optical black pixel region (200) (see fig. 4). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a photoelectric conversion unit with larger light shielded area within the effective pixel region and an optical black region similar to Tanaka with the device of Otake as modified by Park in order to include phase difference pixels, reduce dark current and reduce wiring between photoelectric conversion units and processing circuitry providing for autofocus based on the phase difference output from the pixels for improved image capture and more compact design. Re claim 3: Otake as modified by Park and Tanaka teaches wherein a conductivity type of the outer periphery region is a P-type, and a ground potential is applied to the charge draining region (Otake, paragraph 311, fig. 36, Park, paragraph 47). Re claim 4: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein the light-shielding region overlaps with a part of the well and outer periphery region in the planar view (Tanaka, see fig. 3 and 19, 243 overlaps the well with optically black region and a part of a periphery region). Re claim 10: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein the photoelectric conversion unit is an avalanche photodiode (APD) (Otake, 21, abstract), and wherein a distance between the well and the charge draining region is large enough to electrically isolate between the well and the discharge region (Park, paragraph 40 and 60, fig. 3, the isolation regions 125 between wells and peripheral circuit are thick enough to electrically isolate elements), but does not specifically teach the distance is 1 µm or more and 10 µm or less. Without showing criticality of the specific range, one of ordinary skill in the art would have selected a distance to maintain a higher signal to noise ratio while reducing the size of the apparatus (MPEP, 2144.04, IVA and 2144.05, I and IIA). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to set a distance between the well and the discharge region in Otake as modified by Park and Tanaka in order to maintain a small design while reducing the effects of excess charge in the apparatus from effecting peripheral circuitry providing for a more compact design and maintaining higher quality image formation (MPEP, 2144.04, IVA and 2144.05, I and IIA). Re claim 12: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein the pad portion (Tanaka, 23442, Otake, 312) is connected with a wiring layer (Tanaka, 23444) disposed in the first substrate (Tanaka, 23411, fig. 24, paragraph 196-203, Otake, paragraph 308-310, fig. 36). Re claim 13: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein, in the first semiconductor element layer (Otaka, 310), no circuit element is disposed between the pad portion (Otake, 312) and the well (Otake, 103, see fig. 36). Re claim 14: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein a wiring mainly composed of copper is disposed between the first and second substrates, and wherein the pad portion is mainly composed of aluminum (Tanaka, fig. 24, paragraphs 85 and 201, copper wiring and aluminum PAD). Re claim 15: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein a detection unit for performing focus detection by using signals output from the plurality of photoelectric conversion units is disposed on the second substrate (Tanaka, paragraphs 80 and 209). Re claim 16: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein, out of the plurality of photoelectric conversion units, a photoelectric conversion unit having a larger light-shielded area than other photoelectric conversion units outputs a signal to be used for focus detection (Tanaka, paragraphs 80 and 209). Re claim 17: Otake as modified by Park and Tanaka teaches a photoelectric conversion system comprising: the photoelectric conversion apparatus according to claim 1; and a signal processing unit configured to process a signal output by the photoelectric conversion apparatus (Otake, see fig. 36, 64 and 66 and paragraph 475-485, Tanaka, fig. 1, paragraph 75). Re claim 18: Otake as modified by Park and Tanaka teaches a moving object comprising: the photoelectric conversion apparatus according to claim 1; a distance information acquisition unit configured to acquire information about a distance to a target based on a signal from the photoelectric conversion apparatus; and a control unit configured to control the moving object based on the distance information (Otake, see fig. 36, 64 and 66 and paragraph 475-485, Tanaka, paragraphs 256 and 259, fig. 28 and 29). Re claim 19: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein, in the planar view, the gap overlaps with the charge draining region (Otake, see fig. 36, the charge drain region 322 is within the gap between the well and the pad portion). Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otake et al. (US 20220020789) as modified by Park (US 20120001241) and Tanaka et al. (US 20220068991) as applied to claim 1 above, and further in view of Park (US 20100244175 herein after Park ‘175). Re claim 2: Otake as modified by Park and Tanaka teaches wherein a conductivity type of the outer periphery region is a P-type, and a ground potential is applied to the charge draining region (Otake, paragraph 311, fig. 36, Park, paragraph 47), but does not specifically teach wherein a conductivity type of the outer periphery region is an N-type, and a positive potential is applied to the charge draining region. Park ‘175 teaches a conductivity type of an outer periphery region (114) is an N-type or P-type (paragraph 54 and 55, fig. 4), and a positive or negative potential is applied to an electric charge discharge region (paragraph 54 and 55, fig. 4). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to choose either p-type or n type regions and ground or positive potential as a signal similar to Park ‘175 with the conductivity type and potential applied of Otake as modified by Park and Tanaka in order to provide a signal or path to control charge drainage reducing the effects of unwanted charge from causing interference/noise allowing for higher quality image formation. Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otake et al. (US 20220020789) as modified by Park (US 20120001241) and Tanaka et al. (US 20220068991) as applied to claim 1 above, and further in view of Lee et al. (US 20180190696). Re claim 9: Otake as modified by Park and Tanaka teaches wherein, in the planar view, a pad portion (Otake, 312) configured to provide electrical connection between the photoelectric conversion apparatus and outside is disposed in the outer periphery region (Otake, A2/A3) with a gap between the pad portion (Otake, 312) and the light-shielding region (Otake, 402, see fig. 36 and 51), wherein, in the outer periphery region (Otake, A2/A3), a charge draining region (Otake, 322/325/324) is disposed between the pad portion (Otake, 312) and the well (Otake, 103 of 21/103, see fig. 2, 3, 35, 36 and 51), but does not specifically teach wherein a distance between a center of the pad and the light shielding layer is 30 µm or more and 200 µm or less. Lee teaches wherein a distance between a pad and a light-shielding layer is 10 µm or more and 700 µm or less (paragraph 58, fig. 1 and 5A). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to set a distance between the center of the pad and light shielding layer in Otake as modified by Park and Tanaka similar to Lee in order to maintain a small design while reducing the effects of excess charge in the apparatus from effecting peripheral circuitry providing for a more compact design and maintaining higher quality image formation. Otake as modified by Park and Tanaka and Lee does not specifically teach the range of 30 micrometers to 200 micrometers. Without showing criticality of the specific range, one of ordinary skill in the art would have selected a range to maintain a higher signal to noise ratio while reducing the size of the apparatus (MPEP, 2144.04, IVA and 2144.05, I and IIA). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to set a distance between the center of the pad and light shielding layer in Otake as modified by Park, Tanaka and Lee in order to maintain a small design while reducing the effects of excess charge in the apparatus from effecting peripheral circuitry providing for a more compact design and maintaining higher quality image formation (MPEP, 2144.04, IVA and 2144.05, I and IIA). Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otake et al. (US 20220020789) as modified by Park (US 20120001241) and Tanaka et al. (US 20220068991) as applied to claim 1 above, and further in view of Takahashi (US 6118150). Re claim 11: Otake as modified by Park and Tanaka teaches the photoelectric conversion apparatus, wherein the photoelectric conversion unit is an avalanche photodiode (APD) (Otake, 21, abstract), and wherein the well and the charge draining region are arranged to be separated from each other at a distance that is large enough to electrically isolate between the well and the discharge region (Park, paragraph 40 and 60, fig. 3, the isolation regions 125 between wells and peripheral circuit are thick enough to electrically isolate elements), but does not specifically teach the distance between the well and the electric charge discharge region does not cause avalanche multiplication to occur. Takahashi teaches wherein a distance between different regions is such that no avalanche multiplication occurs (col. 13, lines 24-55). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have a distance between the wall and the discharge region of Otake as modified by Park and Tanaka to prevent avalanche multiplication between the regions/structures similar to Takahashi in order to more efficiently discharge unwanted charges providing for higher quality image formation. Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otake et al. (US 20220020789) as modified by Park (US 20120001241) and Tanaka et al. (US 20220068991) as applied to claim 1 above, and further in view of Chinnaveerappan et al. (US 20070041062). Re claim 20: Otake as modified by Park and Tanaka teaches wherein in the planar view, the light-shielding region (Otake, 402) composed of a light-shielding layer overlaps with the region outside the effective pixel region (Otake, A1, see fig. 36 and 51) and wherein in the planar view, the light-shielding layer (Tanaka, 243) overlaps with the optical black pixel region (Tanaka, 200, see fig. 4), but does not specifically teach wherein, in the planar view, the light-shielding region overlaps with the charge draining region. Chinnaveerappan teaches wherein, in a planar view, a light-shielding region (414) overlaps with a charge draining region (7/8) (see fig. 4 and 5). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include the drain region of Otake as modified by Park and Tanaka covered by the light shielding layer of the light shielding region similar to Chinnaveerappan in order to ensure light does not directly fall on the discharge region reducing noise within the region providing for higher quality image formation. Claim(s) 21 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otake et al. (US 20220020789) as modified by Park (US 20120001241) and Tanaka et al. (US 20220068991) as applied to claim 1 above, and further in view of Park (US 20150255495 herein after Park ‘495). Re claim 21: Otake as modified by Park and Tanaka teaches wherein, in the planar view, the pad portion (Otake, 312) configured to provide electrical connection between the photoelectric conversion apparatus and outside is disposed in the outer periphery region (Otake, A2/A3) with the gap between the pad portion (Otake, 312) and the light-shielding region (Otake, 402, see fig. 36 and 51), wherein, in the outer periphery region (Otake, A2/A3), the charge draining region (Otake, 322/325/324) is disposed between the pad portion (Otake, 312) and the well (Otake, 103 of 21/103, see fig. 2, 3, 35, 36 and 51), but does not specifically teach wherein an element separating portion disposed to penetrate the first semiconductor device layer is disposed between the charge draining region and the pad portion. Park ‘495 teaches wherein an element separating portion (152A/142T) is disposed to penetrate through a first semiconductor element layer (110) between an electric charge discharge region (161a/162) and a pad (151a) (see fig. 2). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include an element separating portion similar to Park ‘495 between the discharge region and pad of Otake as modified by Park and Tanaka in order to insulate the PAD from the discharge region reducing the noise in the circuit providing for higher quality image formation. Re claim 8: Otake as modified by Park, Tanaka and Park ‘495 teaches the photoelectric conversion apparatus, wherein the element separating portion (Park, 152A/142T) has a region embedded with an insulating material (Park ‘495, paragraph 67 and 72). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER D BENNETT whose telephone number is (571)270-3419. The examiner can normally be reached 9AM-6PM EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Georgia Epps can be reached at 571-272-2328. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JENNIFER D BENNETT/Examiner, Art Unit 2878
Read full office action

Prosecution Timeline

Jul 02, 2024
Application Filed
Feb 25, 2026
Non-Final Rejection mailed — §103, §DOUBLEPATENT
Jun 25, 2026
Response Filed
Aug 10, 2026
Final Rejection mailed — §103, §DOUBLEPATENT (current)

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3-4
Expected OA Rounds
74%
Grant Probability
92%
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