Prosecution Insights
Last updated: April 19, 2026
Application No. 18/763,228

MULTIPLE AMPLIFIER SENSING CHARGE-COUPLED DEVICE

Non-Final OA §102§103
Filed
Jul 03, 2024
Examiner
TRAN, NHAN T
Art Unit
2638
Tech Center
2600 — Communications
Assignee
Fermi Research Alliance LLC
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
699 granted / 808 resolved
+24.5% vs TC avg
Moderate +13% lift
Without
With
+13.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
17 currently pending
Career history
825
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
42.3%
+2.3% vs TC avg
§102
34.4%
-5.6% vs TC avg
§112
9.9%
-30.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 808 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3, 5-7, 10 and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ingram (US 6,100,552). Regarding claim 1, Ingram discloses a system (Figs. 1-5) comprising: a front end (the horizontal readout register shown in Figs. 1 & 4-6); and a plurality of readout stages (multiple readout taps arranged along the horizontal register, each readout tap comprises multiple readout gates/electrodes 128A, 128B, 128C and a buffer amplifier 100 as shown in Figs. 1 & 5) wherein each of the plurality of readout stages are connected creating a serial readout register (see Figs. 1, 5 & 6 and col. 4, line 51 to col. 5, line 59). Regarding claim 2, as also disclosed by Ingram, the plurality of readout stages further comprises: a first readout stage comprising: a plurality of gates (128A, 128B, 128C) configured to provide a three-clock sequence (φA, φB, φC); a sensing node (128S) (col. 4, lines 59-62); and a PS gate (142) configured to remove charge from the sensing node (Figs. 5 & 6 and col. 5, lines 5-34. Note that the charge is removed from the sensing node by resetting the sensing node). Regarding claim 3, it is also seen in Ingram that the plurality of readout stages further comprises a middle readout stage (see the middle stage in Fig. 5 indicated by the sensing node 128S1 and three phases). Regarding claim 5, Ingram clearly discloses that the readout stages is configured to read out charge information (col. 4, line 59 to col. 5, line 59). Regarding claim 6, Ingram further discloses that the plurality of readout stages comprises at least eight readout stages (see col. 5, lines 38-54, wherein sixteen stages may be used for an imaging array of 512 x 512 pixels). Regarding claim 7, disclosed by Ingram is a wafer of pixels (array of pixels formed on a semiconductor wafer), wherein each of the pixels is connected to the front end (via a vertical transfer register) (see Figs. 1-6, col. 7, line 34). Regarding claim 10, Ingram discloses a readout method for comprising: receiving at least one photon on a detector (Fig. 1 where a pixel belongs to the pixel array 102); measuring a charge packet in a first of a plurality of readout stages (see the discussions in claims 1 and 5 above); transferring the charge packet to a sequential readout stage among the plurality of readout stages; and determining a pixel value associated with the charge packet (Figs. 5 & 6 and col. 4, line 51 to col. 5, line 59). Regarding claim 13, Ingram further discloses connecting each pixel on a wafer of pixels to a front end associated with the plurality of readout stages (see Figs. 1-6 and the discussion in claim 7 above). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4, 11, 12 and 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Ingram in view of Meusburger (US 4,272,693). Regarding claim 4, Ingram fails to teach a final readout stage comprising a dump gate, and a voltage drain to remove charge from a channel after measurement. However, as taught by Meusburger, a final stage of a three-phase CCD readout comprises a dump gate (E2 in Figs. 1 & 6) and a voltage drain (n-doped zone 8 in Figs. 1 & 6) to remove charge from a channel after measurement (see col. 5, lines 1-5). Therefore, it would have been obvious to one of ordinary skill in the art to combine the teaching of Ingram and Meusburger to provide a final readout stage including the above mentioned feature to clear the charge after each measurement, thereby improving signal integrity for the next charge measurement. Regarding claim 11, the subject matter this claim is also met by the combined teaching of Ingram and Meusburger as discussed in claims 2, 3 and 4. Regarding claim 12, this claim is also met by the discussion in claim 6. Regarding claim 16, the subject matter of this claim is also met by the combined teaching of Ingram and Meusburger as discussed in claims 1-4. Regarding claim 17, it is clear in the combination of Ingram and Meusburger that each of the plurality of readout stages is configured to readout charge information from a charge-coupled device (CCD) (see Ingram, col. 1, lines 10-15 and the discussions in all above claims). Regarding claim 18, please refer to claim 7 for the similar limitations. Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Ingram in view of Nomura (JPH 06189201A). Regarding claim 8, Ingram is silent with respect to at least one readout stage not connected to the plurality of readout stages, wherein the at least one readout stage is configured to provide a differential output. Nomura, however, teaches this feature by providing a differential readout stage (47) that is not directly connected to the plurality of readout stages so as to remove reset noise from the CCD signal output for improving image signal quality (see Nomura, Fig. 9 and par. [0040]). For that reason, one of ordinary skill in the art would have modify the circuit in Ingram to provide a differential circuit in view of Nomura to remove reset noise for improvement of image signal quality. Regarding claim 9, the combination of Ingram and Nomura discloses that a final pixel value is determined according to a measurement value from each of the plurality of readout stages (see Ingram, col. 2, lines 20-25 and col. 5, lines 55-59, wherein a final pixel value is determined at the end of CCD register by non-destructive readout). Claims 14, 15, 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Ingram in view of Meusburger and in further view of Nomura. Regarding claim 14, Ingram and Meusburger do not explicitly disclose providing a differential output with at least one readout stage not connected to the plurality of readout stages. This lack of teaching is compensated by Nomura. According to Nomura, a differential readout stage (47) is provided and not directly connected to the plurality of readout stages so as to remove reset noise from the CCD signal output for improving image signal quality (see Nomura, Fig. 9 and par. [0040]). For that reason, one of ordinary skill in the art would have configure the readout circuit to provide a differential circuit in view of Nomura to remove reset noise for improvement of image signal quality. Regarding claim 15, please refer to the discussion in claim 9 for similar limitations. Regarding claims 19 and 20, please refer to the discussions in claims 8 and 9 for similar limitations. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NHAN T TRAN whose telephone number is (571)272-7371. The examiner can normally be reached Monday - Friday, 9:00am - 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lin Ye can be reached at 571-272-7372. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NHAN T TRAN/Primary Examiner, Art Unit 2638
Read full office action

Prosecution Timeline

Jul 03, 2024
Application Filed
Mar 13, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+13.2%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 808 resolved cases by this examiner. Grant probability derived from career allow rate.

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