Office Action Predictor
Last updated: April 16, 2026
Application No. 18/763,421

CONTROL ARRANGEMENT FOR A VEHICLE ELECTRICAL SYSTEM

Non-Final OA §102§103
Filed
Jul 03, 2024
Examiner
DALEY, CHRISTOPHER ANTHONY
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
Lisa Dräxlmaier GMBH
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
680 granted / 814 resolved
+28.5% vs TC avg
Strong +25% interview lift
Without
With
+24.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
19 currently pending
Career history
833
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
54.9%
+14.9% vs TC avg
§102
32.1%
-7.9% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 814 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-12 are pending. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1, 2, 4, and 7-12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Mishra et al (US10467154) hereinafter Misha. As to claim 1, Mishra discloses a control arrangement for a vehicle electrical system including a central computing platform (Fig. 4 with host device 402) and a plurality of decentralized input-output modules (Fig. 4, and a plurality of slave device such as 412) that are connected with the central computing platform via a serial communication bus (Fig. 4, and serial bus 410), with each input-output module of the plurality of decentralized input-output modules comprising: a plurality of configurable input-output pins that are associated with at least one of a sensor and an actuator (Fig. 2, with detailed of slave device with I/O 214a, 214b COL. 6, lines 30 – 50); an input-output interface (Fig. 2, and interface 210); and a peripheral input/output (I/O) storage configured to store a configuration and physical states of the plurality of configurable input-output pins (Fig. 2 with config. Registers 206) comprising a plurality of protocol configurations), wherein the input-output interface is configured to generate a sensor record in the peripheral I/O storage (Fig. 2, and storage 224) based on a physical state of one of the plurality of configurable input-output pins associated with the sensor, the input-output interface is configured to control a physical state of one of the plurality of configurable input-output pins (COL. 6, and lines 35 – 45) associated with the actuator that corresponds to an actuator entry, present in the peripheral I/O storage, for the actuator, and the central computing platform, via the serial communication bus, (Fig. 2, and COL. 6, lines 43 – 50) is configured to at least one of read the sensor record in the peripheral I/O storage of the input-output module, and write an actuator record in the peripheral I/O storage of the input-output module (Fig. 2, and COL. 7, lines 5 – 10, where engagement with host and slave takes place). As to claim 12, Mishra discloses a method for controlling of sensors and actuators in a vehicle electrical system with a control arrangement (Fig. 4 with a host controlling a plurality of peripherals supporting a plurality of cases including a vehicle, COL. 5, lines 15 - 25), the control arrangement includes a central computing platform (Fig. 4, and host 402) and a plurality of decentralized input-output modules that are connected with the central computing platform via a serial communication bus (plurality of peripherals such as 504 coupled by communication bus, 410), with each input-output module of the plurality of decentralized input-output modules comprises a plurality of configurable input-output pins that are associated with at least one of a sensor and an actuator, an input-output interface (Col.6, lines 5 – 15, @ configurability) and a peripheral I/O storage configured to store a configuration of physical state data of the plurality of configurable input-output pins, the method comprising: generating a sensor input in the peripheral I/O storage based on a physical state of one input-output pin of the plurality of configurable input-output pins associated with the sensor (COL. 5, lines 60 – 67, for configuration); controlling a physical state of one input-output pin of the plurality of configurable input-output pins associated with the actuator, corresponding to an actuator record, present in the peripheral I/O storage, for the actuator (COL. 6, and lines 35 – 45); performing at least one of: reading a sensor record in the peripheral I/O storage of a respective input-output module of the plurality of decentralized input-output modules by the central computing platform via the serial communication bus (Fig. 2, and COL. 6, lines 43 – 50); and writing the actuator record in the peripheral I/O storage of the respective input-output module of the plurality of decentralized input-output modules by the central computing platform via the serial communication bus (Fig. 2, and COL. 7, lines 5 – 10, where engagement with host and slave takes place). As to claim 2, Mishra discloses the control arrangement, wherein the central computing platform includes a DMA interface for direct memory access to a respective input-output module of the plurality of decentralized input-output modules (Fig. 1, with memory to enable transactions, COL. 5, lines 40 – 60). As to claim 4, Mishra discloses the control arrangement, wherein the serial communication bus is configured to produce a serial point-to-point communication via a peripheral component interconnect bus (Fig. 2, and bus 230, COL. 6, lines 17 – 25). As to claim 7, Mishra discloses the control arrangement, wherein the input-output interface is configured to cyclically transmit storage states of at least one actuator input present in the peripheral I/O storage to physical states of the plurality of configurable input-output pins corresponding to the at least one actuator input. (Fig. 2with transceivers and buffers such as 210a, and 210c, COL. 6, lines 17 – 27). As to claim 8, Mishra discloses the control arrangement, wherein the plurality of configurable input-output pins are at least one of binary inputs/outputs, ADC inputs, DAC outputs, SPI inputs/outputs, and RX/TX inputs/outputs (Fig. 6, and COL. 9, lines 20 – 40, where the PHY comprises a transceiver comprises these elements). As to claim 9, Mishra discloses the control arrangement, wherein the input-output interface is configured to convert the sensor record received from the one of the plurality of configurable input-output pins associated with the sensor into a digital value, and to store the digital value as a sensor input in the peripheral I/O storage (Fig. 4, and COL. 8, lines 7 – 20, where the pins are programmed to a protocol such as I2C, with the sensor input captured in register as shown in slave module). As to claim 10, Mishra discloses the control arrangement, wherein the input-output interface is configured to configure a dedicated input-output pin, according to the configuration present in the peripheral I/O storage, as a binary output pin, and to control a physical state of the dedicated input-output pin according to the actuator record present in the peripheral I/O storage (Fig. 4, where peripheral 412 is engaged with the host and operate accordingly to the selected protocol., COL. 7, lines 32 – 50) . As to claim 11, Mishra discloses the control arrangement, wherein the peripheral I/O storage further comprises a storage region in which the actuator record to control a safe state of the actuator is stored (Fig. 2, and storage 224, that record actuators data, COL. 6, lines 40 – 50). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 5, and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Mishra in view of Kahlbaum et al (US20220126637) hereinafter Kahlbaum. As to claim 5, Mishra does not explicitly disclose the control arrangement, wherein the plurality of decentralized input-output modules are connected with the central computing platform via an unshielded twisted-pair cable. Kahlbaum teaches in Fig. 2, wherein the plurality of decentralized input-output modules are connected with the central computing platform via an unshielded twisted-pair cable (para. 0039). One of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to use the embodiment of the vehicle trailer, (para. 0017). As to claim 6, Kahlbaum discloses the control arrangement, wherein the plurality of decentralized input-output modules are connected with the central computing platform via two shielded twisted-pair cables (para. 0039). One of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to use the embodiment of the vehicle trailer, (para. 0017). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Mishra in further view of Paniccia et al (US 20210116246) hereinafter Paniccia. As to claim 3, Mishra discloses the control arrangement, wherein the central computing platform includes a central I/O storage configured to store the sensor record and the actuator record of the peripheral I/O storage of the plurality of decentralized input-output modules (Fig. 2, module 224, and COL. 5, lines 37 – 45) and Mishra does not disclose the central computing platform is configured to compare the central I/O storage with the peripheral I/O storage of the plurality of decentralized input-output modules via a serial point-to-point interface and direct storage access mechanisms. Paniccia teaches in Fig. 8a , where data integrity checks are performed, (para. 0056) which is configured to compare the central I/O storage with the peripheral I/O storage of the plurality of decentralized input-output modules via a serial point-to-point interface and direct storage access mechanisms. One of ordinary skill in the art before the effective filing date of the claimed invention would use the capability of Paniccia in the system of Mishra that checks for system malfunctioning, (para. 0032). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US20220107912, US11880314, and US20190129881 teaches the management of a vehicle system where multiple peripherals are managed. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER ANTHONY DALEY whose telephone number is (571)272-3625. The examiner can normally be reached 7 - 3:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dr. Henry Tsai can be reached at 571 2724176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.A.D/Examiner, Art Unit 2184 /HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
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Prosecution Timeline

Jul 03, 2024
Application Filed
Dec 30, 2025
Non-Final Rejection — §102, §103
Apr 03, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+24.7%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 814 resolved cases by this examiner. Grant probability derived from career allow rate.

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