DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. PCT/JP2022/007062 , filed on February 22, 2022.
Information Disclosure Statement
The prior art documents submitted by applicant in the Information Disclosure Statements filed on July 03, 2024 and June 13, 2025 have all been considered and made of record (note the attached copies of form PTO-1449).
Drawings
6 (Six) sheets of drawings were filed on July 03, 2024.
Specification
Applicant’s cooperation is requested in correcting any errors of which applicant may become
aware in the specification.
Claim Objections
Claims 1 and 2 are objected to because of the following informalities:
Claims 1 and 2 use the term “Semi-insulating semiconductor substrate” and “semiconductor substrate” interchangeably. If these are distinct features, the latter lacks antecedent basis. If they are the same feature, the terminology must remain consistent throughout the claims. For the purposes of examination, they will be interpreted as the same feature.
Appropriate correction is required.
Inventorship
This application currently names joint inventors. In considering patentability of the claims
the examiner presumes that the subject matter of the various claims was commonly owned as of the
effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is
advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of
each claim that was not commonly owned as of the effective filing date of the later invention in
order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35
U.S.C. 102(a)(2) prior art against the later invention.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 5-6, and 8-11 are rejected under 35 U.S.C. 103 as being unpatentable over Feng et al (US20100207223A1), hereafter Feng, in view of Takashi et al (JP2001223369A), hereafter Takashi.
Regarding claim 1, Feng discloses an optical receiver comprising (FIG. 1B, 3, 11A and 11B): a support base (Substrate 28); a waveguide-type light receiving element (Light sensor 29) fixed to a surface of the support base (Substrate 28. FIG.1B); the waveguide-type light receiving element includes: a semi-insulating semiconductor substrate (insulator 27); a light absorbing layer (light-absorbing medium 32) that is formed on one main surface of the semiconductor substrate (FIG. 1B) and has a pair of joint surfaces perpendicular to the one main surface of the semiconductor substrate and an incident end face on which light is incident (See annotated FIGs. 1B and 3 below. A light-absorbing layer must have an incident end face to receive incoming light) and which has facing end sides of the pair of joint surfaces as a pair of opposite sides (See annotated FIG. 1B below), an n-type semiconductor layer (doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type. The light-absorbing medium 32 includes a doped region 40 that is an N-type doped region and a doped region 40 that is a P-type doped region.) joined to one of the pair of joint surfaces of the light absorbing layer (light absorbing medium 32) on the one main surface of the semiconductor substrate (Insulator 27. FIG. 1B) ; and a p-type semiconductor layer (doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type. The light-absorbing medium 32 includes a doped region 40 that is an N-type doped region and a doped region 40 that is a P-type doped region) joined to the other of the pair of joint surfaces of the light absorbing layer (light absorbing medium 32) on the one main surface of the semiconductor substrate (Insulator 27. FIG. 1B).
Feng further discloses the height for light absorbing medium 32 could be 1, 2 or 3 micrometers, the width could be 0.5, 1.5, or 2 micrometer in Par. [ 0041], but fails to disclose the incident end face having a layer thickness longer than a layer width. Accordingly, if the height was 1 the width would be .05 satisfying the condition of the limitation.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of feng Feng with the claimed dimension since has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Feng fails to teach an optical circuit element fixed to the surface of the support base and the optical circuit element includes an optical waveguide having an emitting end face to emit light, the emitting end face facing the incident end face of the light absorbing layer in the waveguide-type light receiving element.
Takashi teaches an optical circuit element (Quartz optical circuit 35) fixed to the surface of the support base (FIG. 3), and the optical circuit element (quartz optical circuit 35) includes an optical waveguide (Page 4 Par. 9) having an emitting end face to emit light (This is a necessary property of a waveguide; in order to emit light it has to have an end face), the emitting end face, facing the incident end face of the light absorbing layer in the waveguide-type light receiving element (this is a required in order to make the device of Takashi work, the end face of light absorbing layer and the end face of the optical circuit would need to face each other to emit and receive light).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng to include the optical circuit of Takashi because an optical receiver by its nature requires both a light-receiving element and an optical circuit or waveguide to deliver the incident optical signal to the light-receiving element in order for the receiver to function. This modification represents a straightforward, predictable integration of a known functional elements.
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Regarding claim 2, Feng discloses an optical receiver (FIG. 1B, 3, 11A and 11B) comprising: a support base (Substrate 28); a waveguide-type light receiving element (light sensor 29. Par. [0026]) fixed to a surface of the support base (FIG. 1B); the waveguide-type light receiving element (light sensor 29) includes: a semi-insulating semiconductor substrate (Insulator 27); and a waveguide-type light receiving element section and a light introducing section, formed on one main surface of the semiconductor substrate (see annotated FIG. 1B), wherein the waveguide-type light receiving element section includes: a light absorbing layer (Light absorbing medium 32) that is formed on the one main surface of the semiconductor substrate (Substrate 28) and has a pair of joint surfaces perpendicular to the one main surface of the semiconductor substrate and an incident end face on which light is incident (See annotated FIGs. 1B and 3. A light-absorbing layer must have an incident end face to receive incoming light) and which has facing end sides of the pair of joint surfaces as a pair of opposite sides (See annotated FIG. 1B below); an n-type semiconductor layer (doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type. The light-absorbing medium 32 includes a doped region 40 that is an N-type doped region and a doped region 40 that is a P-type doped region) joined to one of the pair of joint surfaces of the light absorbing layer (light absorbing medium 32) on the one main surface of the semiconductor substrate (FIG. 1B. Insulator 27) ; and a p-type semiconductor layer (doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type. The light-absorbing medium 32 includes a doped region 40 that is an N-type doped region and a doped region 40 that is a P-type doped region) joined to the other of the pair of joint surfaces of the light absorbing layer (light absorbing medium 32) on the one main surface of the semiconductor substrate (FIG. 1B. Insulator 27), the light introducing section includes a light introducing path (An optical receiver input section requires a light path) having: an introducing joint surface joined to the incident end face of the light absorbing layer (See annotated FIG. 3); and a light introducing end face on which light is incident and which is formed continuously from the introducing joint surface in a tapered shape (Taper 48 and annotated FIG. 3) in such a manner that the light introducing end face is parallel to the one main surface of the semiconductor substrate and gradually widens(FIG. 1B and FIG. 3).
Feng further discloses the height for light absorbing medium 32 could be 1, 2 or 3 micrometers, and the width could be 0.5, 1.5, or 2 micrometer in Par. [ 0041], but fails to disclose the incident end face having a layer thickness longer than a layer width. Accordingly, if the height was 1 the width would be .05 satisfying the condition of the limitation. Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of feng with the claimed dimension since has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Feng fails to discloses an optical circuit element fixed to the surface of the support base and the optical circuit element includes an optical waveguide having an emitting end face to emit light, the emitting end face facing the incident end face of the light absorbing layer in the waveguide-type light receiving element.
Takashi teaches an optical circuit element (Quartz optical circuit 35) fixed to the surface of the support base (FIG. 3), and the optical circuit element (quartz optical circuit 35) includes an optical waveguide (Page 4 Par. 9) having an emitting end face to emit light (This in a necessary property of a waveguide, in order to emit light it has to have an end face), the emitting end face facing the incident end face of the light absorbing layer in the waveguide-type light receiving element (this is a required in order to make the device of Takashi work, the end face of light absorbing layer and the end face of the optical circuit would need to face each other to emit and receive light).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng to include the optical circuit of Takashi because an optical receiver by its nature requires both a light-receiving element and an optical circuit or waveguide to deliver the incident optical signal to the light-receiving element in order for the receiver to function. This modification represents a straightforward, predictable integration of a known functional elements.
Regarding claim 5, Feng/Takashi disclose the device of claim 1. Feng fails to discloses the semiconductor substrate in the waveguide-type light receiving element is an indium phosphide (InP) substrate, the light absorbing layer in the waveguide-type light receiving element is an undoped indium gallium arsenide (GaInAs) layer, the n-type semiconductor layer in the waveguide-type light receiving element is an n-type indium phosphide (InP) layer, and the p-type semiconductor layer in the waveguide-type light receiving element is a p-type indium phosphide (InP) layer.
Takashi teaches the semiconductor substrate(semiconductor substrate 11) in the waveguide-type light receiving element (waveguide type light receiving element 31) is an indium phosphide (InP) substrate (Page 2 Par. 12 and Description of symbols), the light absorbing layer (Light receiving portion mesa 12) in the waveguide-type light receiving element is an undoped indium gallium arsenide (GaInAs) layer (N-InGaAs contact layer 20. Page 3 Par.8 ).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art modify the device of Feng with the claimed materials as taught by Takashi since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Feng/Takashi fails to disclose the n-type semiconductor layer in the waveguide-type light receiving element is an n-type indium phosphide (InP) layer, and the p-type semiconductor layer in the waveguide-type light receiving element is a p-type indium phosphide (InP) layer.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the n-type and p-type semiconductors to be made of InP since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 6, Feng/Takashi disclose the device of claim 1. Feng further discloses the incident end face of the light absorbing layer (light absorbing medium 32) in the waveguide-type light receiving element (FIG. 1B) has a micron order layer thickness (Par. [0041] indicates a suitable height for 32 is great that 1 micrometer) and the incident end face of the light absorbing layer (light absorbing medium 32) in the waveguide-type light receiving element (FIG. 1B) has a micron order layer width (Par. [0041] indicates a suitable width for 32 is great that 0.5micrometer).
Regarding claim 7, Feng/Takashi disclose the device of claim 1. Feng further discloses the incident end face of the light absorbing layer (light absorbing medium 32) in the waveguide-type light receiving element (FIG. 1B) has a layer thickness of 3 μm or more (Par. [0041]: suitable height can be 3 micrometers or greater) , and the incident end face of the light absorbing layer(light absorbing medium 32) in the waveguide-type light receiving element (FIG. 1B) has a layer width of less than 1 μm (Par. [0041]: suitable width can be great than 0.5 micrometer).
Regarding claim 8, Feng/Takashi disclose the device of claim 1. Feng further discloses an electrode (Electrical conductor 44. FIG. 11B) connected to the n-type semiconductor layer (doped regions 40 and 42: Par. [ 0032 and 0034] can be p-type or n-type) in the waveguide-type light receiving element (light sensor 29); and an electrode (Electrical conductor 44. FIG. 11B) connected to the p-type semiconductor layer (doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type) in the waveguide-type light receiving element (light sensor 29). Feng fails to teach the electrode and cathode and anode bump electrodes.
Takashi teaches a bump electrode (FIG. 1. Raised conductive structures 16 show flip chip bonded in FIG. 3).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng with electrodes constituted by bump electrodes in order to flip chip bond the waveguide-type light receiving element to the substrate as shown in Takashi FIG.3, to achieve predictable results such as reliable mechanical and electrical connection, reduced parasitic capacitance, and compact packaging.
Feng/Takashi fails to teach the bump electrodes are anode and cathode electrodes.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng/Takashi with anode and cathode electrodes because doing so establishes clear electrical polarity for proper diode operation, enabling functional current flow through the p-type and n-type semiconductor layers with standard circuit connections, yielding predictable results.
Regarding claim 9, Feng/ Takashi disclose the device of claim 2. Feng further discloses a semi-conductor substrate in the waveguide type light receiving element (light sensor 29), a light absorbing layer (light absorbing medium 32) in the waveguide type light receiving element, an n-type semi-conductor layer in the waveguide type light receiving element and a p-type semiconductor in the waveguide-type light receiving element (doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type).
Feng fails to disclose the semiconductor substrate in the waveguide-type light receiving element is an indium phosphide (InP) substrate, the light absorbing layer in the waveguide-type light receiving element is an undoped indium gallium arsenide (GaInAs) layer, the n-type semiconductor layer in the waveguide-type light receiving element is an n-type indium phosphide (InP) layer, the p-type semiconductor layer in the waveguide-type light receiving element is a p-type indium phosphide (InP) layer, and the light introducing path of the light introducing section in the waveguide-type light receiving element is a semiconductor layer having a band gap smaller than that of indium phosphide and larger than that of indium gallium arsenide.
Takashi teaches the semiconductor substrate (semiconductor substrate 11) in the waveguide-type light receiving element (waveguide light receiving element 31) is an indium phosphide (InP) substrate (Page 2. Par 12 and description of symbols), the light absorbing layer (light receiving portion mesa 12) in the waveguide type light receiving element is an undoped indium gallium arsenide (GaInAs) layer (N-InGaAs contact layer 20. Page 3 Par. 8).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art modify the device of Feng with the claimed materials as taught by Takashi since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Feng/Takashi fails to disclose the n-type semiconductor layer in the waveguide type light receiving element is an n-type indium phosphide (InP) layer, the p-type semiconductor layer int eh waveguide-type light receiving element in a p-type indium phosphide (InP) layer.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art modify the device of Feng with the claimed materials since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Feng/Takashi fail to disclose the light introducing path of the light introducing section in the waveguide-type light receiving element is a semiconductor layer having a band gap smaller than that of indium phosphide and larger than that of indium gallium arsenide.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng/Takashi with the light introducing path of the light introducing section in the waveguide-type light receiving element is a semiconductor layer having a band gap smaller than that of indium phosphide and larger than that of indium gallium arsenide. Modifying the device with an intermediate band gap layer would have been obvious to a person of ordinary skill in the art to smoothly transition light, reduce optical reflection, and improve coupling efficiency between the wider band gap InP cladding/substrate and the narrower band gap GaInAs absorbing layer. Selecting a known semiconductor alloy composition having a specific intermediate energy band gap for optical optimization constitutes routine optimization well within the ordinary skill of a person of ordinary skill in the art
Regarding claim 10, Feng/Takashi disclose the device of claim 2. Feng further discloses the incident end face of the light absorbing layer (light absorbing medium) in the waveguide-type light receiving element (FIG. 1B) has a micron order layer thickness (Par. [0041]: indicates a suitable height for 32 is greater than 1 micrometer), the incident end face of the light absorbing layer (light absorbing medium, 32) in the waveguide-type light receiving element (FIG. 1B) has a submicron order layer width (Par.[0041]: indicates a suitable width for 32 is greater than 0.5 micrometers), and the light introducing end face of the light introducing path (waveguide 16) in the waveguide-type light receiving element has a micron order layer thickness (Par. [0040]: indicates a suitable height for 16 is greater than 1 micrometer) and a micron order layer width (Par. [0040]: Indicates a suitable width for 16 is greater than 0.5 micrometers, 1 micrometer, and 2 micrometers).
Regarding claim 11, Feng/Takashi disclose the device of claim 2. Feng further discloses the incident end face of the light absorbing layer (light absorbing medium 32) has a layer thickness of 3 μm or more(Par. [0041]: Suitable height that can be 3 micrometers or greater), and the incident end face of the light absorbing layer (Light absorbing medium 32) has a layer width of less than 1 μm (Par. [0041]: Suitable width can be greater than 0.5 micrometer) , and the light introducing end face of the light introducing path (See annotated FIG. 1B) has a layer thickness and a layer width equal to the layer thickness of the incident end face of the light absorbing layer (Par. [0040]: indicates the ratio of height to the width of waveguide 16 can be 1:1 and could have the dimensions of two or three micrometers. Par.[0041]: indicates the height of the light absorbing layer 32 could be two or three micrometers).
Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Feng et al. (US20100207223A1), hereafter Feng, in view of Matsuoka (US20090297095A1).
Regarding claim 3, Feng discloses an optical receiver (FIG. 1B and FIG. 3) comprising: a waveguide-type light receiving element(Light sensor 29 ); the waveguide-type light receiving element includes: a semi-insulating semiconductor substrate (Insulator 27); a light absorbing layer (Light absorbing medium 32) that is formed on one main surface of the semi-insulating semiconductor substrate (FIG. 1B. Insulator 27) and has a pair of joint surfaces perpendicular to the one main surface of the semiconductor substrate and an incident end face on which light is incident (See annotated FIGs. 1B and 3 below) and which has facing end sides of the pair of joint surfaces as a pair of opposite sides (See annotated FIG. 1B below),; an n-type semiconductor layer(doped regions 40: Par. [0032] can be p-type or n-type) joined to one of the pair of joint surfaces of the light absorbing layer(light absorbing medium 32) on the one main surface of the semiconductor substrate (light transmitting medium 18 can be an optical insulator 27) ; and a p-type semiconductor layer (doped regions 40: Par. [0032] can be p-type or n-type) joined to the other of the pair of joint surfaces of the light absorbing layer(light absorbing medium 32) on the one main surface of the semiconductor substrate (FIG. 1B).
Feng further discloses the height for light absorbing medium 32 could be 1, 2 or 3 micrometers, and the width could be 0.5, 1.5, or 2 micrometer in Par. [ 0041], but fails to disclose the incident end face having a layer thickness longer than a layer width. Accordingly, if the height was 1 the width would be .05 satisfying the condition of the limitation. Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng with the claimed dimension since has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Feng fails to disclose an optical circuit element, wherein the optical circuit element includes: a semiconductor substrate having an optical waveguide forming surface and a light receiving element fixing surface lower than the optical waveguide forming surface on one main surface; an optical waveguide formed on the optical waveguide forming surface of the semiconductor substrate and having an emitting end face to emit light; and a cathode wiring layer and an anode wiring layer, formed on the light receiving element fixing surface of the semiconductor substrate, and the waveguide-type light receiving element is fixed to the light receiving element fixing surface of the semiconductor substrate in the optical circuit element while the incident end face of the light absorbing layer faces the emitting end face of the optical waveguide in the optical circuit element, a cathode electrode is connected to the cathode wiring layer in the optical circuit element, and an anode electrode is connected to the anode wiring layer in the optical circuit element.
Matsuoka discloses an optical circuit disclose an optical circuit element (FIG. 3A and 5. optical waveguide array 26), wherein the optical circuit element includes: a semiconductor substrate (Substrate 17) having an optical waveguide forming surface (an optical waveguide array inherently has a waveguide forming surface) and a light receiving element fixing surface lower than the optical waveguide forming surface on one main surface (see annotated FIG. 5) ; an optical waveguide formed (Optical waveguide channels 11 and 12) on the optical waveguide forming surface of the semiconductor substrate (Substrate 17) and having an emitting end face to emit light (FIG. 5. Par.[0052]: Reverse bias. optical axes of the surface illuminated type photodiode array 60 and the optical waveguide array 26 are then aligned); a wiring layer (electrical wirings 18) formed on the light receiving element fixing surface of the semiconductor substrate (FIG. 3A. Substrate 17), and the waveguide-type light receiving element (Photodiode array 60) is fixed to the light receiving element surface of the semiconductor substrate (FIG. 5), while the incident end face of the light absorbing layer faces the emitting end face of the optical waveguide in the optical circuit element (FIG. 5. Par.[0052]: Reverse bias. optical axes of the surface illuminated type photodiode array 60 and the optical waveguide array 26 are then aligned), an electrode (electrode pads 19) is connected to the wiring layer (Par. [0052]. FIG. 5).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng with the optical circuit element of Matsuoka because an optical receiver by its nature requires both a light-receiving element and an optical circuit or waveguide to deliver the incident optical signal to the light-receiving element in order for the receiver to function. This modification represents a straightforward, predictable integration of a known functional elements.
Feng/Matsuoka fails to disclose the wiring layers are cathode and anode wiring layer and the electrodes are anode and cathode electrodes.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the wiring layer and electrode of Feng/Matsuoka to be cathode and anode because a standard photodiode or light-receiving element inherently requires separate cathode and anode connections to apply a reverse bias (Matsuoka Par. [0052]) voltage and collect photogenerated electrical current. A photodiode requires distinct positive (anode) and negative (cathode) terminals to operate as a functional electrical device. Selecting cathode and anode configurations represents a standard, well-known electrical design choice for semiconductor photodetectors.
Regarding claim 4, Feng discloses an optical receiver (FIG. 1B and FIG. 3) comprising: a waveguide-type light receiving element (Light sensor 29); and the waveguide-type light receiving element includes: a semi-insulating semiconductor substrate (Insulator 27); and a waveguide-type light receiving element section and a light introducing section (See annotated 1B) , formed on one main surface of the semi-insulating semiconductor substrate (Substrate 28), the waveguide-type light receiving element section includes: a light absorbing layer (Light absorbing medium 32) that is formed on the one main surface of the semi-insulating semiconductor substrate (Substrate 28) and has a pair of joint surfaces perpendicular to the one main surface of the semi-insulating semiconductor substrate and an incident end face on which light is incident and which has facing end sides of the pair of joint surfaces as a pair of opposite sides (See annotated FIGs. 1B and 3. A light-absorbing layer must have an incident end face to receive incoming light),; an n-type semiconductor layer (doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type. The light-absorbing medium 32 includes a doped region 40 that is an N-type doped region and a doped region 40 that is a P-type doped region) joined to one of the pair of joint surfaces of the light absorbing layer (light absorbing medium 32) on the one main surface of the semiconductor substrate (FIG. 1B. Insulator 27); and a p-type semiconductor layer (doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type. The light-absorbing medium 32 includes a doped region 40 that is an N-type doped region and a doped region 40 that is a P-type doped region) joined to the other of the pair of joint surfaces of the light absorbing layer (light absorbing medium 32) on the one main surface of the semiconductor substrate (FIG. 1B. Insulator 27), the light introducing section includes a light introducing path (An optical receiver input section requires a light path) having: an introducing joint surface joined to the incident end face of the light absorbing layer (See annotated FIG. 3); and a light introducing end face on which light is incident and which is formed continuously from the introducing joint surface in a tapered shape (Taper 48 and annotated FIG. 3) in such a manner that the light introducing end face is parallel to the one main surface of the semiconductor substrate and gradually widens (FIG. 1B and FIG. 3).
Feng further discloses the height for light absorbing medium 32 could be 1, 2 or 3 micrometers, and the width could be 0.5, 1.5, or 2 micrometer in Par. [ 0041], but fails to disclose the incident end face having a layer thickness longer than a layer width. Accordingly, if the height was 1 the width would be .05 satisfying the condition of the limitation.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng with the claimed dimension since has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Feng fails to disclose an optical circuit element, wherein the optical circuit element includes: a semiconductor substrate having an optical waveguide forming surface and a light receiving element fixing surface lower than the optical waveguide forming surface on one main surface; an optical waveguide formed on the optical waveguide forming surface of the semiconductor substrate and having an emitting end face to emit light; and a cathode wiring layer and an anode wiring layer, formed on the light receiving element fixing surface of the semiconductor substrate, and the waveguide-type light receiving element is fixed to the light receiving element fixing surface of the semiconductor substrate in the optical circuit element while the incident end face of the light absorbing layer faces the emitting end face of the optical waveguide in the optical circuit element, a cathode electrode is connected to the cathode wiring layer in the optical circuit element, and an anode electrode is connected to the anode wiring layer.
Matsuoka discloses an optical circuit disclose an optical circuit element (FIG. 3A and 5. optical waveguide array 26), wherein the optical circuit element includes: a semiconductor substrate (Substrate 17) having an optical waveguide forming surface (an optical waveguide array inherently has a waveguide forming surface) and a light receiving element fixing surface lower than the optical waveguide forming surface on one main surface (see annotated FIG. 5); an optical waveguide formed (Optical waveguide channels 11 and 12) on the optical waveguide forming surface of the semiconductor substrate (Substrate 17) and having an emitting end face to emit light (FIG. 5. Par.[0052]: Reverse bias. optical axes of the surface illuminated type photodiode array 60 and the optical waveguide array 26 are then aligned); a wiring layer (electrical wirings 18) formed on the light receiving element fixing surface of the semiconductor substrate (FIG. 3A. Substrate 17), and the waveguide-type light receiving element (Photodiode array 60) is fixed to the light receiving element surface of the semiconductor substrate (FIG. 5), while the incident end face of the light absorbing layer faces the emitting end face of the optical waveguide in the optical circuit element (FIG. 5. Par.[0052]: Reverse bias. optical axes of the surface illuminated type photodiode array 60 and the optical waveguide array 26 are then aligned), an electrode (electrode pads 19) is connected to the wiring layer (Par. [0052]. FIG. 5).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art modify the device of Feng with the optical circuit element of Matsuoka because an optical receiver by its nature requires both a light-receiving element and an optical circuit or waveguide to deliver the incident optical signal to the light-receiving element in order for the receiver to function. This modification represents a straightforward, predictable integration of a known functional elements.
Feng/Matsuoka fails to disclose the wiring layers are cathode and anode wiring layer and the electrodes are anode and cathode electrodes.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the wiring layer and electrode of Feng/Matsuoka to be cathode and anode because a standard photodiode or light-receiving element inherently requires separate cathode and anode connections to apply a reverse bias (Matsuoka Par. [0052]) voltage and collect photogenerated electrical current. A photodiode requires distinct positive (anode) and negative (cathode) terminals to operate as a functional electrical device. Selecting cathode and anode configurations represents a standard, well-known electrical design choice for semiconductor photodetectors.
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Claim 12-16 are rejected under 35 U.S.C. 103 as being unpatentable over Feng et al. (US20100207223A1), hereafter Feng , in view of Takashi et al. (JP2001223369A), hereinafter Takashi, and in further view of Ido et al (US6356692B1), hereafter Ido.
Regarding claim 12, Feng/Takashi disclose the device of claim 1. Takashi further discloses the optical waveguide (Page 4 Par. 9) in the optical circuit element (Quartz optical circuit 35) on one main surface of a substrate (FIG. 3). Feng/Takashi fails to disclose the optical waveguide is formed of a silicon layer on one main surface of a silicon substrate.
Ido teaches the optical waveguide in the optical circuit element (Optical module FIG. 1) is formed of a silicon layer on one main surface of a silicon substrate (Silicone substrate 1. Column 4 lines 58-65).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the optical circuit of Feng/Takashi to have an optical waveguide formed of a silicon layer on the main surface of a silicon substrate. Such a modification represents the substitution of known material systems (silicon-on-insulator platform) to achieve predictable functional advantages, given that forming waveguides via silicon layers was a well-established fabrication methodology in the art.
Regarding claim 13, Feng/Takashi/Ido disclose the device of claim 12. Takashi further discloses the waveguide-type light receiving element (light receiving element 31) is fixed to the surface of the support base (insulation film 34) with solder between the other main surface of the semiconductor substrate(insulating film 34) in the waveguide-type light receiving element(light receiving element 31) and the surface of the support base (Optical waveguide substrate 36) (Page 4 Par. 9. Electrode 16 connected to electric wiring 32 by AuSn Solder).
Feng/Takashi/Ido fails to disclose the optical circuit element is fixed to the surface of the support base with an adhesive between the other main surface of the silicon substrate in the optical circuit element and the surface of the support base.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device optical circuited of Feng/Takashi/Ido with an adhesive between the other main surface and the support base. A person of ordinary skill in the art would find it obvious to substitute or add an adhesive to secure the optical circuit element, as using adhesives for stable component mounting was well-known in the art before the effective filing date.
Regarding claim 14, Feng/Takashi/Ido disclose the device of claim 12. Feng/Takashi fails to disclose a height from the other main surface of the semiconductor substrate to a center of the incident end face in the light absorbing layer in the waveguide-type light receiving element is equal to a height from the other main surface of the silicon substrate to a center of the emitting end face in the optical waveguide in the optical circuit element.
Ido discloses a height from the other main surface of the semiconductor substrate to a center of the incident end face (Core layer 8) in the light absorbing layer in the waveguide-type light receiving element (Semiconductor element 7) is equal to a height from the other main surface of the silicon substrate to a center of the emitting end face in the optical waveguide (core layer 5) in the optical circuit element (FIG. 1).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the optical circuit of Feng/Takashi with the configuration of Ido because Aligning the center of the incident end face with the center of the emitting end face improves light transfer efficiency. Matching these heights prevents optical misalignment and lowers insertion loss between the optical circuit element and the waveguide-type light receiving element. Adjusting the heights to be equal is a routine optimization within the skill of a person in the art to ensure proper signal transmission.
Regarding claim 15, Feng/Takashi/Ido disclose the device of claim 12. Feng/Takashi fails to disclose the optical circuit element further includes an input port to couple an optical signal from an optical fiber to the optical waveguide at an end of the optical waveguide on a side opposite to the emitting end face.
Ido discloses the optical circuit element further includes an input port (Claim 20. Optical input side) to couple an optical signal from an optical fiber (end of optical fiber 9) to the optical waveguide at an end of the optical waveguide on a side opposite to the emitting end face (FIG. 1).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the optical circuit of Feng/Takashi to include an input port for optical coupling with an optical fiber the modification involves using known input coupling techniques to achieve predictable results. Applying standard fiber-to-chip coupling techniques yields predictable results, namely, efficient optical input transmission, without unexpected functional changes.
Regarding claim 16, Feng/Takashi/Ido disclose the device of claim 12. Feng/Takashi fails to disclose the input port is a port by any of a surface coupling type coupling method using a surface diffraction grating, an end face coupling type coupling method using a spot size converter, and an evanescent coupling type coupling method.
Ido discloses end face coupling type method (FIG. 1. Claim 20).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art modify the optical circuit of Feng/Takashi with the end face couple of an optical fiber of Ido because it would have been a matter of routine design choice and standard optical coupling practice to improve light transmission efficiency between the optical fiber and the waveguide. A person of ordinary skill in the art would look to Ido's well-known coupling technique to connect an optical fiber to the optical circuit in Takashi with a reasonable expectation of success.
Feng/Takashi/Ido fails to discloses a coupling method using a spot size converter, and an evanescent coupling type coupling method.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng/Takashi/Ido to utilize a spot size convertor and evanescent coupling type method it applies standard optical engineering practices to optimize mode-field matching and coupling efficiency between a fiber and a waveguide. Spot size convertors are standard in photonic integrated circuits to transform mode profiles and reduce insertion loss when coupling mismatched cross-sections. evanescent field transfer is a fundamental alternative to butt-coupling for transferring optical power between parallel waveguides with a high expectation of success. Applying standard spot-size converters and evanescent coupling methods would be obvious to optimize mode-field matching and reduce insertion loss with a high expectation of success.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Feng et al. (US20100207223A1), hereafter Feng , in view of Matsuoka (US20090297095A1), in view of Takashi et al. (JP2001223369A), hereinafter Takashi, and in further view of Ido et al (US6356692B1), hereafter Ido.
Regarding claim 17, Feng/Matsuoka disclose the device of claim 3. Feng fails to disclose the semiconductor substrate of the optical circuit element is a silicon substrate, and the optical waveguide is a silicon layer.
Takashi teaches discloses the optical waveguide (Page 4 Par. 9) in the optical circuit element (Quartz optical circuit 35) on one main surface of a substrate (FIG. 3). Feng/Takashi fails to disclose the optical waveguide is formed of a silicon layer on one main surface of a silicon substrate.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng with the optical circuit element of Matsuoka because an optical receiver by its nature requires both a light-receiving element and an optical circuit or waveguide to deliver the incident optical signal to the light-receiving element in order for the receiver to function. This modification represents a straightforward, predictable integration of a known functional elements.
Feng/Matsuoka/Takashi fails to teach the optical waveguide is formed of a silicon layer on one main surface of a silicon substrate. Ido teaches the semiconductor substrate (Silicon substrate 1) of the optical circuit element is a silicon substrate (Silicon substrate 1), and the optical waveguide is a silicon layer (Par. [0002] lines 16-17: The polymer waveguide is Silicon).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the optical circuit of Takashi with the material of Ido since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Matsuoka (US20090297095A1) in view of Feng et al. (US2010020223A1), hereafter Feng, and in further view of Takashi et al. (JP 2001223369 A), hereafter Takashi.
Regarding claim 18, Matsuoka discloses an optical receiver (FIG. 2D, 2F, 2H and 2I) comprising a light receiving element array (Optical element array 15) and an optical waveguide array (optical waveguide array 26), wherein the light receiving element array includes a common semi-insulating semiconductor substrate (Substrate 17) and a plurality of waveguide-type light receiving element sections arranged on a straight line in a lateral direction on one main surface of the common semi-insulating semiconductor substrate (Optical element channels 16. FIG. 2D) , and the optical waveguide array (Optical waveguide array 26) includes a common semiconductor substrate (Cladding layer 14) and a plurality of optical waveguides (Optical waveguide channels 11 and 12) arranged on a straight line in a lateral direction on the one main surface of the common semiconductor substrate(FIG. 2F), each of the optical waveguides having an emitting end face to emit light, the emitting end face facing and being butt-joint joined (FIG. 2H and 2I) to the incident end face of the light absorbing layer in each of the plurality of waveguide-type light receiving element sections (Abstract: The optical axes of the optical waveguide array channels and the optical element array are aligned).
Matsuoka fails to disclose the common semiconductor substrate is a silicon substrate, and the common semiconductor substrate of the optical waveguide array is a silicon substrate, and the plurality of optical waveguides are silicon layers.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device Matsuoka with a silicon material for the common semiconductor substrate since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Matsuoka fails to disclose each of the plurality of waveguide-type light receiving element sections includes an n-type semiconductor layer, a light absorbing layer, and a p-type semiconductor layer sequentially formed in a lateral direction on the one main surface of the common semi-insulating semiconductor substrate, and an incident end face on which light is incident in the light absorbing layers light absorbing layer has a layer thickness longer than a layer width.
Feng teaches waveguide type light receiving element section (Light sensor 29) includes an n-type semiconductor layer(doped regions 40: Par. [0032] can be p-type or n-type), a light absorbing layer (light absorbing layer 32), and a p-type semiconductor layer (doped regions 40: Par. [0032] can be p-type or n-type) sequentially formed in a lateral direction (FIG. 3) on the one main surface of the common semi-insulating semiconductor substrate(substrate 28), and an incident end face on which light is incident in the light absorbing layers light absorbing layer has a layer thickness longer than a layer width(Par. [ 0041]: Height for light absorbing medium 32 could be 1, 2 or 3 micrometers. The width could be 0.5, 1.5, or 2 micrometer. In other words, if the height was 1 the width would be .05 satisfying the condition of the limitation), the optical waveguide is silicon (Par. [0024]).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Matsuoka with p-type and n-type semiconductor region with the light absorbing layer thickness longer than the layer width. A person of ordinary skill in the art would be motivated to combine these references to optimize evanescent optical confinement, enhance internal quantum efficiency via increased vertical absorption depth, and minimize lateral footprint density on the shared semi-insulating substrate.
Matsuoka/Feng fails to disclose the common semi-insulating semiconductor substrate in the light receiving element array is an indium phosphide (InP) substrate, the light absorbing layer of each of the plurality of waveguide-type light receiving element sections is an undoped indium gallium arsenide (GaInAs) layer,
Takashi teaches the semiconductor substrate(semiconductor substrate 11) in the waveguide-type light receiving element(waveguide type light receiving element 31) is an indium phosphide (InP) substrate (Page 2 Par. 12 and Description of symbols), the light absorbing layer (Light receiving portion mesa 12) in the waveguide-type light receiving element is an undoped indium gallium arsenide (GaInAs) layer (N-InGaAs contact layer 20. Page 3 Par.8).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art modify the device of Matsuoka/Feng with the claimed materials since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Matsuoka/Feng/Takashi fails to disclose the n-type semiconductor layer in the waveguide-type light receiving element is an n-type indium phosphide (InP) layer, and the p-type semiconductor layer in the waveguide-type light receiving element is a p-type indium phosphide (InP) layer.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the n-type and p-type semiconductors to be made of InP since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 19, Matsuoka/Feng/Takashi disclose the device of claim 18. Matsuoka further discloses and incident end face of a plurality of waveguide-type light receiving elements sections (FIG. 1A. Optical channels 16). Matsuoka fails to discloses the incident end face of the light absorbing layer in each of the plurality of waveguide-type light receiving element sections has a layer thickness of 3 μm or more, and the incident end face of the light absorbing layer has a layer width of less than 1 μm.
Feng teaches the incident end face of the light absorbing layer (light absorbing medium 32) in the waveguide-type light receiving element (FIG. 1B) has a layer thickness of 3 μm or more (Par. [0041]: suitable height can be 3 micrometers or greater), and the incident end face of the light absorbing layer (light absorbing medium 32) in the waveguide-type light receiving element (FIG. 1B) has a layer width of less than 1 μm (Par. [0041]: suitable width can be great than 0.5 micrometer).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art would be motivated to modify the device of Matsuoka light absorbing layers with the claimed dimensions since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 20, Matsuoka/Feng/Takashi disclose the device of claim 19. Matsuoka further discloses the common semiconductor substrate (Substrate 17) of the optical waveguide array (Optical waveguide array 26) has an optical waveguide forming surface and a light receiving element fixing surface lower than the optical waveguide forming surface on the one main surface (See annotated FIG. 2I), a plurality of optical waveguides of the optical waveguide array (Optical waveguide channels 11 and 12) is formed on the optical waveguide forming surface (See annotated FIG. 2I). Matsuoka fails to disclose an electrode connected to the n-type semiconductor layer in the waveguide-type light receiving element ; and an electrode connected to the p-type semiconductor layer in the waveguide-type light receiving element.
Feng teaches an electrode (Electrical conductor 44. FIG. 11B) connected to the n-type semiconductor layer(doped regions 40 and 42: Par. [ 0032 and 0034] can be p-type or n-type) in the waveguide-type light receiving element (light sensor 29); and an electrode (Electrical conductor 44. FIG. 11B) connected to the p-type semiconductor layer(doped regions 40 and 42: Par. [0032 and 0034] can be p-type or n-type) in the waveguide-type light receiving element (light sensor 29).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Matsuoka with the electrodes and semiconductor layers of feng to provide electrical contact between the waveguide-type light receiving element and the optical circuit. A person of skill in the art would look to Feng to supply electrical connections because optical receivers require external circuitry to process detected light signals. Connecting p-type and n-type layers via conductive electrodes is a standard, routine design choice in semiconductor device manufacturing. The modification yields the predictable result of electrical signal collection without altering the basic optical guiding function of Matsuoka.
Matsuoka/Feng fails to teach the electrode and cathode and anode bump electrodes.
Takashi teaches a bump electrode (FIG. 1. Raised conductive structures 16 show flip chip bonded in FIG. 3).
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Feng with electrodes constituted by bump electrodes in order to flip chip bond the waveguide-type light receiving element to the substrate as shown in Takashi FIG.3, to achieve predictable results such as reliable mechanical and electrical connection, reduced parasitic capacitance, and compact packaging.
Matsuoka/Feng/Takashi fails to teach the bump electrodes are anode and cathode electrodes.
Before the effective filing date of the present invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Matsuoka/Feng/Takashi with anode and cathode electrodes because doing so establishes clear electrical polarity for proper diode operation, enabling functional current flow through the p-type and n-type semiconductor layers with standard circuit connections, yielding predictable results.
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Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure:
Yu et al. (US11150494B2)
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAJANAE N GREEN whose telephone number is (571)272-2188. The examiner can normally be reached Tues-Fri. 5:30a-3:30p.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at (571) 272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TAJANAE NICOLE GREEN/ Examiner, Art Unit 2874
/UYEN CHAU N LE/ Supervisory Patent Examiner, Art Unit 2874
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