Prosecution Insights
Last updated: April 19, 2026
Application No. 18/763,739

NEUROIMPLANT WITH DATA RATE REDUCTION SECTION

Non-Final OA §102
Filed
Jul 03, 2024
Examiner
HUH, VYNN V
Art Unit
3792
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Cortec GmbH
OA Round
1 (Non-Final)
62%
Grant Probability
Moderate
1-2
OA Rounds
3y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allow Rate
168 granted / 269 resolved
-7.5% vs TC avg
Strong +45% interview lift
Without
With
+44.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
41 currently pending
Career history
310
Total Applications
across all art units

Statute-Specific Performance

§101
5.5%
-34.5% vs TC avg
§103
41.0%
+1.0% vs TC avg
§102
19.1%
-20.9% vs TC avg
§112
24.3%
-15.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 269 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Status: Claims 1-15 are pending. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “at least one detection section for detecting signals from the brain region” in claim 1. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. Based on the review of instant specification, the corresponding structure is an electrical circuit that receives electrical signals from electrode section (para. [0033], fig. 1) If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “at least one digitization section for generating at least one digital data stream from the signals detected by the at least one detection section” in claim 1. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. Based on the review of instant specification, the corresponding structure is an analog-to-digital converter (para. [0045]). If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a data reduction section designed to discard data points in the sequence of data points from the at least one data stream according to a predetermined scheme” in claim 1. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. Based on the review of instant specification, the corresponding structure is an algorithm on a chip that discards data points (para. [0047], [0052], [0053], fig. 2). If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Howard (US 2022/0111212). Re Claim 1, Howard discloses a neuroimplant for the brain region, comprising: at least one detection section for detecting signals from the brain region (para. [0182]-[0186], neural sensing, Electrodes can perform electrical recording and stimulation), an electrode section having at least one electrode which can be coupled to the detection section and can be arranged in the brain region and is designed for electrically contacting the brain region (para. [0182]-[0186], neural sensing, Electrodes can perform electrical recording and stimulation. CNTs can be used for deep brain recordings of voltages from neural tissues in their vicinity. CNT based electrode arrays enable high-density neural connections in a manner that is non-destructive to the neuronal tissue), at least one digitization section for generating at least one digital data stream from the signals detected by the at least one detection section (para. [0261], analog-to-digital converter circuitry (ADC)), wherein the at least one data stream in each case comprises a sequence of data points (para. [0186], [0199], [0201], CNTs can be used for deep brain recordings of voltages from neural tissues in their vicinity; para. [0537], data recorded over a large interval of time), and a data reduction section designed to discard data points in the sequence of data points from the at least one data stream according to a predetermined scheme (para. [0440], the first step in processing the data may be to apply a filter in order to remove noise. A band pass filter between 300 and 3000 Hz may be employed for electrical signals recorded from neurons). Re Claim 2, Howard discloses that the scheme comprises discarding all data points of a data stream (para. [0515], the older entries may be deleted in order to make room for new incoming data). Re Claim 3, Howard discloses that the scheme comprises regularly discarding a predetermined number of data points from the at least one data stream (para. [0515], the persistence buffer may have a pre-configured size. In embodiments, once this size is exceeded, the Gateway may apply a first-in-first-out (FIFO) eviction policy. Thus, the older entries may be deleted in order to make room for new incoming data.). Re Claim 4, Howard discloses that the scheme comprises discarding n data points from each sequence of m data points of a data stream, where m and n are natural numbers (para. [0515], the persistence buffer may have a pre-configured size. In embodiments, once this size is exceeded, the Gateway may apply a first-in-first-out (FIFO) eviction policy. Thus, the older entries may be deleted in order to make room for new incoming data.). Re Claim 5, Howard discloses that a first register is provided which contains, for each of the at least one data stream, a value representative of whether or not all data points of the respective data stream are discarded (para. [0515], the persistence buffer may have a pre-configured size. In embodiments, once this size is exceeded, the Gateway may apply a first-in-first-out (FIFO) eviction policy. Thus, the older entries may be deleted in order to make room for new incoming data.). Re Claim 6, Howard discloses that a second register is provided which contains a value representative of discarding n data points from each sequence of m data points of at least one data stream (para. [0515], the persistence buffer may have a pre-configured size. In embodiments, once this size is exceeded, the Gateway may apply a first-in-first-out (FIFO) eviction policy. Thus, the older entries may be deleted in order to make room for new incoming data.). Re Claim 7, Howard discloses that at least one of the first and second registers is programmable (para. [0515] describes programmed buffer size and FIFO eviction policy). Re Claim 8, Howard discloses that the at least one detection section, the at least one digitization section and the data reduction section are arranged on a common semiconductor substrate (para. [0242], processor and associated circuitry such as system on a chip provided by on semiconductor, fig. 129). Re Claim 9, Howard discloses that the at least one detection section, the at least one digitization section and the data reduction section are implemented as an ASIC chip (para. [0354], [0360], processing circuitry may include ASICs; para. [0611], ADC, channels, hardware processing such as multiplication to increase SNR, are implemented in ASIC). Re Claim 10, Howard discloses at least one stimulation section for generating stimulation signals for the brain region (para. [0185], ELECTRODES—The configuration and implant position of the KIWI system 12000 offers superior conditions for multi-point electric stimulation. For example, KIWI system 12000 may be able to connect to layers I to VI due to the length and geometrical configuration of the CNTs.). Re Claim 11, Howard discloses that the neuroimplant is divided into a number of channels (para. [0185], 2000+ CNT fibers), each channel comprising a stimulation section, a detection section and an electrode of the electrode section (para. [0184]-[0186], Electrodes can perform electrical recording and stimulation. The configuration and implant position of the KIWI system 12000 offers superior conditions for multi-point electric stimulation. CNTs can be used for deep brain recordings of voltages from neural tissues in their vicinity). Re Claim 12, Howard discloses that the detection section is designed to perform signal high-pass filtering, which is adjustable according to the predetermined scheme (para. [0440], the first step in processing the data may be to apply a filter in order to remove noise. A band pass filter between 300 and 3000 Hz may be employed for electrical signals recorded from neurons; para. [0585], Filtering (ex. High/Low Pass)). Re Claim 13, Howard discloses that a switch matrix section arranged between the electrode section and the at least one detection section, wherein the switch matrix section comprises switching devices for coupling the electrode of each channel to the detection section of the channel or for decoupling it therefrom (para. [0526], Command Executor may apply the required activation/inactivation on the specified channels; para. [0397], [0460]-[0462], selection of channels, para. [0406], Gateway communication module 3312 may modify the list of active channels for recording in order to read a different set of channels than the ones that are in use by closed loop control module 3310). Re Claim 14, Howard discloses that the switch matrix section comprises switching devices by means of which an electrode can be respectively connected to an earth point (para. [0180], 1 ground/reference channel; para. [0309], Each tile may include, for example, one Reference Pin 1002, five Ground Pins 1004, six Recording Pins 1006). Re Claim 15, Howard discloses that the switch matrix section comprises switching devices by means of which a predetermined electrode can be connected as a reference electrode for the at least one detection section (para. [0180], 1 ground/reference channel; para. [0309], Each tile may include, for example, one Reference Pin 1002, five Ground Pins 1004, six Recording Pins 1006). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VYNN V HUH whose telephone number is (571)272-4684. The examiner can normally be reached Monday to Friday from 9 am to 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin Klein can be reached at (571) 270-5213. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Benjamin J Klein/Supervisory Patent Examiner, Art Unit 3792 /V.V.H./ Vynn Huh, February 21, 2026Examiner, Art Unit 3792
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Prosecution Timeline

Jul 03, 2024
Application Filed
Feb 21, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
62%
Grant Probability
99%
With Interview (+44.6%)
3y 8m
Median Time to Grant
Low
PTA Risk
Based on 269 resolved cases by this examiner. Grant probability derived from career allow rate.

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